From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 54CE2A04B7; Tue, 13 Oct 2020 15:14:33 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C81DC1DB38; Tue, 13 Oct 2020 15:14:16 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id D37001DB0E for ; Tue, 13 Oct 2020 15:14:10 +0200 (CEST) IronPort-SDR: 1CcalD1k2ntrIUiMIoWxczUW+Ox5PRBjdM55ZuN+iFzc8qbdpn1B7MvYOXyHz5XP8SSHLxZJLe Az+z9JZL/QYA== X-IronPort-AV: E=McAfee;i="6000,8403,9772"; a="165116932" X-IronPort-AV: E=Sophos;i="5.77,370,1596524400"; d="scan'208";a="165116932" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2020 06:14:08 -0700 IronPort-SDR: Jwn8Z9rtzYvq+1mQ0WqkHrGhXLUJpfXRfmOuc08xo1V9NzV40DIZRWt4fvrdkcD2JRS/c9Qv01 ULk/ZLsXdcdw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,370,1596524400"; d="scan'208";a="530390495" Received: from silpixa00400072.ir.intel.com ([10.237.222.213]) by orsmga005.jf.intel.com with ESMTP; 13 Oct 2020 06:14:06 -0700 From: Vladimir Medvedkin To: dev@dpdk.org Cc: david.marchand@redhat.com, jerinj@marvell.com, mdr@ashroe.eu, thomas@monjalon.net, konstantin.ananyev@intel.com, bruce.richardson@intel.com, ciara.power@intel.com Date: Tue, 13 Oct 2020 14:13:55 +0100 Message-Id: <67139b047183fac1f27e2b5da3afde80cd36f8ef.1602594359.git.vladimir.medvedkin@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Subject: [dpdk-dev] [PATCH v10 1/8] eal/x86: introduce AVX 512-bit type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" New data type to manipulate 512 bit AVX values. Signed-off-by: Vladimir Medvedkin Acked-by: Konstantin Ananyev --- lib/librte_eal/x86/include/rte_vect.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h index a00d3d5..f0aad96 100644 --- a/lib/librte_eal/x86/include/rte_vect.h +++ b/lib/librte_eal/x86/include/rte_vect.h @@ -13,6 +13,7 @@ #include #include +#include #include "generic/rte_vect.h" #if (defined(__ICC) || \ @@ -92,6 +93,24 @@ __extension__ ({ \ }) #endif /* (defined(__ICC) && __ICC < 1210) */ +#ifdef __AVX512F__ + +#define RTE_X86_ZMM_SIZE (sizeof(__m512i)) +#define RTE_X86_ZMM_MASK (RTE_X86_ZMM_SIZE - 1) + +typedef union __rte_x86_zmm { + __m512i z; + ymm_t y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)]; + xmm_t x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)]; + uint8_t u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)]; + uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)]; + uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)]; + uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)]; + double pd[RTE_X86_ZMM_SIZE / sizeof(double)]; +} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t; + +#endif /* __AVX512F__ */ + #ifdef __cplusplus } #endif -- 2.7.4