From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 861F4911B for ; Wed, 31 May 2017 11:12:55 +0200 (CEST) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 May 2017 02:12:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,422,1491289200"; d="scan'208";a="93173779" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.237.220.81]) ([10.237.220.81]) by orsmga004.jf.intel.com with ESMTP; 31 May 2017 02:12:49 -0700 To: Matej Vido Cc: dev@dpdk.org References: <1495821956-5050-1-git-send-email-vido@cesnet.cz> <1495821956-5050-3-git-send-email-vido@cesnet.cz> <88fb0928-3b53-8660-0d8b-36a27218abe6@cesnet.cz> From: Ferruh Yigit Message-ID: <687150a4-ba14-1f2c-cd34-af91ebd3f0fa@intel.com> Date: Wed, 31 May 2017 10:12:49 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <88fb0928-3b53-8660-0d8b-36a27218abe6@cesnet.cz> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH 3/5] net/szedata2: refactor ibuf and obuf address definition X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 May 2017 09:12:56 -0000 On 5/31/2017 9:33 AM, Matej Vido wrote: > On 29.05.2017 14:41, Ferruh Yigit wrote: >> On 5/26/2017 7:05 PM, Matej Vido wrote: >>> This is to prepare for firmwares with multiple ibufs and obufs. >>> Offsets of ibufs and obufs are defined in array. >> I was thinking ibufs and obufs as queues, but since link functions >> updated per ibufs it looks like ports, can you please provide some >> information what is ibufs and obufs? >> >> What is the benefit of having multiple ibufs and obufs? > Hi Ferruh, > > ibufs and obufs are the modules in FPGA firmware implementing the > Ethernet port (MAC layer, to be exact). There is one ibuf+obuf per > Ethernet port. Our cards and firmwares allow one 100GE physical port to > be one Ethernet port, or split into 10 ports of 10GE. However, all DMA > queues in the device are shared between all Ethernet ports. Packet from > any port can be passed by crossbar logic to any DMA queue (and from any > DMA queue to any port). Thank you for clarification. > > Regards, > Matej >> >>> Functions which operate on ibufs and obufs iterate over this array. >>> >>> Signed-off-by: Matej Vido >> <...> >