From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E1A8BA052A; Fri, 10 Jul 2020 23:50:03 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 622B41DC09; Fri, 10 Jul 2020 23:50:03 +0200 (CEST) Received: from wout1-smtp.messagingengine.com (wout1-smtp.messagingengine.com [64.147.123.24]) by dpdk.org (Postfix) with ESMTP id 901991DB6C for ; Fri, 10 Jul 2020 23:50:01 +0200 (CEST) Received: from compute7.internal (compute7.nyi.internal [10.202.2.47]) by mailout.west.internal (Postfix) with ESMTP id 339721665; Fri, 10 Jul 2020 17:50:00 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute7.internal (MEProxy); Fri, 10 Jul 2020 17:50:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s=fm1; bh= kyr84rfwjsb6MHbNHWXaDtRKTRJZPkwVQGSUSrmQOBU=; b=Kugi/6iMx/epTt82 XpHc9yhSKN1ymxATh5JxLD1P2c83HrHDecFA8YTttwSOUYsBQv4UmIhDqi5BW7Dy YkuXRXWWFR5GsDQPgk4u/aJtxxtxCxZ+qyyKzEGzaINKpDuvylFu2jMqrhgEO6xn 2fZpSR4V2AbbXf7N32l4y3Q1TdH8SOG9HDK9kJwvr1j3Sotj/UXP4XSKm2kZYrek onHgnB4Omb6b/ezP/bzlz10GyqRNDO2VHoLucYO47/VjzcYVAQ+Bq34VcD5DWWbI /U5VtnEfyJnCclScyjXNsPQPha1RISl3bfL1wO+tbvIMqMmP5Gf2RVszeWg43FTK DX66vw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm3; bh=kyr84rfwjsb6MHbNHWXaDtRKTRJZPkwVQGSUSrmQO BU=; b=scDyy9Ed4ZwOPFxSJ0W1OPJPoy3IeytNncdY8v/wazaYTEB/oMbHeLYWp tjHbHDxnwlXbIrniLL4wzdLhfO/oZJeyJi7CH0gbQ+cPBQO6bKp3TlhEcPzKRlG5 MbWLsauheuL/v20or6qwRlq0XDUQjUdW9bK9BC/6cMagO8NAWTCA20/AD7YuHz2n SyGncgxBs+tGRg2Zi+jCPxaw2jqcMXB0R7QXB9jQkX65kPq6fm7lPmM1Y+eKh5v2 CcGJWd8iu0eO0JjBEcO2MGLcbuV7alSPxmpL31AZVgFw1YBIGk3r4XBH3wS5jLpN AEU9PcdTgoy/Z5LbKJtRrsFdeBNGQ== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduiedrvddvgddtvdcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvffufffkjghfggfgtgesthfuredttddtvdenucfhrhhomhepvfhhohhmrghs ucfoohhnjhgrlhhonhcuoehthhhomhgrshesmhhonhhjrghlohhnrdhnvghtqeenucggtf frrghtthgvrhhnpedugefgvdefudfftdefgeelgffhueekgfffhfeujedtteeutdejueei iedvffegheenucfkphepjeejrddufeegrddvtdefrddukeegnecuvehluhhsthgvrhfuih iivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepthhhohhmrghssehmohhnjhgrlhho nhdrnhgvth X-ME-Proxy: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id 71DAB30600A9; Fri, 10 Jul 2020 17:49:58 -0400 (EDT) From: Thomas Monjalon To: Vladimir Medvedkin Cc: dev@dpdk.org, konstantin.ananyev@intel.com, bruce.richardson@intel.com, david.marchand@redhat.com, jerinj@marvell.com, mdr@ashroe.eu Date: Fri, 10 Jul 2020 23:49:57 +0200 Message-ID: <6874799.X9nVCTG8Yq@thomas> In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH v5 1/8] eal/x86: introduce AVX 512-bit type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Please Cc those who participated in the review previously. Adding Ray, Jerin, David. 10/07/2020 16:46, Vladimir Medvedkin: > New data type to manipulate 512 bit AVX values. [...] > +#ifdef __AVX512F__ > + > +#define RTE_X86_ZMM_SIZE (sizeof(__m512i)) > +#define RTE_X86_ZMM_MASK (ZMM_SIZE - 1) Why do you use tabs? > + > +typedef union __rte_x86_zmm { Double space > + __m512i z; > + ymm_t y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)]; > + xmm_t x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)]; > + uint8_t u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)]; > + uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)]; > + uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)]; > + uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)]; > + double pd[RTE_X86_ZMM_SIZE / sizeof(double)]; > +} __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t; > + > +#endif /* __AVX512F__ */ You were supposed to undef the macros above. Vladimir, after your recent contributions, it seems you are not interested in details. Please understand we have to maintain a project with consistency and good doc. Please pay attention, thanks.