From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id ED8CCA034E; Wed, 6 May 2020 23:30:00 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 68CBB1DAD8; Wed, 6 May 2020 23:30:00 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id BAA421DABF for ; Wed, 6 May 2020 23:29:58 +0200 (CEST) IronPort-SDR: pfGKl2nlTvKI5qB/zwRDoMk2fyzZrsDJPTg6lttNm1plHehGIjAuYibb7FpVsnobkmN+JZ/8Qe 49zTzhEThNNA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2020 14:29:57 -0700 IronPort-SDR: pfGcEYmGPLh3ulTMSxaTcAsmHN2Iu3f/chBmjEa4rgThHGl3FqVJ0GjldzY8Dax0s0djrLMgeF AQjwH98l0Wdw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,360,1583222400"; d="scan'208";a="461597772" Received: from fyigit-mobl.ger.corp.intel.com (HELO [10.213.197.179]) ([10.213.197.179]) by fmsmga005.fm.intel.com with ESMTP; 06 May 2020 14:29:56 -0700 To: Hemant Agrawal , dev@dpdk.org References: <20200306095742.18080-1-hemant.agrawal@nxp.com> <20200504124118.22877-1-hemant.agrawal@nxp.com> <20200504124118.22877-5-hemant.agrawal@nxp.com> From: Ferruh Yigit Autocrypt: addr=ferruh.yigit@intel.com; prefer-encrypt=mutual; keydata= mQINBFXZCFABEADCujshBOAaqPZpwShdkzkyGpJ15lmxiSr3jVMqOtQS/sB3FYLT0/d3+bvy qbL9YnlbPyRvZfnP3pXiKwkRoR1RJwEo2BOf6hxdzTmLRtGtwWzI9MwrUPj6n/ldiD58VAGQ +iR1I/z9UBUN/ZMksElA2D7Jgg7vZ78iKwNnd+vLBD6I61kVrZ45Vjo3r+pPOByUBXOUlxp9 GWEKKIrJ4eogqkVNSixN16VYK7xR+5OUkBYUO+sE6etSxCr7BahMPKxH+XPlZZjKrxciaWQb +dElz3Ab4Opl+ZT/bK2huX+W+NJBEBVzjTkhjSTjcyRdxvS1gwWRuXqAml/sh+KQjPV1PPHF YK5LcqLkle+OKTCa82OvUb7cr+ALxATIZXQkgmn+zFT8UzSS3aiBBohg3BtbTIWy51jNlYdy ezUZ4UxKSsFuUTPt+JjHQBvF7WKbmNGS3fCid5Iag4tWOfZoqiCNzxApkVugltxoc6rG2TyX CmI2rP0mQ0GOsGXA3+3c1MCdQFzdIn/5tLBZyKy4F54UFo35eOX8/g7OaE+xrgY/4bZjpxC1 1pd66AAtKb3aNXpHvIfkVV6NYloo52H+FUE5ZDPNCGD0/btFGPWmWRmkPybzColTy7fmPaGz cBcEEqHK4T0aY4UJmE7Ylvg255Kz7s6wGZe6IR3N0cKNv++O7QARAQABtCVGZXJydWggWWln aXQgPGZlcnJ1aC55aWdpdEBpbnRlbC5jb20+iQJsBBMBCgBWAhsDAh4BAheABQsJCAcDBRUK CQgLBRYCAwEABQkKqZZ8FiEE0jZTh0IuwoTjmYHH+TPrQ98TYR8FAl6ha3sXGHZrczovL2tl eXMub3BlbnBncC5vcmcACgkQ+TPrQ98TYR8uLA//QwltuFliUWe60xwmu9sY38c1DXvX67wk UryQ1WijVdIoj4H8cf/s2KtyIBjc89R254KMEfJDao/LrXqJ69KyGKXFhFPlF3VmFLsN4XiT PSfxkx8s6kHVaB3O183p4xAqnnl/ql8nJ5ph9HuwdL8CyO5/7dC/MjZ/mc4NGq5O9zk3YRGO lvdZAp5HW9VKW4iynvy7rl3tKyEqaAE62MbGyfJDH3C/nV/4+mPc8Av5rRH2hV+DBQourwuC ci6noiDP6GCNQqTh1FHYvXaN4GPMHD9DX6LtT8Fc5mL/V9i9kEVikPohlI0WJqhE+vQHFzR2 1q5nznE+pweYsBi3LXIMYpmha9oJh03dJOdKAEhkfBr6n8BWkWQMMiwfdzg20JX0o7a/iF8H 4dshBs+dXdIKzPfJhMjHxLDFNPNH8zRQkB02JceY9ESEah3wAbzTwz+e/9qQ5OyDTQjKkVOo cxC2U7CqeNt0JZi0tmuzIWrfxjAUulVhBmnceqyMOzGpSCQIkvalb6+eXsC9V1DZ4zsHZ2Mx Hi+7pCksdraXUhKdg5bOVCt8XFmx1MX4AoV3GWy6mZ4eMMvJN2hjXcrreQgG25BdCdcxKgqp e9cMbCtF+RZax8U6LkAWueJJ1QXrav1Jk5SnG8/5xANQoBQKGz+yFiWcgEs9Tpxth15o2v59 gXK5Ag0EV9ZMvgEQAKc0Db17xNqtSwEvmfp4tkddwW9XA0tWWKtY4KUdd/jijYqc3fDD54ES YpV8QWj0xK4YM0dLxnDU2IYxjEshSB1TqAatVWz9WtBYvzalsyTqMKP3w34FciuL7orXP4Ai bPtrHuIXWQOBECcVZTTOdZYGAzaYzxiAONzF9eTiwIqe9/oaOjTwTLnOarHt16QApTYQSnxD UQljeNvKYt1lZE/gAUUxNLWsYyTT+22/vU0GDUahsJxs1+f1yEr+OGrFiEAmqrzpF0lCS3f/ 3HVTU6rS9cK3glVUeaTF4+1SK5ZNO35piVQCwphmxa+dwTG/DvvHYCtgOZorTJ+OHfvCnSVj sM4kcXGjJPy3JZmUtyL9UxEbYlrffGPQI3gLXIGD5AN5XdAXFCjjaID/KR1c9RHd7Oaw0Pdc q9UtMLgM1vdX8RlDuMGPrj5sQrRVbgYHfVU/TQCk1C9KhzOwg4Ap2T3tE1umY/DqrXQgsgH7 1PXFucVjOyHMYXXugLT8YQ0gcBPHy9mZqw5mgOI5lCl6d4uCcUT0l/OEtPG/rA1lxz8ctdFB VOQOxCvwRG2QCgcJ/UTn5vlivul+cThi6ERPvjqjblLncQtRg8izj2qgmwQkvfj+h7Ex88bI 8iWtu5+I3K3LmNz/UxHBSWEmUnkg4fJlRr7oItHsZ0ia6wWQ8lQnABEBAAGJAjwEGAEKACYC GwwWIQTSNlOHQi7ChOOZgcf5M+tD3xNhHwUCXqFrngUJCKxSYAAKCRD5M+tD3xNhH3YWD/9b cUiWaHJasX+OpiuZ1Li5GG3m9aw4lR/k2lET0UPRer2Jy1JsL+uqzdkxGvPqzFTBXgx/6Byz EMa2mt6R9BCyR286s3lxVS5Bgr5JGB3EkpPcoJT3A7QOYMV95jBiiJTy78Qdzi5LrIu4tW6H o0MWUjpjdbR01cnj6EagKrDx9kAsqQTfvz4ff5JIFyKSKEHQMaz1YGHyCWhsTwqONhs0G7V2 0taQS1bGiaWND0dIBJ/u0pU998XZhmMzn765H+/MqXsyDXwoHv1rcaX/kcZIcN3sLUVcbdxA WHXOktGTQemQfEpCNuf2jeeJlp8sHmAQmV3dLS1R49h0q7hH4qOPEIvXjQebJGs5W7s2vxbA 5u5nLujmMkkfg1XHsds0u7Zdp2n200VC4GQf8vsUp6CSMgjedHeF9zKv1W4lYXpHp576ZV7T GgsEsvveAE1xvHnpV9d7ZehPuZfYlP4qgo2iutA1c0AXZLn5LPcDBgZ+KQZTzm05RU1gkx7n gL9CdTzVrYFy7Y5R+TrE9HFUnsaXaGsJwOB/emByGPQEKrupz8CZFi9pkqPuAPwjN6Wonokv ChAewHXPUadcJmCTj78Oeg9uXR6yjpxyFjx3vdijQIYgi5TEGpeTQBymLANOYxYWYOjXk+ae dYuOYKR9nbPv+2zK9pwwQ2NXbUBystaGyQ== Message-ID: <688df7f2-4a84-9d69-c42c-0009467c920f@intel.com> Date: Wed, 6 May 2020 22:29:56 +0100 MIME-Version: 1.0 In-Reply-To: <20200504124118.22877-5-hemant.agrawal@nxp.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Subject: Re: [dpdk-dev] [PATCH v3 4/8] net/dpaa2: add default Rx params in devinfo X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 5/4/2020 1:41 PM, Hemant Agrawal wrote: > This patch adds default/preferred rx/tx params in dev info, > specially the advertised burst size. > > Signed-off-by: Hemant Agrawal > --- > drivers/net/dpaa/dpaa_ethdev.c | 4 ++++ > drivers/net/dpaa/dpaa_ethdev.h | 1 + > drivers/net/dpaa2/dpaa2_ethdev.c | 16 ++++++++++++++++ > drivers/net/dpaa2/dpaa2_ethdev.h | 2 ++ > 4 files changed, 23 insertions(+) > > diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c > index 5f81968d80..56eb5ec47c 100644 > --- a/drivers/net/dpaa/dpaa_ethdev.c > +++ b/drivers/net/dpaa/dpaa_ethdev.c > @@ -363,6 +363,10 @@ static int dpaa_eth_dev_info(struct rte_eth_dev *dev, > dev_tx_offloads_nodis; > dev_info->default_rxportconf.burst_size = DPAA_DEF_RX_BURST_SIZE; > dev_info->default_txportconf.burst_size = DPAA_DEF_TX_BURST_SIZE; > + dev_info->default_rxportconf.nb_queues = 1; > + dev_info->default_txportconf.nb_queues = 1; > + dev_info->default_txportconf.ring_size = CGR_TX_CGR_THRESH; > + dev_info->default_rxportconf.ring_size = CGR_RX_PERFQ_THRESH; > > return 0; > } > diff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h > index da06f1faa1..af9fc2105d 100644 > --- a/drivers/net/dpaa/dpaa_ethdev.h > +++ b/drivers/net/dpaa/dpaa_ethdev.h > @@ -42,6 +42,7 @@ > > /* RX queue tail drop threshold (CGR Based) in frame count */ > #define CGR_RX_PERFQ_THRESH 256 > +#define CGR_TX_CGR_THRESH 512 > > /*max mac filter for memac(8) including primary mac addr*/ > #define DPAA_MAX_MAC_FILTER (MEMAC_NUM_OF_PADDRS + 1) > diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c > index 4fc550a885..b70a2ac01c 100644 > --- a/drivers/net/dpaa2/dpaa2_ethdev.c > +++ b/drivers/net/dpaa2/dpaa2_ethdev.c > @@ -275,6 +275,22 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) > dev_info->max_vmdq_pools = ETH_16_POOLS; > dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL; > > + dev_info->default_rxportconf.burst_size = dpaa2_dqrr_size; > + /* same is rx size for best perf */ > + dev_info->default_txportconf.burst_size = dpaa2_dqrr_size; > + > + dev_info->default_rxportconf.nb_queues = 1; > + dev_info->default_txportconf.nb_queues = 1; > + dev_info->default_txportconf.ring_size = CONG_ENTER_TX_THRESHOLD; > + dev_info->default_rxportconf.ring_size = DPAA2_RX_DEFAULT_NBDESC; > + > + if (dpaa2_svr_family == SVR_LX2160A) { > + dev_info->speed_capa |= ETH_LINK_SPEED_25G | > + ETH_LINK_SPEED_40G | > + ETH_LINK_SPEED_50G | > + ETH_LINK_SPEED_100G; > + } 'speed_capa' is not default param, but anyway the "Speed capabilities" feature of the PMD seems marked as 'P', does it change with this update? What is missing for full support? > + > return 0; > } > > diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h > index 31dca8c7b6..2c49a7f01f 100644 > --- a/drivers/net/dpaa2/dpaa2_ethdev.h > +++ b/drivers/net/dpaa2/dpaa2_ethdev.h > @@ -24,6 +24,8 @@ > #define MAX_TX_QUEUES 16 > #define MAX_DPNI 8 > > +#define DPAA2_RX_DEFAULT_NBDESC 512 > + > /*default tc to be used for ,congestion, distribution etc configuration. */ > #define DPAA2_DEF_TC 0 > >