From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C156E454FB; Mon, 1 Jul 2024 11:52:46 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4F18140A76; Mon, 1 Jul 2024 11:52:46 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) by mails.dpdk.org (Postfix) with ESMTP id 0EF034025D for ; Mon, 1 Jul 2024 11:52:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719827565; x=1751363565; h=message-id:date:subject:to:cc:references:from: in-reply-to:content-transfer-encoding:mime-version; bh=JdZkb8Y21AVub6EsFdIOEqO2FrjWbDtugTzC3n3GBl0=; b=jt5v6V5lA9D5VsHw/N0353difskW/RGEXfqf1mBGKF7w54iyZqT0WF3w 1Zj4mJcQo3OhgRxygieEu4vC75r0hnuNF3NHa3Cf4MQNXdNycP3XV9EBH qxTBAG+uiKYWU+N3D5UtsTACmStasu+147Ikv/ziAeHLOIgv3h2sUUtbT 3KDVBViC6LyRtgrJrJQ2Kn/oVzMN9xbh0l4kAGFxjkPrGGbM4QWetVffE dWeHuDDa21lSY8du3fCN38ZMUvjA+NCEyEBMJQnreCyG8epxbXwFfFzGM 2GeZqPRtpfT7y2bG7PQqEfDz9aPTycWS8GtGyqyHwqqgkyV+oi0S6sWJJ A==; X-CSE-ConnectionGUID: hmEYbV4JT266G9Wh5jIR+w== X-CSE-MsgGUID: N7uGJWHuR8GlNiiRmiBoiQ== X-IronPort-AV: E=McAfee;i="6700,10204,11119"; a="27626369" X-IronPort-AV: E=Sophos;i="6.09,175,1716274800"; d="scan'208";a="27626369" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2024 02:52:41 -0700 X-CSE-ConnectionGUID: /YbyrFw5SBCwX9rnVkHt8g== X-CSE-MsgGUID: KnmeiUXeRQeRZjlNhi4Mfg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,175,1716274800"; d="scan'208";a="45364431" Received: from fmsmsx602.amr.corp.intel.com ([10.18.126.82]) by fmviesa007.fm.intel.com with ESMTP/TLS/AES256-GCM-SHA384; 01 Jul 2024 02:52:41 -0700 Received: from fmsmsx610.amr.corp.intel.com (10.18.126.90) by fmsmsx602.amr.corp.intel.com (10.18.126.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 1 Jul 2024 02:52:40 -0700 Received: from FMSEDG603.ED.cps.intel.com (10.1.192.133) by fmsmsx610.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39 via Frontend Transport; Mon, 1 Jul 2024 02:52:40 -0700 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (104.47.58.174) by edgegateway.intel.com (192.55.55.68) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Mon, 1 Jul 2024 02:52:40 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=mzV1VnLTwGl6M6JuTHm0MYQU28Hf1TPr1eSB0ziq6I5GZOsirrvHDB7g+fC3dfQoY1iV8kjhVoGDNF7P51SBaEWfh3dh2rKuXrvoKtKcOwhHkVNvmroBkD3D9wqREdybaEq2Rtc2DQxxLTGMSbZe43ui+YsoVTMZxZ/MOo8vrL6RnmljXQMS8jQkfYzQm6RyNbqp+2ZeMvrqipAVcxgMDUo0TuhFtY3YwuAIdjAErOJL5NE8hTJl46PhNfIo22N/r1cY6CWKDZaETrMHPlcujJNIkmJv9HaL/OEeUHF4m7HS1a359Sx3KSfESCiFiGvjzr82wdyGJ4GhrGToXpBVkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=k5TunlqE6O4PCCzrlFMEPrQQeiKkoRfWkbfZgIaOvug=; b=TBC1U5OEKX55ZcyojNPZteOVi+bfZYyYLX8vJ5X65KeQ4RC/I4zRpnjVqy23zYlwY8jVJ9rkfpwSpJJL5Is1fK4avaHz/27DjZZQaKUoTffmildkaDg6I9nHMzOIpD9iOtRWUslPrNSGLNDoZKfjXUOEw7ZDw7UGboBjOyEBbzB2PT2EH6S0XeBHmX0m2gln8RYgdzJNxTAb0ntIDPlI1K0NeWD13yWozGxYwmKuwUJURi30Fj8Yo28jB0Gno2luuoKD0pX1/6JYkj/R2uDlLBGl64P6LYnLwnSBJXn6VWmTCUkpjPiARO28BFVdicmYWyNL+jt62B5upF3Om7qCLA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from SJ0PR11MB5772.namprd11.prod.outlook.com (2603:10b6:a03:422::8) by CY8PR11MB7921.namprd11.prod.outlook.com (2603:10b6:930:7d::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7719.29; Mon, 1 Jul 2024 09:52:38 +0000 Received: from SJ0PR11MB5772.namprd11.prod.outlook.com ([fe80::5851:319:3da6:850b]) by SJ0PR11MB5772.namprd11.prod.outlook.com ([fe80::5851:319:3da6:850b%4]) with mapi id 15.20.7719.029; Mon, 1 Jul 2024 09:52:38 +0000 Message-ID: <69ae7bfe-be7f-482d-ba5e-2ed094a5f05e@intel.com> Date: Mon, 1 Jul 2024 10:52:33 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] net/i40e: support FEC feature To: Zhichao Zeng , CC: , Qiming Yang , Yuying Zhang References: <20240306104135.2805774-1-zhichaox.zeng@intel.com> <20240411092945.1068587-1-zhichaox.zeng@intel.com> Content-Language: en-US From: "Medvedkin, Vladimir" In-Reply-To: <20240411092945.1068587-1-zhichaox.zeng@intel.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: DUZPR01CA0213.eurprd01.prod.exchangelabs.com (2603:10a6:10:4b4::27) To SJ0PR11MB5772.namprd11.prod.outlook.com (2603:10b6:a03:422::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ0PR11MB5772:EE_|CY8PR11MB7921:EE_ X-MS-Office365-Filtering-Correlation-Id: b8fed388-813b-407a-0956-08dc99b38a58 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?QlNuTzdqM2pRV05IUXd4UnlYaFd6d3g2aERYeHNMUCtMZThmM05sbXFGZ3cy?= =?utf-8?B?NWtTTXR2K3FEazgyR2FTaEFBemRQR3ZQVkZKazZIQVoyK3lSdk04VTJSUUE4?= =?utf-8?B?OEVKRHN6b1VVdTUzekVUVENHVW0xazRzVGtiZ1Q0YTF2TXZlV0dGU2tDbW81?= =?utf-8?B?eHlheUNJSnVPU29sRlBDRFlPbEhXMHkxRlV2NzZQTFVWWlNiMHpOcDBSa3J0?= =?utf-8?B?QjBCNXdTYm1EQU1QdDhsdzU2dUMwbW1pQUdMZEdlazJla1EvbkZDbFYvS3VI?= =?utf-8?B?MEo4SVlqMVVLSkwwcEZ4L0tHdmtCclFRSnZScHVFK1lqMFYvQW1zZHFTYTNF?= =?utf-8?B?RG9sdk52SDhTOFkxa3lWNkZ0ekd3V2gxRXRpK1dBN1Rqb3FPNHoyREtrL2xy?= =?utf-8?B?NVltMFhESlVDbUdoOXh3bFV1dnZzWVR6TzEvVy9BdXVDWHl6Q09WUmU3ZU1y?= =?utf-8?B?Z2pNZWNyR3R1TTMzVHNZaGV4cXZOQnEzQ09leXR2RGZudjhOOTYvbXBoK0Iy?= =?utf-8?B?cUJTaGphejVHQ3B5bjgvMnVSb2ZTSURNekFPL2ZrWU5wdForUUFabWRGbUYw?= =?utf-8?B?VTk3dGVxNWlOUkdqNFpQaXFqNXVPellkNFFNUXNRRkh2OGVPcndKckdMMnZ1?= =?utf-8?B?QWVVMGJzQVQwUzJDY05NYnNycURLZTVZVTh6M2tISTdHL0RXZTM1dXJBaGZB?= =?utf-8?B?eS9IWkozNElibmFiaENac2dta1lHQlVlUkdPRWZvejhTR1FrSTkrZGVub09T?= =?utf-8?B?QlhUdkV5ZTRXZTdnS3R6Q0ZNQUk5NTNaNVQ3dGZ6NXFrUzRRb0JSUjhnWVk3?= =?utf-8?B?TWtrVStsRy9XWFhWZEFscVZoSS9XY2o1bUtNYVdsTS9RYjRjR3IwaVVXNzVO?= =?utf-8?B?Mi9UM21nb1J3UUNkcnc1UGM1eVRwSDgwSXFyT1VPM3gxMnBnQkUrbG9yT203?= =?utf-8?B?ajlMdzF0dnR6dHE3bjM3cDltRXFjeUVGNnQ0ZjN1MmRQL3M0NDRWRDZXYWRk?= =?utf-8?B?a2NWb3B5L25WczB0Ym9nWDhIV1g4U01nVFY1dW5lQk5tVUhPN0R1eW9mbXRQ?= =?utf-8?B?VldKc0xTejRHaHZld1QxMzJmU3Q5OHErVDIvNE1CM0J2cDdpU0Fla1J5TytK?= =?utf-8?B?UFlwZjhnb29BakpZUnRNblFualdFSHlXZVZWN09PTU5KbmZyZjBoTmhHTXZl?= =?utf-8?B?NDhGK3d1K1VOTzJwU1YxMWVockYvRHVZdFlzNVFvVG1qN3RyNERDUUMxNXlQ?= =?utf-8?B?UEFsaWRYWWZMb1JjMG42bXlNWGkxdE5VanFyeittSlNNNk05UmZya2lQN0tq?= =?utf-8?B?QVdnSHNEUFVmOEhQUEk5UTRSZXU5Tm9kM1dEWkJZVldzMnAyME5JcTEvd3Fa?= =?utf-8?B?Wm1MOHdNWENYV0dDclR2cVRuS1RLYnlhUExlMUl2N2ZCNGx4TkxkakszVC9m?= =?utf-8?B?djhGL3RWTmJYdWxUeUU1eGpkRDlCMHluYjNsVU1waTMvdElTVjlrWjVFZEZ4?= =?utf-8?B?ZTFwRk0zd051LzhTU1U2VkZnOG1qL3RXOTFBQ05RbmI5QUNMd25DOVhPV2to?= =?utf-8?B?ZkhhZmRoOWJhWTFoVzRLdjlNQ2VPMlVSV1JadU5NNFplSmRkU3dvU3o1MnQ0?= =?utf-8?B?a0NVYUtFWDFucERkeHZxN2NnNm95STJQbTNVTlZIbE5mTUpKVkxlWnBOeW9V?= =?utf-8?B?NDZQcDlOM085TjJ6SWp3Zi9sZkF6enBJZzdDdkh3dXA5T2xqd2wvZUx6YTl6?= =?utf-8?B?QTdtUytUZ2ZwcEYrSEFQdUJ3d0ViMUFZM2VvWHBGelpEV1NNK1Q4K2RMUkk5?= =?utf-8?B?RTUrME1aaTBjb3ZaeWlaQT09?= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:SJ0PR11MB5772.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(366016)(1800799024)(376014); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?Myt3eUU4NWJwS2RjK050RHFiKzQ4QXd6cUNZOUMvRmttTlBOZmRGUTl3VnR4?= =?utf-8?B?dUF4dXVKNHkwWE0zMnBHRFBFUWtuWklXQzlQRTB1WHRTTDdyNjVXU0ZUcUtn?= =?utf-8?B?ZlhOTGNvTWhJT2dDTFlYcnpPWW4zNi85Vm9LSG9IRkluKzg0UTNQWE5HOE5H?= =?utf-8?B?WE1GUUM4c1EvcXVpV0NZTHh0anlRZklac3RNU1g5Q0lVVktFeTZiL1BwVGp6?= =?utf-8?B?cTRiWXo3cUZudE9ENE9CcEJSaTFac0hIRUZHWDNnaTZENTg0U2N5aWxINTAy?= =?utf-8?B?cVlGYnNCZ0ZSQkd6alFxbDVpL3JoMGhpdVJTTHc4NmFKRnNzUDNjd0paRGJD?= =?utf-8?B?Qi9uTllGM09pNXluTXBHbVhmbjZjNzY1TTVLTEVCWmsxRjZxUDhDeGgzZHRW?= =?utf-8?B?dWxHMUNJNnlqY2tqbGNFTTZPUnA3QmJpTi9GR1pWQUoyZGozTTcyVkc4TUVX?= =?utf-8?B?dmJpMDlmUkM3YzIrYUhqWkdCRmxVQ2FzMmExTmFEYXNSMWZSaDZ5NDZUWGpx?= =?utf-8?B?YVFvQU04U251elc3OWVEUGZGbkNwNFNwbVh4OElGMHpBRHBMY3NaQXFCWUtn?= =?utf-8?B?TWtZWms4TEtmUHNPYVJoV3VEYlF6L2oycnVTTEZoT1BFTEFKQjF2QVRHZXRW?= =?utf-8?B?cU9ZZEZjdEFwdTl0dUJ5R1ExMzV2OTVJaVd3ZmFpZ2NHcXVxR2VwYklxOVE5?= =?utf-8?B?dnpBMUNMbTM1VWpWc0wvMzZZLzRKOS9lYlVLNVVkU25oYkxhVTZMVVp0dHB0?= =?utf-8?B?QlBQY201VVREbkNxSEl5ZmdUTnNIZDBGU1dhZnZjRnpIdm9ZNU5qZUtpbFdM?= =?utf-8?B?QmZyVGJ4WWZtcjdPUkw2NzNKVmZvdTlBMmNOd0lDMm11QkJIdmZPYm01RXdm?= =?utf-8?B?amlnM0N1bEEzN3pIL3dxUXMvQmtlLzlpNjB2aTdJcG11OFRvM29Id0orODBH?= =?utf-8?B?c3pMNHVkQnN6V1hYVlZhN0JBdVZWWHNwdVdwMC9YZGVaN05yYjZkWkhhcXQ2?= =?utf-8?B?bFNTR1lIbGR4Y0JDQnU0UjdkbkxyLzlabU5ycnF6bzVxZ3E0UHllWkRuWjh1?= =?utf-8?B?SWFhRHM5OXRJaE1TWGZyK1ZVNEplR0ljNm9oblEvOERzZFF1eHZVWUV4WGVm?= =?utf-8?B?cnFENVVQZkw0Um1xbG1mSEpISUhaTnVmWE9CYlpTWkZDV0lpOHRXUlBoT01a?= =?utf-8?B?SzBnVGRyeW5QaWZ2eGN4dVN6MHlpUVFFVkhoNlZ3MEFUTVVoRWg4ZkV5cGFi?= =?utf-8?B?eGlNL2N5QkF5MXBuc1NMUWVOUU11bmJGclVOaHFvWElrdW00R29keHRDSTdh?= =?utf-8?B?TXZ5SURTRlB4S3U1S1A3Q1ovNWdZdDRlSW9pMkNIc2tYTDlzUGFGdzE0ZUh4?= =?utf-8?B?bWhXeHVzcmp5NEdjK01QYmhBM2NlLzBCNGNrZG50QnFSNmlkQVFvbEdrQjcr?= =?utf-8?B?UVFzS1dVNUJjd29xTFJ4ZVZzdlJFQ1Z3azlIQ3Y2ZnRZcWNWcmFmZjFJTVNi?= =?utf-8?B?WlpZeUZmVDlnMTNlYW0xeWFIZWFhNjd3U1dwUjlZV3JQeURjMUVlN3d3NXdp?= =?utf-8?B?MjNLN0NCcGxlSkRCVU92T2FmVm1rZEllanRKY1hEUDdUd2VoakZKVlV0ZzlY?= =?utf-8?B?ZlZ4MEY2emRjdjYzRmNudnhGS1gxNU1kTXBRNll5dGVQanhqSlpSdVF5RlR5?= =?utf-8?B?Ulc4SGRjNk1ZYVVrbHNXU0FxbHUvVVlJbmZlQmZrdERJVEZhd2d0c2I4TjVI?= =?utf-8?B?MzA4VWJQVlhHcThuWEVNQmdWUXlJM2loMXM2TGUzM1V5cThQL2tlQlZUa09Q?= =?utf-8?B?cThkVDU1ZFRCWTBZOUttU1ZYYkhobjUyTjlzRituSndlY0J2amJ2WCtDUjMr?= =?utf-8?B?TnNhNm9yVzhWSTcvbzdsSUJobWpGcXNJa2JqeGhHYXpKQUpVVXAzUHBNQjU1?= =?utf-8?B?d1orbVdKa2ZFV28rRW5QSFY1VEJtMUJCcVZoZVNrT2RFTllUQm1hdWNkWGNJ?= =?utf-8?B?NnVHRkNYencrWWxhdVd6QmliVGZ6K0p6OUJ6U1hSV0o3WUJZSHFTTm5jUFhk?= =?utf-8?B?ODlpOWtZVDlxZ1k4R1VsaHZuVEp0dDNMTnM4cjhPcmp6RnVwZFBwaUQvRHFG?= =?utf-8?B?UXhjb1Z1NHRRTlpYOTN2UW10c0ZHSXlhbHJyRGlsRnVjS0VCSFpMR1FQRWVP?= =?utf-8?B?aEE9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: b8fed388-813b-407a-0956-08dc99b38a58 X-MS-Exchange-CrossTenant-AuthSource: SJ0PR11MB5772.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2024 09:52:38.1213 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: YT1WrrvkJ0MOgy8vYQTHDI1odowTt+gSsgzLjKUjYgRP3p/xMlkNg3KXz78fnFOCgJQp0DyxYFjsgbWEFfYZIFOE7bYm4KkP8ZJ/f2zA2ac= X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR11MB7921 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi Zhichao, On 11/04/2024 10:29, Zhichao Zeng wrote: > This patch enabled querying Forward Error Correction(FEC) capabilities, > set FEC mode and get current FEC mode functions. > > Signed-off-by: Qiming Yang > Signed-off-by: Zhichao Zeng > > --- > v5: fix some judgments > v4: fix some logic > v3: optimize code details > v2: update NIC feature document > --- > doc/guides/nics/features/i40e.ini | 1 + > doc/guides/rel_notes/release_24_07.rst | 4 + > drivers/net/i40e/i40e_ethdev.c | 237 +++++++++++++++++++++++++ > 3 files changed, 242 insertions(+) > > diff --git a/doc/guides/nics/features/i40e.ini b/doc/guides/nics/features/i40e.ini > index ef7514c44b..4610444ace 100644 > --- a/doc/guides/nics/features/i40e.ini > +++ b/doc/guides/nics/features/i40e.ini > @@ -32,6 +32,7 @@ Traffic manager = Y > CRC offload = Y > VLAN offload = Y > QinQ offload = P > +FEC = Y > L3 checksum offload = P > L4 checksum offload = P > Inner L3 checksum = P > diff --git a/doc/guides/rel_notes/release_24_07.rst b/doc/guides/rel_notes/release_24_07.rst > index a69f24cf99..1e65f70d6c 100644 > --- a/doc/guides/rel_notes/release_24_07.rst > +++ b/doc/guides/rel_notes/release_24_07.rst > @@ -55,6 +55,10 @@ New Features > Also, make sure to start the actual text at the margin. > ======================================================= > > +* **Updated Intel i40e driver.** > + > + * Added support for configuring the Forward Error Correction(FEC) mode, querying > + * FEC capabilities and current FEC mode from a device. > > Removed Items > ------------- > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c > index 380ce1a720..bc4a62f64b 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -406,6 +406,10 @@ static void i40e_ethertype_filter_restore(struct i40e_pf *pf); > static void i40e_tunnel_filter_restore(struct i40e_pf *pf); > static void i40e_filter_restore(struct i40e_pf *pf); > static void i40e_notify_all_vfs_link_status(struct rte_eth_dev *dev); > +static int i40e_fec_get_capability(struct rte_eth_dev *dev, > + struct rte_eth_fec_capa *speed_fec_capa, unsigned int num); > +static int i40e_fec_get(struct rte_eth_dev *dev, uint32_t *fec_capa); > +static int i40e_fec_set(struct rte_eth_dev *dev, uint32_t fec_capa); > > static const char *const valid_keys[] = { > ETH_I40E_FLOATING_VEB_ARG, > @@ -521,6 +525,9 @@ static const struct eth_dev_ops i40e_eth_dev_ops = { > .tm_ops_get = i40e_tm_ops_get, > .tx_done_cleanup = i40e_tx_done_cleanup, > .get_monitor_addr = i40e_get_monitor_addr, > + .fec_get_capability = i40e_fec_get_capability, > + .fec_get = i40e_fec_get, > + .fec_set = i40e_fec_set, > }; > > /* store statistics names and its offset in stats structure */ > @@ -12297,6 +12304,236 @@ i40e_cloud_filter_qinq_create(struct i40e_pf *pf) > return ret; > } > > +static int > +i40e_fec_get_capability(struct rte_eth_dev *dev, > + struct rte_eth_fec_capa *speed_fec_capa, __rte_unused unsigned int num) > +{ > + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + > + if (hw->mac.type == I40E_MAC_X722 && > + !(hw->flags & I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE)) { > + PMD_DRV_LOG(ERR, "Setting FEC encoding not supported by" > + " firmware. Please update the NVM image.\n"); > + return -ENOTSUP; > + } > + > + if (hw->device_id == I40E_DEV_ID_25G_SFP28 || > + hw->device_id == I40E_DEV_ID_25G_B) { > + if (speed_fec_capa) { > + speed_fec_capa->speed = RTE_ETH_SPEED_NUM_25G; > + speed_fec_capa->capa = RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC) | > + RTE_ETH_FEC_MODE_CAPA_MASK(BASER) | > + RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) | > + RTE_ETH_FEC_MODE_CAPA_MASK(RS); > + } > + > + /* since HW only supports 25G */ > + return 1; > + } else if (hw->device_id == I40E_DEV_ID_KX_X722) { > + if (speed_fec_capa) { > + speed_fec_capa->speed = RTE_ETH_SPEED_NUM_25G; > + speed_fec_capa->capa = RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) | > + RTE_ETH_FEC_MODE_CAPA_MASK(RS); > + } > + return 1; > + } > + > + return -ENOTSUP; > +} > + > +static int > +i40e_fec_get(struct rte_eth_dev *dev, uint32_t *fec_capa) > +{ > + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + struct i40e_aq_get_phy_abilities_resp abilities = {0}; > + struct i40e_link_status link_status = {0}; > + uint8_t current_fec_mode = 0, fec_config = 0; > + bool link_up, enable_lse; > + int ret = 0; > + > + enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false; > + /* Get link info */ > + ret = i40e_aq_get_link_info(hw, enable_lse, &link_status, NULL); > + if (ret != I40E_SUCCESS) { > + PMD_DRV_LOG(ERR, "Failed to get link information: %d\n", > + ret); > + return -ENOTSUP; > + } > + > + link_up = link_status.link_info & I40E_AQ_LINK_UP; > + > + ret = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, > + NULL); > + if (ret) { > + PMD_DRV_LOG(ERR, "Failed to get PHY capabilities: %d\n", > + ret); > + return -ENOTSUP; > + } > + > + /** > + * If link is down and AUTO is enabled, AUTO is returned, > + * otherwise, configured FEC mode is returned. > + * If link is up, current FEC mode is returned. > + */ > + fec_config = abilities.fec_cfg_curr_mod_ext_info; needs masking with I40E_AQ_PHY_FEC_CONFIG_MASK > + current_fec_mode = link_status.fec_info; > + > + if (link_up) { > + switch (current_fec_mode) { > + case I40E_AQ_CONFIG_FEC_KR_ENA: > + *fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_BASER); > + break; > + case I40E_AQ_CONFIG_FEC_RS_ENA: > + *fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_RS); > + break; > + case 0: > + *fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_NOFEC); > + break; > + default: > + return -EINVAL; > + } > + return 0; > + } > + > + if (fec_config & I40E_AQ_ENABLE_FEC_AUTO) { > + *fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_AUTO); > + return 0; > + } > + > + uint32_t temp_fec_capa = 0; > + if (fec_config & I40E_AQ_ENABLE_FEC_KR) > + temp_fec_capa |= RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_BASER); > + if (fec_config & I40E_AQ_ENABLE_FEC_RS) > + temp_fec_capa |= RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_RS); > + if (temp_fec_capa == 0) > + temp_fec_capa = RTE_ETH_FEC_MODE_TO_CAPA(RTE_ETH_FEC_NOFEC); > + > + *fec_capa = temp_fec_capa; > + return 0; > +} > + > +static int > +i40e_fec_set(struct rte_eth_dev *dev, uint32_t fec_capa) > +{ > + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); > + struct i40e_aq_get_phy_abilities_resp abilities = {0}; > + struct i40e_aq_set_phy_config config = {0}; > + enum i40e_status_code status; > + uint8_t req_fec = 0, fec_auto = 0, fec_kr = 0, fec_rs = 0; > + > + if (hw->device_id != I40E_DEV_ID_25G_SFP28 && > + hw->device_id != I40E_DEV_ID_25G_B && > + hw->device_id != I40E_DEV_ID_KX_X722) { > + return -ENOTSUP; > + } > + > + if (hw->mac.type == I40E_MAC_X722 && > + !(hw->flags & I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE)) { > + PMD_DRV_LOG(ERR, "Setting FEC encoding not supported by" > + " firmware. Please update the NVM image.\n"); > + return -ENOTSUP; > + } > + > + /** > + * Copy the current user PHY configuration. The current user PHY > + * configuration is initialized during probe from PHY capabilities > + * software mode, and updated on set PHY configuration. > + */ > + if (fec_capa == 0) > + return -EINVAL; not necessary since it was checked in rte_eth_fec_set(). But it's worth checking out if (fec_capa & ~(RTE_ETH_FEC_MODE_CAPA_MASK(AUTO)|RTE_ETH_FEC_MODE_CAPA_MASK(BASER)|RTE_ETH_FEC_MODE_CAPA_MASK(RS)) ) > + > + if (fec_capa & RTE_ETH_FEC_MODE_CAPA_MASK(AUTO)) > + fec_auto = 1; > + > + if (fec_capa & RTE_ETH_FEC_MODE_CAPA_MASK(BASER)) > + fec_kr = 1; > + > + if (fec_capa & RTE_ETH_FEC_MODE_CAPA_MASK(RS)) > + fec_rs = 1; > + > + if (fec_auto) { > + if (hw->mac.type == I40E_MAC_X722) { > + PMD_DRV_LOG(ERR, "X722 Unsupported FEC mode: AUTO"); > + return -EINVAL; > + } > + if (fec_kr || fec_rs) { > + if (fec_kr) > + req_fec = I40E_AQ_SET_FEC_ABILITY_KR | > + I40E_AQ_SET_FEC_REQUEST_KR; > + if (fec_rs) { > + if (hw->mac.type == I40E_MAC_X722) { > + PMD_DRV_LOG(ERR, "X722 Unsupported FEC mode: RS"); > + return -EINVAL; > + } > + req_fec = I40E_AQ_SET_FEC_ABILITY_RS | > + I40E_AQ_SET_FEC_REQUEST_RS; shouldn't here be "req_fec |=" instead of "rec_fec ="? In case of both KR and RS, the latter rewrites the former. > + } > + } else { > + if (hw->mac.type == I40E_MAC_X722) { > + req_fec = I40E_AQ_SET_FEC_ABILITY_KR | > + I40E_AQ_SET_FEC_REQUEST_KR; > + } else { > + req_fec = I40E_AQ_SET_FEC_ABILITY_KR | > + I40E_AQ_SET_FEC_REQUEST_KR | > + I40E_AQ_SET_FEC_ABILITY_RS | > + I40E_AQ_SET_FEC_REQUEST_RS; > + } > + } > + } else { > + if (fec_kr ^ fec_rs) { > + if (fec_kr) { > + req_fec = I40E_AQ_SET_FEC_ABILITY_KR | > + I40E_AQ_SET_FEC_REQUEST_KR; > + } else { > + if (hw->mac.type == I40E_MAC_X722) { > + PMD_DRV_LOG(ERR, "X722 Unsupported FEC mode: RS"); > + return -EINVAL; > + } > + req_fec = I40E_AQ_SET_FEC_ABILITY_RS | > + I40E_AQ_SET_FEC_REQUEST_RS; > + } > + } else { > + return -EINVAL; > + } > + } > + > + /* Get the current phy config */ > + status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, > + NULL); > + if (status) { > + PMD_DRV_LOG(ERR, "Failed to get PHY capabilities: %d\n", > + status); > + return -ENOTSUP; > + } > + > + if (abilities.fec_cfg_curr_mod_ext_info != req_fec) { > + config.phy_type = abilities.phy_type; > + config.abilities = abilities.abilities | > + I40E_AQ_PHY_ENABLE_ATOMIC_LINK; > + config.phy_type_ext = abilities.phy_type_ext; > + config.link_speed = abilities.link_speed; > + config.eee_capability = abilities.eee_capability; > + config.eeer = abilities.eeer_val; > + config.low_power_ctrl = abilities.d3_lpan; > + config.fec_config = req_fec & I40E_AQ_PHY_FEC_CONFIG_MASK; > + status = i40e_aq_set_phy_config(hw, &config, NULL); > + if (status) { > + PMD_DRV_LOG(ERR, "Failed to set PHY capabilities: %d\n", > + status); > + return -ENOTSUP; > + } > + } > + > + status = i40e_update_link_info(hw); > + if (status) { > + PMD_DRV_LOG(ERR, "Failed to set PHY capabilities: %d\n", > + status); > + return -ENOTSUP; > + } > + > + return 0; > +} > + > RTE_LOG_REGISTER_SUFFIX(i40e_logtype_init, init, NOTICE); > RTE_LOG_REGISTER_SUFFIX(i40e_logtype_driver, driver, NOTICE); > #ifdef RTE_ETHDEV_DEBUG_RX -- Regards, Vladimir