From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 2FA73C5D4 for ; Fri, 29 Jan 2016 09:07:09 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 29 Jan 2016 00:07:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,362,1449561600"; d="scan'208";a="891703622" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga001.fm.intel.com with ESMTP; 29 Jan 2016 00:07:08 -0800 Received: from fmsmsx118.amr.corp.intel.com (10.18.116.18) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 29 Jan 2016 00:07:07 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx118.amr.corp.intel.com (10.18.116.18) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 29 Jan 2016 00:07:07 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.172]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.117]) with mapi id 14.03.0248.002; Fri, 29 Jan 2016 16:07:05 +0800 From: "Lu, Wenzhuo" To: "Qiu, Michael" , "dev@dpdk.org" Thread-Topic: [PATCH v2] ixgbe: Fix disable interrupt twice Thread-Index: AQHRWloksNIBUDcxCEWR7L8w6ZQ5Bp8SIaSg Date: Fri, 29 Jan 2016 08:07:05 +0000 Message-ID: <6A0DE07E22DDAD4C9103DF62FEBC0909034256DA@shsmsx102.ccr.corp.intel.com> References: <1454046700-20843-1-git-send-email-michael.qiu@intel.com> <1454047090-21274-1-git-send-email-michael.qiu@intel.com> In-Reply-To: <1454047090-21274-1-git-send-email-michael.qiu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] ixgbe: Fix disable interrupt twice X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Jan 2016 08:07:09 -0000 Hi Michael, > -----Original Message----- > From: Qiu, Michael > Sent: Friday, January 29, 2016 1:58 PM > To: dev@dpdk.org > Cc: Zhou, Danny; Liu, Yong; Liang, Cunming; Lu, Wenzhuo; Qiu, Michael > Subject: [PATCH v2] ixgbe: Fix disable interrupt twice >=20 > Currently, ixgbe vf and pf will disable interrupt twice in stop stage and= uninit > stage. It will cause an error: >=20 > testpmd> quit >=20 > Shutting down port 0... > Stopping ports... > Done > Closing ports... > EAL: Error disabling MSI-X interrupts for fd 26 > Done >=20 > Becasue the interrupt already been disabled in stop stage. > Since it is enabled in init stage, better remove from stop stage. I'm afraid it's not a good idea to just remove the intr_disable from dev_st= op. I think dev_stop have the chance to be used independently with dev_unint. I= n this scenario, we still need intr_disable, right? Maybe what we need is some check before we disable the intr:)