From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 64DA8137C for ; Tue, 2 Feb 2016 02:03:53 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP; 01 Feb 2016 17:03:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,382,1449561600"; d="scan'208";a="906312627" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga002.fm.intel.com with ESMTP; 01 Feb 2016 17:03:53 -0800 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 1 Feb 2016 17:03:52 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx110.amr.corp.intel.com (10.18.116.10) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 1 Feb 2016 17:03:51 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.172]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.218]) with mapi id 14.03.0248.002; Tue, 2 Feb 2016 09:03:49 +0800 From: "Lu, Wenzhuo" To: "Qiu, Michael" , "dev@dpdk.org" Thread-Topic: [PATCH v2] ixgbe: Fix disable interrupt twice Thread-Index: AQHRWloksNIBUDcxCEWR7L8w6ZQ5Bp8X9KLg Date: Tue, 2 Feb 2016 01:03:49 +0000 Message-ID: <6A0DE07E22DDAD4C9103DF62FEBC0909034266D1@shsmsx102.ccr.corp.intel.com> References: <1454046700-20843-1-git-send-email-michael.qiu@intel.com> <1454047090-21274-1-git-send-email-michael.qiu@intel.com> <6A0DE07E22DDAD4C9103DF62FEBC0909034256DA@shsmsx102.ccr.corp.intel.com> <533710CFB86FA344BFBF2D6802E6028622F28091@SHSMSX101.ccr.corp.intel.com> In-Reply-To: <533710CFB86FA344BFBF2D6802E6028622F28091@SHSMSX101.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] ixgbe: Fix disable interrupt twice X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Feb 2016 01:03:53 -0000 Hi Michael, > -----Original Message----- > From: Qiu, Michael > Sent: Monday, February 1, 2016 4:05 PM > To: Lu, Wenzhuo; dev@dpdk.org > Cc: Zhou, Danny; Liu, Yong; Liang, Cunming > Subject: Re: [PATCH v2] ixgbe: Fix disable interrupt twice >=20 > On 1/29/2016 4:07 PM, Lu, Wenzhuo wrote: > > Hi Michael, > > > >> -----Original Message----- > >> From: Qiu, Michael > >> Sent: Friday, January 29, 2016 1:58 PM > >> To: dev@dpdk.org > >> Cc: Zhou, Danny; Liu, Yong; Liang, Cunming; Lu, Wenzhuo; Qiu, Michael > >> Subject: [PATCH v2] ixgbe: Fix disable interrupt twice > >> > >> Currently, ixgbe vf and pf will disable interrupt twice in stop stage > >> and uninit stage. It will cause an error: > >> > >> testpmd> quit > >> > >> Shutting down port 0... > >> Stopping ports... > >> Done > >> Closing ports... > >> EAL: Error disabling MSI-X interrupts for fd 26 > >> Done > >> > >> Becasue the interrupt already been disabled in stop stage. > >> Since it is enabled in init stage, better remove from stop stage. > > I'm afraid it's not a good idea to just remove the intr_disable from de= v_stop. > > I think dev_stop have the chance to be used independently with dev_unin= t. In > this scenario, we still need intr_disable, right? > > Maybe what we need is some check before we disable the intr:) >=20 > Yes, indeed we need some check in disable intr, but it need additional fi= elds in > "struct rte_intr_handle", and it's much saft to do so, but as I check i4= 0e/fm10k > code, only ixgbe disable it in dev_stop(). I found fm10k doesn't enable intr in dev_start. So, I think it's OK. But i4= 0e enables intr in dev_start. To my opinion, it's more like i40e misses the intr_disable in dev_stop. Maybe we can follow fm10k's style. >=20 > On other hand, if we remove it in dev_stop, any side effect? In ixgbe sta= rt, it will > always disable it first and then re-enable it, so it's safe. I think you mean we can disable intr anyway even if it has been disabled. S= ounds more like why we don't need this patch :) >=20 > Thanks, > Michael > >