From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 649122B86 for ; Thu, 2 Mar 2017 02:28:26 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2017 17:28:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,228,1484035200"; d="scan'208";a="1103794217" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga001.jf.intel.com with ESMTP; 01 Mar 2017 17:28:24 -0800 Received: from fmsmsx125.amr.corp.intel.com (10.18.125.40) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 1 Mar 2017 17:28:24 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX125.amr.corp.intel.com (10.18.125.40) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 1 Mar 2017 17:28:24 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.88]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.204]) with mapi id 14.03.0248.002; Thu, 2 Mar 2017 09:28:22 +0800 From: "Lu, Wenzhuo" To: Olivier Matz , "dev@dpdk.org" , "thomas.monjalon@6wind.com" , "Ananyev, Konstantin" , "Zhang, Helin" , "Wu, Jingjing" , "adrien.mazarguil@6wind.com" , "nelio.laranjeiro@6wind.com" CC: "Yigit, Ferruh" , "Richardson, Bruce" Thread-Topic: [PATCH 3/6] net/e1000: implement descriptor status API (igb) Thread-Index: AQHSkrAavShrPhcLH0m38GvZKnUl9aGAws2Q Date: Thu, 2 Mar 2017 01:28:21 +0000 Message-ID: <6A0DE07E22DDAD4C9103DF62FEBC09093B569F84@shsmsx102.ccr.corp.intel.com> References: <1479981261-19512-1-git-send-email-olivier.matz@6wind.com> <1488388752-1819-1-git-send-email-olivier.matz@6wind.com> <1488388752-1819-4-git-send-email-olivier.matz@6wind.com> In-Reply-To: <1488388752-1819-4-git-send-email-olivier.matz@6wind.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 3/6] net/e1000: implement descriptor status API (igb) X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Mar 2017 01:28:26 -0000 Hi Olivier, > -----Original Message----- > From: Olivier Matz [mailto:olivier.matz@6wind.com] > Sent: Thursday, March 2, 2017 1:19 AM > To: dev@dpdk.org; thomas.monjalon@6wind.com; Ananyev, Konstantin; Lu, > Wenzhuo; Zhang, Helin; Wu, Jingjing; adrien.mazarguil@6wind.com; > nelio.laranjeiro@6wind.com > Cc: Yigit, Ferruh; Richardson, Bruce > Subject: [PATCH 3/6] net/e1000: implement descriptor status API (igb) >=20 > Signed-off-by: Olivier Matz > + > +int > +eth_igb_tx_descriptor_status(struct rte_eth_dev *dev, uint16_t tx_queue_= id, > + uint16_t offset) > +{ > + volatile uint32_t *status; > + struct igb_tx_queue *txq; > + uint32_t desc; > + > + txq =3D dev->data->tx_queues[tx_queue_id]; > + if (unlikely(offset >=3D txq->nb_tx_desc)) > + return -EINVAL; > + > + desc =3D txq->tx_tail + offset; Should we check nb_tx_desc here? The same for em. > + status =3D &txq->tx_ring[desc].wb.status; > + if (*status & rte_cpu_to_le_32(E1000_TXD_STAT_DD)) > + return RTE_ETH_TX_DESC_DONE; > + > + return RTE_ETH_TX_DESC_FULL; > +} > + > void > igb_dev_clear_queues(struct rte_eth_dev *dev) { > -- > 2.8.1