From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id E0DD514E8; Tue, 19 Jun 2018 02:57:35 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Jun 2018 17:57:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,241,1526367600"; d="scan'208";a="233643932" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga005.jf.intel.com with ESMTP; 18 Jun 2018 17:57:32 -0700 Received: from fmsmsx153.amr.corp.intel.com (10.18.125.6) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 18 Jun 2018 17:57:32 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX153.amr.corp.intel.com (10.18.125.6) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 18 Jun 2018 17:57:31 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.223]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.70]) with mapi id 14.03.0319.002; Tue, 19 Jun 2018 08:57:30 +0800 From: "Lu, Wenzhuo" To: "Zhao1, Wei" , "dev@dpdk.org" CC: "stable@dpdk.org" Thread-Topic: [PATCH v5] net/ixgbe: fix mask bits register set error for FDIR Thread-Index: AQHUBHInXGG+fZTl2kq7arkVQ63k76Rmx/ow Date: Tue, 19 Jun 2018 00:57:29 +0000 Message-ID: <6A0DE07E22DDAD4C9103DF62FEBC09093B7EB613@shsmsx102.ccr.corp.intel.com> References: <1529032259-9718-1-git-send-email-wei.zhao1@intel.com> <1529042883-39752-1-git-send-email-wei.zhao1@intel.com> In-Reply-To: <1529042883-39752-1-git-send-email-wei.zhao1@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v5] net/ixgbe: fix mask bits register set error for FDIR X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 19 Jun 2018 00:57:36 -0000 Hi, > -----Original Message----- > From: Zhao1, Wei > Sent: Friday, June 15, 2018 2:08 PM > To: dev@dpdk.org > Cc: Lu, Wenzhuo ; stable@dpdk.org; Zhao1, Wei > > Subject: [PATCH v5] net/ixgbe: fix mask bits register set error for FDIR >=20 > MAC address bits in mask registers should be set to zero when the is mac > mask is 0xFF, otherwise if it is 0x0 these bits should be to 0x3F. >=20 > Fixes: 82fb702077f6 ("ixgbe: support new flow director modes for X550") >=20 > Signed-off-by: Wei Zhao Acked-by: Wenzhuo Lu