From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 7F32EFEB for ; Thu, 9 Aug 2018 12:49:48 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Aug 2018 03:49:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,214,1531810800"; d="scan'208";a="79878220" Received: from aburakov-mobl1.ger.corp.intel.com (HELO [10.237.220.148]) ([10.237.220.148]) by fmsmga001.fm.intel.com with ESMTP; 09 Aug 2018 03:49:45 -0700 To: Drocula , maxime.coquelin@redhat.com Cc: dev@dpdk.org References: <1533494497-16253-1-git-send-email-quzeyao@gmail.com> From: "Burakov, Anatoly" Message-ID: <6dae8866-3df9-fa11-ab08-cb553a80102a@intel.com> Date: Thu, 9 Aug 2018 11:49:45 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <1533494497-16253-1-git-send-email-quzeyao@gmail.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH] bus/pci: check if 5-level paging is enabled when testing IOMMU address width X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Aug 2018 10:49:48 -0000 On 05-Aug-18 7:41 PM, Drocula wrote: > The kernel version 4.14 released with the support of 5-level paging. > When PML5 enabled, user-space virtual addresses uses up to 56 bits. > see kernel's Documentation/x86/x86_64/mm.txt. > > Signed-off-by: Drocula > --- > drivers/bus/pci/linux/pci.c | 27 +++++++++++++++++++++++++-- > 1 file changed, 25 insertions(+), 2 deletions(-) > > diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c > index 004600f..8913d6d 100644 > --- a/drivers/bus/pci/linux/pci.c > +++ b/drivers/bus/pci/linux/pci.c > @@ -4,6 +4,7 @@ > > #include > #include > +#include > > #include > #include > @@ -553,12 +554,34 @@ > } > > #if defined(RTE_ARCH_X86) > +/* > + * Try to detect whether the system uses 5-level page table. > + */ > +static bool > +system_uses_PML5(void) > +{ > + void *page_4k, *mask = (void *)0xf0000000000000; > + page_4k = mmap(mask, 4096, PROT_READ | PROT_WRITE, > + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); > + > + if (page_4k == (void *) -1) > + return false; Shouldn't this be MAP_FAILED? > + munmap(page_4k, 4096); > + > + if ((unsigned long)page_4k & (unsigned long)mask) > + return true; > + return false; > +} > + > static bool > pci_one_device_iommu_support_va(struct rte_pci_device *dev) > { > #define VTD_CAP_MGAW_SHIFT 16 > #define VTD_CAP_MGAW_MASK (0x3fULL << VTD_CAP_MGAW_SHIFT) > -#define X86_VA_WIDTH 47 /* From Documentation/x86/x86_64/mm.txt */ > +/* From Documentation/x86/x86_64/mm.txt */ > +#define X86_VA_WIDTH_PML4 47 > +#define X86_VA_WIDTH_PML5 56 > + > struct rte_pci_addr *addr = &dev->addr; > char filename[PATH_MAX]; > FILE *fp; > @@ -589,7 +612,7 @@ > fclose(fp); > > mgaw = ((vtd_cap_reg & VTD_CAP_MGAW_MASK) >> VTD_CAP_MGAW_SHIFT) + 1; > - if (mgaw < X86_VA_WIDTH) > + if (mgaw < (system_uses_PML5() ? X86_VA_WIDTH_PML5 : X86_VA_WIDTH_PML4)) This is perhaps nitpicking and a question of personal preferences, but i think storing this in a var would be more readable than doing ternary operator inside of an if statement. > return false; > > return true; > -- Thanks, Anatoly