From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1B83EA09E4; Fri, 29 Jan 2021 12:35:50 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B23C3240134; Fri, 29 Jan 2021 12:35:49 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id BD9CB40694; Fri, 29 Jan 2021 12:35:47 +0100 (CET) IronPort-SDR: JFfc7s2AzhPrfMFcQrtfFbArNyI1kHOiWSR9W2RacNXCxsOop6mfxtQ/TrQScwFv+nJCuVqb61 dU/qQF9vFe2w== X-IronPort-AV: E=McAfee;i="6000,8403,9878"; a="167507567" X-IronPort-AV: E=Sophos;i="5.79,385,1602572400"; d="scan'208";a="167507567" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2021 03:35:43 -0800 IronPort-SDR: VEvInqfeQA1G2vSMhHbjItt23Eezurf3gzj2NdpaIqRj0K8lR1iA0tqNKemZyhjrMowt7ro68o TnlYL0Sib03w== X-IronPort-AV: E=Sophos;i="5.79,385,1602572400"; d="scan'208";a="389266595" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.197.204]) ([10.213.197.204]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jan 2021 03:35:39 -0800 To: Heinrich Kuhn , dev@dpdk.org Cc: stable@dpdk.org, Louis Peens , Simon Horman References: <20210125152544.2879-1-heinrich.kuhn@netronome.com> From: Ferruh Yigit Message-ID: <74e3109d-9604-41ff-d996-167b53a4f6ac@intel.com> Date: Fri, 29 Jan 2021 11:35:34 +0000 MIME-Version: 1.0 In-Reply-To: <20210125152544.2879-1-heinrich.kuhn@netronome.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [dpdk-stable] [PATCH] net/nfp: read chip model from PluDevice register X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 1/25/2021 3:25 PM, Heinrich Kuhn wrote: > For newer smartNIC NVRAM versions the chip model should be read from the > PluDevice register as it provides the authoritative chip model/revision. > This method of reading the chip model is backwards compatible with > legacy NVRAM versions too. > > Since the model number is purely used for reporting purposes, follow the > hardware team convention of subtracting 0x10 from the PluDevice register > to obtain the chip model/revision number. > > Fixes: c7e9729da ("net/nfp: support CPP") > Cc: stable@dpdk.org > > Signed-off-by: Heinrich Kuhn > Reviewed-by: Louis Peens > Signed-off-by: Simon Horman Applied to dpdk-next-net/main, thanks.