From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <dev-bounces@dpdk.org> Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D68D0A052A; Wed, 27 Jan 2021 00:49:59 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B8827140D24; Wed, 27 Jan 2021 00:49:59 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 863C6140D0E for <dev@dpdk.org>; Wed, 27 Jan 2021 00:49:58 +0100 (CET) IronPort-SDR: N6uLKwxXm8swtpzKjuyAjLJfWPX7iTK1vfExogvMhA+8iFQQL6eRdEuJ+Ac5E5e/s04aUy/Rnd nucG9zwB6Ndw== X-IronPort-AV: E=McAfee;i="6000,8403,9876"; a="159766453" X-IronPort-AV: E=Sophos;i="5.79,377,1602572400"; d="scan'208";a="159766453" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 15:49:57 -0800 IronPort-SDR: Gt0v48JlIFamrLHPzbKAXtuTLMZuTcHmsPq9xNxPBeOeMyvBYk3zugZOlMwUzR5ukNaeN/nXXS OvcOGPGkp30Q== X-IronPort-AV: E=Sophos;i="5.79,377,1602572400"; d="scan'208";a="362177568" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.227.53]) ([10.213.227.53]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 15:49:56 -0800 To: lironh@marvell.com, jerinj@marvell.com Cc: dev@dpdk.org References: <20201202101212.4717-1-lironh@marvell.com> <20210122191925.24308-1-lironh@marvell.com> <20210122191925.24308-27-lironh@marvell.com> From: Ferruh Yigit <ferruh.yigit@intel.com> Message-ID: <78541fad-ec6d-401a-37c8-45df28e942b0@intel.com> Date: Tue, 26 Jan 2021 23:49:48 +0000 MIME-Version: 1.0 In-Reply-To: <20210122191925.24308-27-lironh@marvell.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v2 26/37] net/mvpp2: introduce fixup for fifo overrun X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> On 1/22/2021 7:19 PM, lironh@marvell.com wrote: > From: Liron Himi <lironh@marvell.com> > > Currently the HW is configured with only one pool which its > buffer size may be larger than the rx-fifo-size. > In that situation, frame size larger than the fifo-size > is gets dropped due to fifo overrun. > this is cause because the HW works in cut-through mode which > waits to have in the fifo at least the amount of bytes as define > in the smallest pool's buffer size. > > This patch add a dummy pool which its buffer size > is very small (smaller than 64B frame). this tricks the HW and > any frame size is gets passed from the FIFO to the PP2. > > Signed-off-by: Liron Himi <lironh@marvell.com> so this is fixing the FIFO overrun, can you please provide the fixes line? And should this patch backported?