Re: [dpdk-dev] [PATCH] config: add Mellanox BlueField ARMv8 SoC

[Yongseok Koh <yskoh@mellanox.com>]

> On Jan 9, 2019, at 1:43 AM, Jerin Jacob Kollanukkaran <jerinj@marvell.com> wrote:
> 
> On Wed, 2019-01-09 at 01:32 -0800, Yongseok Koh wrote:
>> BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates
>> Mellanox ConnectX-5 interconnect and Cortex-A72 cores into a single
>> device.
>> 
>> http://www.mellanox.com/page/products_dyn?product_family=256&mtag=soc_overview
>> 
>> Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
>> ---
>> 
>> This patch should be applied after
>> 	"config: gather options for dlopen mlx dependency" [1]
>> 
>> [1] https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatches.dpdk.org%2Fpatch%2F49502&amp;data=02%7C01%7Cyskoh%40mellanox.com%7C3ff3a3dad47a470bb15d08d67616f2c9%7Ca652971c7d2e4d9ba6a4d149256f461b%7C0%7C0%7C636826238291242450&amp;sdata=f%2B0Gk34YBuoBRCn%2BMI6p1KLBnqlBWpq4rYyTwg2MsBo%3D&amp;reserved=0
>> 
>> config/defconfig_arm64-bluefield-linuxapp-gcc | 24 
> 
> Please add meson support together in this patch.

Like I mentioned in the other mail, this CPU has Implementor_ID=0x41(ARM)
and Part_Number=0xd08(Cortex-A72) for now. So, there's nothing to add for
meson build.


>> ++++++++++++++++++++++++
>> 1 file changed, 24 insertions(+)
>> create mode 100644 config/defconfig_arm64-bluefield-linuxapp-gcc
>> 
>> diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc
>> b/config/defconfig_arm64-bluefield-linuxapp-gcc
>> new file mode 100644
>> index 0000000000..8494a33641
>> --- /dev/null
>> +++ b/config/defconfig_arm64-bluefield-linuxapp-gcc
>> @@ -0,0 +1,24 @@
>> +# SPDX-License-Identifier: BSD-3-Clause
>> +# Copyright 2019 Mellanox Technologies, Ltd
>> +#
>> +
>> +#include "defconfig_arm64-armv8a-linuxapp-gcc"
>> +
>> +# Mellanox BlueField
>> +CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
>> +
>> +CONFIG_RTE_MAX_NUMA_NODES=1
>> +CONFIG_RTE_CACHE_LINE_SIZE=64
>> +
>> +# UMA architecture
>> +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
>> +CONFIG_RTE_LIBRTE_VHOST_NUMA=n
>> +
>> +CONFIG_RTE_EAL_IGB_UIO=n
>> +CONFIG_RTE_EAL_VFIO=n
>> +CONFIG_RTE_KNI_KMOD=n
> 
> Does this SoC has external PCIe support? If so, VFIO may be required.

That's right. Considering a case where other NIC is attached, it would be better to delete these three lines.
Will send out v2.

Thanks,
Yongseok


>> +
>> +# PMD for ConnectX-5
>> +CONFIG_RTE_LIBRTE_MLX5_PMD=y
>> +CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
>> +CONFIG_RTE_IBVERBS_LINK_DLOPEN=n