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Wed, 9 Jan 2019 09:51:47 +0000 From: Yongseok Koh To: Jerin Jacob Kollanukkaran CC: Thomas Monjalon , Shahaf Shuler , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH] config: add Mellanox BlueField ARMv8 SoC Thread-Index: AQHUp/4yit4FDRfUEEGsUcXovUEBIKWmr5sAgAACRgA= Date: Wed, 9 Jan 2019 09:51:47 +0000 Message-ID: <7E076865-DEE6-423F-BF38-779E61186D73@mellanox.com> References: <20190109093201.40603-1-yskoh@mellanox.com> <065ae8b5a423d4823b60d1759379c7935d9dda0e.camel@marvell.com> In-Reply-To: <065ae8b5a423d4823b60d1759379c7935d9dda0e.camel@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; x-originating-ip: [69.181.245.183] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; DB3PR0502MB3945; 6:vnOvqkkjU0nPQZQjbRmRnOO5LyY9eC9G0QWhituKN0tkCpZrSZ6QxgNnQtEZxQJfN9yBRKVP9YUpJ/1LhUxtoUe3dscPODcyflGhKl10KAvnkxDoOavzzOswe2XkGMxGOr+G7MZioOQM1ws01pvpqy3qvkriDfaMsAft6cgyay7kc6j2h3iT9UrQJDcUcCUVsTr15CpHJnR/BwlDSE9OFIL33SC63hNXJFSbK1PI2DxVA04tPlPa3lnMZMDfvfJR4OUCOm3m/tk+1VqmgLoaKNVYXYuR6tWzDyvcOO85ba2qBfprXLdUu9qQY7/FiE+6tg+S3ugMxyRWUeZ64CqB4n6Cv+lN+Pg2jqxgP1elYdZKaxR00rPFf+F3HAA/0M3lxaCbrEH5416iknaASUlVzm9EOEXsnsNrCzoNF/X5nmjq1QtobHaEMcLBCMmJQq0Bp6HAKFAzon8+hh+gvJkqsQ==; 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charset="us-ascii" Content-ID: <3690D7278AA1F44AB8C4F62E8D26A492@eurprd05.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: f1e9f864-dc15-46b4-0741-08d676181212 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Jan 2019 09:51:47.2506 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB3945 Subject: Re: [dpdk-dev] [PATCH] config: add Mellanox BlueField ARMv8 SoC X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 09 Jan 2019 09:51:55 -0000 > On Jan 9, 2019, at 1:43 AM, Jerin Jacob Kollanukkaran wrote: >=20 > On Wed, 2019-01-09 at 01:32 -0800, Yongseok Koh wrote: >> BlueField is Mellanox's new SoC based on ARMv8. BlueField integrates >> Mellanox ConnectX-5 interconnect and Cortex-A72 cores into a single >> device. >>=20 >> http://www.mellanox.com/page/products_dyn?product_family=3D256&mtag=3Dso= c_overview >>=20 >> Signed-off-by: Yongseok Koh >> --- >>=20 >> This patch should be applied after >> "config: gather options for dlopen mlx dependency" [1] >>=20 >> [1] https://emea01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2F= patches.dpdk.org%2Fpatch%2F49502&data=3D02%7C01%7Cyskoh%40mellanox.com%= 7C3ff3a3dad47a470bb15d08d67616f2c9%7Ca652971c7d2e4d9ba6a4d149256f461b%7C0%7= C0%7C636826238291242450&sdata=3Df%2B0Gk34YBuoBRCn%2BMI6p1KLBnqlBWpq4rYy= Twg2MsBo%3D&reserved=3D0 >>=20 >> config/defconfig_arm64-bluefield-linuxapp-gcc | 24=20 >=20 > Please add meson support together in this patch. Like I mentioned in the other mail, this CPU has Implementor_ID=3D0x41(ARM) and Part_Number=3D0xd08(Cortex-A72) for now. So, there's nothing to add for meson build. >> ++++++++++++++++++++++++ >> 1 file changed, 24 insertions(+) >> create mode 100644 config/defconfig_arm64-bluefield-linuxapp-gcc >>=20 >> diff --git a/config/defconfig_arm64-bluefield-linuxapp-gcc >> b/config/defconfig_arm64-bluefield-linuxapp-gcc >> new file mode 100644 >> index 0000000000..8494a33641 >> --- /dev/null >> +++ b/config/defconfig_arm64-bluefield-linuxapp-gcc >> @@ -0,0 +1,24 @@ >> +# SPDX-License-Identifier: BSD-3-Clause >> +# Copyright 2019 Mellanox Technologies, Ltd >> +# >> + >> +#include "defconfig_arm64-armv8a-linuxapp-gcc" >> + >> +# Mellanox BlueField >> +CONFIG_RTE_ARCH_ARM_TUNE=3D"cortex-a72" >> + >> +CONFIG_RTE_MAX_NUMA_NODES=3D1 >> +CONFIG_RTE_CACHE_LINE_SIZE=3D64 >> + >> +# UMA architecture >> +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=3Dn >> +CONFIG_RTE_LIBRTE_VHOST_NUMA=3Dn >> + >> +CONFIG_RTE_EAL_IGB_UIO=3Dn >> +CONFIG_RTE_EAL_VFIO=3Dn >> +CONFIG_RTE_KNI_KMOD=3Dn >=20 > Does this SoC has external PCIe support? If so, VFIO may be required. That's right. Considering a case where other NIC is attached, it would be b= etter to delete these three lines. Will send out v2. Thanks, Yongseok >> + >> +# PMD for ConnectX-5 >> +CONFIG_RTE_LIBRTE_MLX5_PMD=3Dy >> +CONFIG_RTE_LIBRTE_MLX5_DEBUG=3Dn >> +CONFIG_RTE_IBVERBS_LINK_DLOPEN=3Dn