From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from tyo202.gate.nec.co.jp (TYO202.gate.nec.co.jp [210.143.35.52]) by dpdk.org (Postfix) with ESMTP id D38465901 for ; Thu, 11 Sep 2014 09:54:12 +0200 (CEST) Received: from mailgate3.nec.co.jp ([10.7.69.160]) by tyo202.gate.nec.co.jp (8.13.8/8.13.4) with ESMTP id s8B7xOZ3014388 for ; Thu, 11 Sep 2014 16:59:24 +0900 (JST) Received: from mailsv.nec.co.jp (imss62.nec.co.jp [10.7.69.157]) by mailgate3.nec.co.jp (8.11.7/3.7W-MAILGATE-NEC) with ESMTP id s8B7xN208085 for ; Thu, 11 Sep 2014 16:59:23 +0900 (JST) Received: from mail03.kamome.nec.co.jp (mail03.kamome.nec.co.jp [10.25.43.7]) by mailsv.nec.co.jp (8.13.8/8.13.4) with ESMTP id s8B7xNoJ022521 for ; Thu, 11 Sep 2014 16:59:23 +0900 (JST) Received: from bpxc99gp.gisp.nec.co.jp ([10.38.151.144] [10.38.151.144]) by mail02.kamome.nec.co.jp with ESMTP id BT-MMP-1858451; Thu, 11 Sep 2014 16:50:54 +0900 Received: from BPXM14GP.gisp.nec.co.jp ([169.254.1.238]) by BPXC16GP.gisp.nec.co.jp ([10.38.151.144]) with mapi id 14.02.0328.011; Thu, 11 Sep 2014 16:50:53 +0900 From: Hiroshi Shimamoto To: "dev@dpdk.org" Thread-Topic: [memnic PATCH 5/7] pmd: packet receiving optimization with prefetch Thread-Index: Ac/NlNdJ9sUcXVTvQa2evqSexnR1cA== Date: Thu, 11 Sep 2014 07:50:52 +0000 Message-ID: <7F861DC0615E0C47A872E6F3C5FCDDBD011A997D@BPXM14GP.gisp.nec.co.jp> Accept-Language: ja-JP, en-US Content-Language: ja-JP X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.205.5.123] Content-Type: text/plain; charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: Hayato Momma Subject: [dpdk-dev] [memnic PATCH 5/7] pmd: packet receiving optimization with prefetch X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Sep 2014 07:54:13 -0000 From: Hiroshi Shimamoto Prefetch the next packet area to reduce memory stall cycles. Prefetching the next packet area could hide memory stall, because the next area will be accessed just after processing the current receive operations. We can see performance improvements with memnic-tester. Using Xeon E5-2697 v2 @ 2.70GHz, 4 vCPU. size | before | after 64 | 4.59Mpps | 5.54Mpps 128 | 4.87Mpps | 5.46Mpps 256 | 4.72Mpps | 5.21Mpps 512 | 4.41Mpps | 4.50Mpps 1024 | 3.64Mpps | 3.71Mpps 1280 | 3.15Mpps | 3.21Mpps 1518 | 2.87Mpps | 2.92Mpps Signed-off-by: Hiroshi Shimamoto Reviewed-by: Hayato Momma --- pmd/pmd_memnic.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/pmd/pmd_memnic.c b/pmd/pmd_memnic.c index c22a14d..dbe5033 100644 --- a/pmd/pmd_memnic.c +++ b/pmd/pmd_memnic.c @@ -286,7 +286,7 @@ static uint16_t memnic_recv_pkts(void *rx_queue, uint16_t nr; uint64_t pkts, bytes, errs; uint32_t framesz =3D adapter->framesz; - int idx; + int idx, next; struct rte_eth_stats *st =3D &adapter->stats[rte_lcore_id()]; =20 if (!adapter->nic->hdr.valid) @@ -298,6 +298,11 @@ static uint16_t memnic_recv_pkts(void *rx_queue, p =3D &data->packets[idx]; if (p->status !=3D MEMNIC_PKT_ST_FILLED) break; + /* prefetch the next area */ + next =3D idx; + if (++next >=3D MEMNIC_NR_PACKET) + next =3D 0; + rte_prefetch0(&data->packets[next]); if (p->len > framesz) { errs++; goto drop; @@ -318,9 +323,7 @@ static uint16_t memnic_recv_pkts(void *rx_queue, drop: rte_compiler_barrier(); p->status =3D MEMNIC_PKT_ST_FREE; - - if (++idx >=3D MEMNIC_NR_PACKET) - idx =3D 0; + idx =3D next; } adapter->up_idx =3D idx; =20 --=20 1.8.3.1