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Fri, 12 Oct 2018 11:09:34 +0000 From: Igor Russkikh To: "dev@dpdk.org" CC: Pavel Belous , Igor Russkikh , "ferruh.yigit@intel.com" Thread-Topic: [PATCH v6 13/22] net/atlantic: add Rx/Tx descriptors information Thread-Index: AQHUYhwO7AVU68Oue0KRqzxC9JHeOw== Date: Fri, 12 Oct 2018 11:09:34 +0000 Message-ID: <7ed423b17c3744aff458e0d518eb6a698ca8dfd2.1539338074.git.igor.russkikh@aquantia.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: AM5PR0701CA0008.eurprd07.prod.outlook.com (2603:10a6:203:51::18) To BY1PR0701MB1660.namprd07.prod.outlook.com (2a01:111:e400:522a::22) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Igor.Russkikh@aquantia.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [95.79.108.179] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; BY1PR0701MB1627; 6:pocj0YPjCrcT94eiF1vfPoaZeWyvBTyEdDdvCsxiGAyxMKFemIsiW9BYFA2y6mEjPvK9mHL3RdfOuFjprp6fXk9rpQWI+Lr+EwhyDhUt5/2vl10qN+dpLbC0flPEQD+cSVt5N1H8iwmlLN+t2mJrzTEaP7o2R87ggmQQnujLHvGTDUWnntnA+opK8vjLJla+crVSMbb1b7VGXTJzMsFDHJUkjhLJA/qObiF/+xNvgH7lwTCZ4ySw7NjsXYzgzUL3UQi4Kds7J7iVZQ8RkoldNCM/9u4cuQoyDD05p8GLxPLH9cHovQVFpUWxd+oT/BTxBQ0GkR43zLiBa/SAxdLKvl0+Af/58/i+fDd5Zra10THiwnjKBcRCg2hfVraEZqr9AYwiYw0A6f/J5GLHJ91KbYtvLQcZz1Y/P1nM75I5bM3SyD6y+JQP627jPGcaGX7+Tmdl/H5epJ+qlMDgq25K4Q==; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: aquantia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9043b760-831c-49fc-a6c4-08d630333084 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Oct 2018 11:09:34.0393 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 83e2e134-991c-4ede-8ced-34d47e38e6b1 X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR0701MB1627 Subject: [dpdk-dev] [PATCH v6 13/22] net/atlantic: add Rx/Tx descriptors information X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Oct 2018 11:09:36 -0000 From: Pavel Belous Add support for Rx/Tx descriptors status information. Signed-off-by: Igor Russkikh Signed-off-by: Pavel Belous --- doc/guides/nics/features/atlantic.ini | 2 + drivers/net/atlantic/atl_ethdev.c | 7 +++ drivers/net/atlantic/atl_ethdev.h | 11 ++++ drivers/net/atlantic/atl_rxtx.c | 103 ++++++++++++++++++++++++++++++= ++++ 4 files changed, 123 insertions(+) diff --git a/doc/guides/nics/features/atlantic.ini b/doc/guides/nics/featur= es/atlantic.ini index 4056d4daacc8..cea9787ba1a9 100644 --- a/doc/guides/nics/features/atlantic.ini +++ b/doc/guides/nics/features/atlantic.ini @@ -13,6 +13,8 @@ CRC offload =3D Y L3 checksum offload =3D Y L4 checksum offload =3D Y Packet type parsing =3D Y +Rx descriptor status =3D Y +Tx descriptor status =3D Y Basic stats =3D Y Extended stats =3D Y Stats per queue =3D Y diff --git a/drivers/net/atlantic/atl_ethdev.c b/drivers/net/atlantic/atl_e= thdev.c index b1e7e3030d57..d76d071dc3e7 100644 --- a/drivers/net/atlantic/atl_ethdev.c +++ b/drivers/net/atlantic/atl_ethdev.c @@ -191,6 +191,13 @@ static const struct eth_dev_ops atl_eth_dev_ops =3D { =20 .rx_queue_intr_enable =3D atl_dev_rx_queue_intr_enable, .rx_queue_intr_disable =3D atl_dev_rx_queue_intr_disable, + + .rx_queue_count =3D atl_rx_queue_count, + .rx_descriptor_status =3D atl_dev_rx_descriptor_status, + .tx_descriptor_status =3D atl_dev_tx_descriptor_status, + + .rxq_info_get =3D atl_rxq_info_get, + .txq_info_get =3D atl_txq_info_get, }; =20 static inline int32_t diff --git a/drivers/net/atlantic/atl_ethdev.h b/drivers/net/atlantic/atl_e= thdev.h index dc48c134b7b8..c315e0436dca 100644 --- a/drivers/net/atlantic/atl_ethdev.h +++ b/drivers/net/atlantic/atl_ethdev.h @@ -52,6 +52,11 @@ int atl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t= tx_queue_id, uint16_t nb_tx_desc, unsigned int socket_id, const struct rte_eth_txconf *tx_conf); =20 +uint32_t atl_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)= ; + +int atl_dev_rx_descriptor_status(void *rx_queue, uint16_t offset); +int atl_dev_tx_descriptor_status(void *tx_queue, uint16_t offset); + int atl_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev, uint16_t queue_id); int atl_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev, @@ -70,6 +75,12 @@ int atl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t = rx_queue_id); int atl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id); int atl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id); =20 +void atl_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_rxq_info *qinfo); + +void atl_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_txq_info *qinfo); + uint16_t atl_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts); =20 diff --git a/drivers/net/atlantic/atl_rxtx.c b/drivers/net/atlantic/atl_rxt= x.c index c51d24d74ed2..fbd50a766098 100644 --- a/drivers/net/atlantic/atl_rxtx.c +++ b/drivers/net/atlantic/atl_rxtx.c @@ -651,6 +651,109 @@ atl_stop_queues(struct rte_eth_dev *dev) return 0; } =20 +void +atl_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_rxq_info *qinfo) +{ + struct atl_rx_queue *rxq; + + PMD_INIT_FUNC_TRACE(); + + rxq =3D dev->data->rx_queues[queue_id]; + + qinfo->mp =3D rxq->mb_pool; + qinfo->scattered_rx =3D dev->data->scattered_rx; + qinfo->nb_desc =3D rxq->nb_rx_desc; +} + +void +atl_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_txq_info *qinfo) +{ + struct atl_tx_queue *txq; + + PMD_INIT_FUNC_TRACE(); + + txq =3D dev->data->tx_queues[queue_id]; + + qinfo->nb_desc =3D txq->nb_tx_desc; +} + +/* Return Rx queue avail count */ + +uint32_t +atl_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) +{ + struct atl_rx_queue *rxq; + + PMD_INIT_FUNC_TRACE(); + + if (rx_queue_id >=3D dev->data->nb_rx_queues) { + PMD_DRV_LOG(ERR, "Invalid RX queue id=3D%d", rx_queue_id); + return 0; + } + + rxq =3D dev->data->rx_queues[rx_queue_id]; + + if (rxq =3D=3D NULL) + return 0; + + return rxq->nb_rx_desc - rxq->nb_rx_hold; +} + +int +atl_dev_rx_descriptor_status(void *rx_queue, uint16_t offset) +{ + struct atl_rx_queue *rxq =3D rx_queue; + struct hw_atl_rxd_wb_s *rxd; + uint32_t idx; + + PMD_INIT_FUNC_TRACE(); + + if (unlikely(offset >=3D rxq->nb_rx_desc)) + return -EINVAL; + + if (offset >=3D rxq->nb_rx_desc - rxq->nb_rx_hold) + return RTE_ETH_RX_DESC_UNAVAIL; + + idx =3D rxq->rx_tail + offset; + + if (idx >=3D rxq->nb_rx_desc) + idx -=3D rxq->nb_rx_desc; + + rxd =3D (struct hw_atl_rxd_wb_s *)&rxq->hw_ring[idx]; + + if (rxd->dd) + return RTE_ETH_RX_DESC_DONE; + + return RTE_ETH_RX_DESC_AVAIL; +} + +int +atl_dev_tx_descriptor_status(void *tx_queue, uint16_t offset) +{ + struct atl_tx_queue *txq =3D tx_queue; + struct hw_atl_txd_s *txd; + uint32_t idx; + + PMD_INIT_FUNC_TRACE(); + + if (unlikely(offset >=3D txq->nb_tx_desc)) + return -EINVAL; + + idx =3D txq->tx_tail + offset; + + if (idx >=3D txq->nb_tx_desc) + idx -=3D txq->nb_tx_desc; + + txd =3D &txq->hw_ring[idx]; + + if (txd->dd) + return RTE_ETH_TX_DESC_DONE; + + return RTE_ETH_TX_DESC_FULL; +} + static int atl_rx_enable_intr(struct rte_eth_dev *dev, uint16_t queue_id, bool enable= ) { --=20 2.7.4