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[109.190.92.136]) by smtp.gmail.com with ESMTPSA id 4sm19595491wjt.46.2015.08.02.15.33.15 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Aug 2015 15:33:16 -0700 (PDT) From: Thomas Monjalon To: "Ananyev, Konstantin" Date: Mon, 03 Aug 2015 00:32:02 +0200 Message-ID: <8391226.fPvu0Dy7iE@xps13> Organization: 6WIND User-Agent: KMail/4.14.8 (Linux/4.0.4-2-ARCH; KDE/4.14.8; x86_64; ; ) In-Reply-To: <2601191342CEEE43887BDE71AB97725836A69E3D@irsmsx105.ger.corp.intel.com> References: <55B8EC16.60404@allegro-packets.com> <2601191342CEEE43887BDE71AB97725836A69E3D@irsmsx105.ger.corp.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Cc: dev@dpdk.org Subject: Re: [dpdk-dev] Issue with non-scattered rx in ixgbe and i40e when mbuf private area size is odd X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 02 Aug 2015 22:33:17 -0000 2015-07-29 18:12, Ananyev, Konstantin: > As we don't support split header feature anyway, I think we can fix it just by always setting HBA in the RXD to zero. > Could you try the fix for ixgbe below? Please Konstantin, could you send a proper patch for this fix? Thanks > --- a/drivers/net/ixgbe/ixgbe_rxtx.c > +++ b/drivers/net/ixgbe/ixgbe_rxtx.c > @@ -1183,7 +1183,7 @@ ixgbe_rx_alloc_bufs(struct ixgbe_rx_queue *rxq, bool reset_mbuf) > > /* populate the descriptors */ > dma_addr = rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb)); > - rxdp[i].read.hdr_addr = dma_addr; > + rxdp[i].read.hdr_addr = 0; > rxdp[i].read.pkt_addr = dma_addr; > } > > @@ -1414,7 +1414,7 @@ ixgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, > rxe->mbuf = nmb; > dma_addr = > rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb)); > - rxdp->read.hdr_addr = dma_addr; > + rxdp->read.hdr_addr = 0; > rxdp->read.pkt_addr = dma_addr; > > /* > @@ -1741,7 +1741,7 @@ next_desc: > rxe->mbuf = nmb; > > rxm->data_off = RTE_PKTMBUF_HEADROOM; > - rxdp->read.hdr_addr = dma; > + rxdp->read.hdr_addr = 0; > rxdp->read.pkt_addr = dma; > } else > rxe->mbuf = NULL; > @@ -3633,7 +3633,7 @@ ixgbe_alloc_rx_queue_mbufs(struct ixgbe_rx_queue *rxq) > dma_addr = > rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mbuf)); > rxd = &rxq->rx_ring[i]; > - rxd->read.hdr_addr = dma_addr; > + rxd->read.hdr_addr = 0; > rxd->read.pkt_addr = dma_addr; > rxe[i].mbuf = mbuf; > } > diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec.c b/drivers/net/ixgbe/ixgbe_rxtx_vec.c > index 6c1647e..16a9c64 100644 > --- a/drivers/net/ixgbe/ixgbe_rxtx_vec.c > +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec.c > @@ -56,6 +56,8 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq) > RTE_PKTMBUF_HEADROOM); > __m128i dma_addr0, dma_addr1; > > + const __m128i hba_msk = _mm_set_epi64x(0, UINT64_MAX); > + > rxdp = rxq->rx_ring + rxq->rxrearm_start; > > /* Pull 'n' more MBUFs into the software ring */ > @@ -108,6 +110,9 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq) > dma_addr0 = _mm_add_epi64(dma_addr0, hdr_room); > dma_addr1 = _mm_add_epi64(dma_addr1, hdr_room); > > + dma_addr0 = _mm_and_si128(dma_addr0, hba_msk); > + dma_addr1 = _mm_and_si128(dma_addr1, hba_msk); > + > /* flush desc with pa dma_addr */ > _mm_store_si128((__m128i *)&rxdp++->read, dma_addr0); > _mm_store_si128((__m128i *)&rxdp++->read, dma_addr1); > bash-4.2$ cat patch1 > diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c > index a0c8847..94967c5 100644 > --- a/drivers/net/ixgbe/ixgbe_rxtx.c > +++ b/drivers/net/ixgbe/ixgbe_rxtx.c > @@ -1183,7 +1183,7 @@ ixgbe_rx_alloc_bufs(struct ixgbe_rx_queue *rxq, bool reset_mbuf) > > /* populate the descriptors */ > dma_addr = rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb)); > - rxdp[i].read.hdr_addr = dma_addr; > + rxdp[i].read.hdr_addr = 0; > rxdp[i].read.pkt_addr = dma_addr; > } > > @@ -1414,7 +1414,7 @@ ixgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, > rxe->mbuf = nmb; > dma_addr = > rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(nmb)); > - rxdp->read.hdr_addr = dma_addr; > + rxdp->read.hdr_addr = 0; > rxdp->read.pkt_addr = dma_addr; > > /* > @@ -1741,7 +1741,7 @@ next_desc: > rxe->mbuf = nmb; > > rxm->data_off = RTE_PKTMBUF_HEADROOM; > - rxdp->read.hdr_addr = dma; > + rxdp->read.hdr_addr = 0; > rxdp->read.pkt_addr = dma; > } else > rxe->mbuf = NULL; > @@ -3633,7 +3633,7 @@ ixgbe_alloc_rx_queue_mbufs(struct ixgbe_rx_queue *rxq) > dma_addr = > rte_cpu_to_le_64(RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mbuf)); > rxd = &rxq->rx_ring[i]; > - rxd->read.hdr_addr = dma_addr; > + rxd->read.hdr_addr = 0; > rxd->read.pkt_addr = dma_addr; > rxe[i].mbuf = mbuf; > } > diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec.c b/drivers/net/ixgbe/ixgbe_rxtx_vec.c > index 6c1647e..16a9c64 100644 > --- a/drivers/net/ixgbe/ixgbe_rxtx_vec.c > +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec.c > @@ -56,6 +56,8 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq) > RTE_PKTMBUF_HEADROOM); > __m128i dma_addr0, dma_addr1; > > + const __m128i hba_msk = _mm_set_epi64x(0, UINT64_MAX); > + > rxdp = rxq->rx_ring + rxq->rxrearm_start; > > /* Pull 'n' more MBUFs into the software ring */ > @@ -108,6 +110,9 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq) > dma_addr0 = _mm_add_epi64(dma_addr0, hdr_room); > dma_addr1 = _mm_add_epi64(dma_addr1, hdr_room); > > + dma_addr0 = _mm_and_si128(dma_addr0, hba_msk); > + dma_addr1 = _mm_and_si128(dma_addr1, hba_msk); > + > /* flush desc with pa dma_addr */ > _mm_store_si128((__m128i *)&rxdp++->read, dma_addr0); > _mm_store_si128((__m128i *)&rxdp++->read, dma_addr1);