From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B799A4404F; Wed, 12 Jun 2024 17:13:01 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 18DBB4281D; Wed, 12 Jun 2024 17:05:03 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by mails.dpdk.org (Postfix) with ESMTP id C53FA40EAB for ; Wed, 12 Jun 2024 17:05:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718204702; x=1749740702; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VdTnKYw1kssFUGAmSBVDdVxDB5PjfN3+MiccqJNQNFM=; b=L3v7JdqvUgsGe8Ix1YRLOqzQ3X2D2AqH9CWarP0g8mObKhNoV8P/LX+s MPzMCtVvNWWCjHVZD01clNYJMAL4HHc7cIjDcnHwi4cTVHAlgahI/aZMe n6Xp6nGNENBd/nwUyAzHRy22C0tIlqOqeNU8EvQHGDIFbmOw7erLRq4Lx nh4NVbl7eigjW0AU58Fe3YFRaWN2/ZHIY5EQytyihZyY1rG+QsKMbRz5A qe5EhcNC5ZoNvIqsXyxxJdf/p05QncraHQhMeWyWawwF2PmK1o2w/wBdd /WUXlc855rqHSn6QkIwF7eBMC5jkHykh6o2cAXkq5vgZaMTNskpHY/uYw A==; X-CSE-ConnectionGUID: WeDpchyyQdSTzLTZidydpA== X-CSE-MsgGUID: 4qOASvJOT3Ol3GkB6KMddg== X-IronPort-AV: E=McAfee;i="6700,10204,11101"; a="32459524" X-IronPort-AV: E=Sophos;i="6.08,233,1712646000"; d="scan'208";a="32459524" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jun 2024 08:04:41 -0700 X-CSE-ConnectionGUID: Br3tDSW7TJmVHGk8m1Lm+A== X-CSE-MsgGUID: ivEKOpl/SpuvnOV9EiG4/g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,233,1712646000"; d="scan'208";a="39925318" Received: from silpixa00401119.ir.intel.com ([10.55.129.167]) by orviesa009.jf.intel.com with ESMTP; 12 Jun 2024 08:04:40 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Ian Stokes , bruce.richardson@intel.com, Eric Joyner Subject: [PATCH v2 052/148] net/ice/base: fix GCS descriptor field offsets Date: Wed, 12 Jun 2024 16:00:46 +0100 Message-ID: <863c49f98f5ab74b4cbca9be2b087988d1ea22be.1718204528.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: <20240430154014.1026-1-ian.stokes@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Ian Stokes Update the offsets, and remove the ICE_TX_GCS_DESC_ENA define since a non-0 value used for the ICE_TX_GCS_DESC_TYPE field will enable GCS offload; there is no dedicated bit to enable it anymore. Signed-off-by: Eric Joyner Signed-off-by: Ian Stokes --- drivers/net/ice/base/ice_lan_tx_rx.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index d816df0ff6..39673e36f7 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -1074,10 +1074,9 @@ struct ice_tx_ctx_desc { __le64 qw1; }; -#define ICE_TX_GSC_DESC_START 0 /* 7 BITS */ -#define ICE_TX_GSC_DESC_OFFSET 7 /* 4 BITS */ -#define ICE_TX_GSC_DESC_TYPE 11 /* 2 BITS */ -#define ICE_TX_GSC_DESC_ENA 13 /* 1 BIT */ +#define ICE_TX_GCS_DESC_START 0 /* 8 BITS */ +#define ICE_TX_GCS_DESC_OFFSET 8 /* 4 BITS */ +#define ICE_TX_GCS_DESC_TYPE 12 /* 3 BITS */ #define ICE_TXD_CTX_QW1_DTYPE_S 0 #define ICE_TXD_CTX_QW1_DTYPE_M (0xFUL << ICE_TXD_CTX_QW1_DTYPE_S) -- 2.43.0