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Fri, 26 Oct 2018 23:01:37 +0000 From: Yongseok Koh To: Shahaf Shuler CC: dev , Ori Kam Thread-Topic: [PATCH 2/2] net/mlx5: fix detection and error for multiple item layers Thread-Index: AQHUbEBKYyMFmEOSa0O6dlDVLKSv0aUyJzAA Date: Fri, 26 Oct 2018 23:01:37 +0000 Message-ID: <8AB65797-D441-4FCC-B95E-2C190B196929@mellanox.com> References: <20181025085351.15738-1-shahafs@mellanox.com> <20181025085351.15738-2-shahafs@mellanox.com> In-Reply-To: <20181025085351.15738-2-shahafs@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; x-originating-ip: [209.116.155.178] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; DB3PR0502MB3946; 6:sJAIuUJHtc6a+/AHFEwGqHnGnCj7bccl8IHeoDx+cC++YeH7wCGo2YfbmRc/kaHcnAsRsHr9yTvbiAX1EjJEJXrt885ruqZGPej0l9YJ5JauJsRZ5YYN5t9f5bWauJUbvFYTlzAMqyCRM7vlAMGlmW0z/6Z/zUiY1sUyVEHOUSqA/DOHLXtho7aCN0j4r31w9kXeVKCi09AbzMNb8V1sSvPb+SYEtuxBVpkNlT+m3fRuAVJQc4riC2EhBIHK+PvXB9Jrf5UA8w8pLEZJPYgHx2CcWPGm0ukokabBi//x6qC0+corUWSni8BoMERcHJtcuFvfxJe/Y9imKIPH++Lf2M64oMmctuLXD8KkvQUiAP4hFNCQFejbQjq07t0H6wCOCtXWqMl667K3M7HfzI9o0Eub/gw++zUHIqfa/eFIiCgTK3AoQulgeNADMmZVSYGAcjB9Pma8HsNWBhWWG6iOxA==; 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charset="us-ascii" Content-ID: <5BC3A095AC7F5E41AF5E5ABFC5B7F2F5@eurprd05.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 119996cb-4093-4964-703a-08d63b96fbc7 X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Oct 2018 23:01:37.1236 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB3946 Subject: Re: [dpdk-dev] [PATCH 2/2] net/mlx5: fix detection and error for multiple item layers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Oct 2018 23:01:38 -0000 > On Oct 25, 2018, at 1:53 AM, Shahaf Shuler wrote: >=20 > 1. The check for the Eth item was wrong. causing an error with > flow rules like: >=20 > flow create 0 ingress pattern eth / vlan vid is 13 / ipv4 / gre / eth / > vlan vid is 15 / end actions drop / end >=20 > 2. align all error messages. >=20 > 3. align multiple item layers check. >=20 > Fixes: 23c1d42c7138 ("net/mlx5: split flow validation to dedicated functi= on") > Cc: orika@mellanox.com >=20 > Signed-off-by: Shahaf Shuler > --- Acked-by: Yongseok Koh =20 Thanks > drivers/net/mlx5/mlx5_flow.c | 69 +++++++++++++++++++++++++--------------= ----- > 1 file changed, 39 insertions(+), 30 deletions(-) >=20 > diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c > index 87189a3405..2dd481f81a 100644 > --- a/drivers/net/mlx5/mlx5_flow.c > +++ b/drivers/net/mlx5/mlx5_flow.c > @@ -1046,15 +1046,13 @@ mlx5_flow_validate_item_eth(const struct rte_flow= _item *item, > }; > int ret; > int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > + const uint64_t ethm =3D tunnel ? MLX5_FLOW_LAYER_INNER_L2 : > + MLX5_FLOW_LAYER_OUTER_L2; >=20 > - if (item_flags & MLX5_FLOW_LAYER_OUTER_L2) > + if (item_flags & ethm) > return rte_flow_error_set(error, ENOTSUP, > RTE_FLOW_ERROR_TYPE_ITEM, item, > - "3 levels of l2 are not supported"); > - if ((item_flags & MLX5_FLOW_LAYER_INNER_L2) && !tunnel) > - return rte_flow_error_set(error, ENOTSUP, > - RTE_FLOW_ERROR_TYPE_ITEM, item, > - "2 L2 without tunnel are not supported"); > + "multiple L2 layers not supported"); > if (!mask) > mask =3D &rte_flow_item_eth_mask; > ret =3D mlx5_flow_item_acceptable(item, (const uint8_t *)mask, > @@ -1101,7 +1099,7 @@ mlx5_flow_validate_item_vlan(const struct rte_flow_= item *item, > if (item_flags & vlanm) > return rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, item, > - "VLAN layer already configured"); > + "multiple VLAN layers not supported"); > else if ((item_flags & l34m) !=3D 0) > return rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, item, > @@ -1158,15 +1156,17 @@ mlx5_flow_validate_item_ipv4(const struct rte_flo= w_item *item, > }, > }; > const int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > + const uint64_t l3m =3D tunnel ? MLX5_FLOW_LAYER_INNER_L3 : > + MLX5_FLOW_LAYER_OUTER_L3; > + const uint64_t l4m =3D tunnel ? MLX5_FLOW_LAYER_INNER_L4 : > + MLX5_FLOW_LAYER_OUTER_L4; > int ret; >=20 > - if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : > - MLX5_FLOW_LAYER_OUTER_L3)) > + if (item_flags & l3m) > return rte_flow_error_set(error, ENOTSUP, > RTE_FLOW_ERROR_TYPE_ITEM, item, > "multiple L3 layers not supported"); > - else if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : > - MLX5_FLOW_LAYER_OUTER_L4)) > + else if (item_flags & l4m) > return rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, item, > "L3 cannot follow an L4 layer."); > @@ -1214,15 +1214,17 @@ mlx5_flow_validate_item_ipv6(const struct rte_flo= w_item *item, > }, > }; > const int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > + const uint64_t l3m =3D tunnel ? MLX5_FLOW_LAYER_INNER_L3 : > + MLX5_FLOW_LAYER_OUTER_L3; > + const uint64_t l4m =3D tunnel ? MLX5_FLOW_LAYER_INNER_L4 : > + MLX5_FLOW_LAYER_OUTER_L4; > int ret; >=20 > - if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : > - MLX5_FLOW_LAYER_OUTER_L3)) > + if (item_flags & l3m) > return rte_flow_error_set(error, ENOTSUP, > RTE_FLOW_ERROR_TYPE_ITEM, item, > "multiple L3 layers not supported"); > - else if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : > - MLX5_FLOW_LAYER_OUTER_L4)) > + else if (item_flags & l4m) > return rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, item, > "L3 cannot follow an L4 layer."); > @@ -1273,6 +1275,10 @@ mlx5_flow_validate_item_udp(const struct rte_flow_= item *item, > { > const struct rte_flow_item_udp *mask =3D item->mask; > const int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > + const uint64_t l3m =3D tunnel ? MLX5_FLOW_LAYER_INNER_L3 : > + MLX5_FLOW_LAYER_OUTER_L3; > + const uint64_t l4m =3D tunnel ? MLX5_FLOW_LAYER_INNER_L4 : > + MLX5_FLOW_LAYER_OUTER_L4; > int ret; >=20 > if (target_protocol !=3D 0xff && target_protocol !=3D IPPROTO_UDP) > @@ -1280,16 +1286,14 @@ mlx5_flow_validate_item_udp(const struct rte_flow= _item *item, > RTE_FLOW_ERROR_TYPE_ITEM, item, > "protocol filtering not compatible" > " with UDP layer"); > - if (!(item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : > - MLX5_FLOW_LAYER_OUTER_L3))) > + if (!(item_flags & l3m)) > return rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, item, > "L3 is mandatory to filter on L4"); > - if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : > - MLX5_FLOW_LAYER_OUTER_L4)) > + if (item_flags & l4m) > return rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, item, > - "L4 layer is already present"); > + "multiple L4 layers not supported"); > if (!mask) > mask =3D &rte_flow_item_udp_mask; > ret =3D mlx5_flow_item_acceptable > @@ -1325,6 +1329,10 @@ mlx5_flow_validate_item_tcp(const struct rte_flow_= item *item, > { > const struct rte_flow_item_tcp *mask =3D item->mask; > const int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > + const uint64_t l3m =3D tunnel ? MLX5_FLOW_LAYER_INNER_L3 : > + MLX5_FLOW_LAYER_OUTER_L3; > + const uint64_t l4m =3D tunnel ? MLX5_FLOW_LAYER_INNER_L4 : > + MLX5_FLOW_LAYER_OUTER_L4; > int ret; >=20 > assert(flow_mask); > @@ -1333,16 +1341,14 @@ mlx5_flow_validate_item_tcp(const struct rte_flow= _item *item, > RTE_FLOW_ERROR_TYPE_ITEM, item, > "protocol filtering not compatible" > " with TCP layer"); > - if (!(item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L3 : > - MLX5_FLOW_LAYER_OUTER_L3))) > + if (!(item_flags & l3m)) > return rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, item, > "L3 is mandatory to filter on L4"); > - if (item_flags & (tunnel ? MLX5_FLOW_LAYER_INNER_L4 : > - MLX5_FLOW_LAYER_OUTER_L4)) > + if (item_flags & l4m) > return rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, item, > - "L4 layer is already present"); > + "multiple L4 layers not supported"); > if (!mask) > mask =3D &rte_flow_item_tcp_mask; > ret =3D mlx5_flow_item_acceptable > @@ -1387,7 +1393,8 @@ mlx5_flow_validate_item_vxlan(const struct rte_flow= _item *item, > if (item_flags & MLX5_FLOW_LAYER_TUNNEL) > return rte_flow_error_set(error, ENOTSUP, > RTE_FLOW_ERROR_TYPE_ITEM, item, > - "a tunnel is already present"); > + "multiple tunnel layers not" > + " supported"); > /* > * Verify only UDPv4 is present as defined in > * https://tools.ietf.org/html/rfc7348 > @@ -1473,7 +1480,8 @@ mlx5_flow_validate_item_vxlan_gpe(const struct rte_= flow_item *item, > if (item_flags & MLX5_FLOW_LAYER_TUNNEL) > return rte_flow_error_set(error, ENOTSUP, > RTE_FLOW_ERROR_TYPE_ITEM, item, > - "a tunnel is already present"); > + "multiple tunnel layers not" > + " supported"); > /* > * Verify only UDPv4 is present as defined in > * https://tools.ietf.org/html/rfc7348 > @@ -1556,7 +1564,8 @@ mlx5_flow_validate_item_gre(const struct rte_flow_i= tem *item, > if (item_flags & MLX5_FLOW_LAYER_TUNNEL) > return rte_flow_error_set(error, ENOTSUP, > RTE_FLOW_ERROR_TYPE_ITEM, item, > - "a tunnel is already present"); > + "multiple tunnel layers not" > + " supported"); > if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) > return rte_flow_error_set(error, ENOTSUP, > RTE_FLOW_ERROR_TYPE_ITEM, item, > @@ -1613,8 +1622,8 @@ mlx5_flow_validate_item_mpls(const struct rte_flow_= item *item __rte_unused, > if (item_flags & MLX5_FLOW_LAYER_TUNNEL) > return rte_flow_error_set(error, ENOTSUP, > RTE_FLOW_ERROR_TYPE_ITEM, item, > - "a tunnel is already" > - " present"); > + "multiple tunnel layers not" > + " supported"); > if (!mask) > mask =3D &rte_flow_item_mpls_mask; > ret =3D mlx5_flow_item_acceptable > --=20 > 2.12.0 >=20