From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 31DB069A5 for ; Wed, 29 Mar 2017 10:27:38 +0200 (CEST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga105.jf.intel.com with ESMTP; 29 Mar 2017 01:27:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,240,1486454400"; d="scan'208";a="66344872" Received: from irsmsx106.ger.corp.intel.com ([163.33.3.31]) by orsmga002.jf.intel.com with ESMTP; 29 Mar 2017 01:27:36 -0700 Received: from irsmsx108.ger.corp.intel.com ([169.254.11.239]) by IRSMSX106.ger.corp.intel.com ([169.254.8.202]) with mapi id 14.03.0319.002; Wed, 29 Mar 2017 09:27:35 +0100 From: "Iremonger, Bernard" To: "Xing, Beilei" , "dev@dpdk.org" , "Wu, Jingjing" CC: "Zhang, Helin" , "Lu, Wenzhuo" Thread-Topic: [PATCH v3 4/5] net/i40e: initialise L3 MAP register Thread-Index: AQHSp99iuedtV5x/Rky0JlwKJcBRNaGq9gkAgACFzpA= Date: Wed, 29 Mar 2017 08:27:34 +0000 Message-ID: <8CEF83825BEC744B83065625E567D7C224D4C340@IRSMSX108.ger.corp.intel.com> References: <1490287113-8895-1-git-send-email-bernard.iremonger@intel.com> <1490718059-380-5-git-send-email-bernard.iremonger@intel.com> <94479800C636CB44BD422CB454846E01315C41EF@SHSMSX101.ccr.corp.intel.com> In-Reply-To: <94479800C636CB44BD422CB454846E01315C41EF@SHSMSX101.ccr.corp.intel.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZTQwZmJjNDUtYTgwNC00OWE1LTkzNTQtNzQyZGQ2ZWU1NzNkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IldtUDJoa3BGVFNvVXg2YVhWUUZnd3ZLT3BUeE04T3FnZTBDeldOZ3VCYkU9In0= x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 4/5] net/i40e: initialise L3 MAP register X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Mar 2017 08:27:38 -0000 Hi Beilei, > -----Original Message----- > From: Xing, Beilei > Sent: Wednesday, March 29, 2017 2:25 AM > To: Iremonger, Bernard ; dev@dpdk.org; > Wu, Jingjing > Cc: Zhang, Helin ; Lu, Wenzhuo > > Subject: RE: [PATCH v3 4/5] net/i40e: initialise L3 MAP register >=20 >=20 >=20 > > -----Original Message----- > > From: Iremonger, Bernard > > Sent: Wednesday, March 29, 2017 12:21 AM > > To: dev@dpdk.org; Xing, Beilei ; Wu, Jingjing > > > > Cc: Zhang, Helin ; Lu, Wenzhuo > > ; Iremonger, Bernard > > > > Subject: [PATCH v3 4/5] net/i40e: initialise L3 MAP register > > > > The L3 MAP register is initialised to support QinQ cloud filters. > > > > Signed-off-by: Bernard Iremonger > > --- > > drivers/net/i40e/i40e_ethdev.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/net/i40e/i40e_ethdev.c > > b/drivers/net/i40e/i40e_ethdev.c index 5a03c7a95..a57b0416d 100644 > > --- a/drivers/net/i40e/i40e_ethdev.c > > +++ b/drivers/net/i40e/i40e_ethdev.c > > @@ -687,6 +687,9 @@ RTE_PMD_REGISTER_KMOD_DEP(net_i40e, "* > igb_uio | > > uio_pci_generic | vfio"); #ifndef I40E_GLQF_PIT > > #define I40E_GLQF_PIT(_i) (0x00268C80 + ((_i) * 4)) > > #endif > > +#ifndef I40E_GLQF_L3_MAP > > +#define I40E_GLQF_L3_MAP(_i) (0x0026C700 + ((_i) * 4)) #endif > > > > static inline void i40e_GLQF_reg_init(struct i40e_hw *hw) { @@ > > -1128,6 > > +1131,11 @@ eth_i40e_dev_init(struct rte_eth_dev *dev) > > ((hw->nvm.version >> 4) & 0xff), > > (hw->nvm.version & 0xf), hw->nvm.eetrack); > > > > + /* initialise the L3_MAP register */ > > + ret =3D i40e_aq_debug_write_register(hw, I40E_GLQF_L3_MAP(40), > > 0x00000028, NULL); > > + if (ret) > > + PMD_INIT_LOG(ERR, "Failed to write L3 MAP register %d", > > ret); > > + >=20 > Hi Bernard, >=20 > It's better to put it in i40e_GLQF_reg_init function. I tried this but it could not be written directly. It has to be written using the admin queue. The admin queue has not been in= itialized when the i40e_GLQF_reg_init() function is called. Regards, Bernard.