From: "谢华伟(此时此刻)" <huawei.xhw@alibaba-inc.com>
To: Maxime Coquelin <maxime.coquelin@redhat.com>, ferruh.yigit@intel.com
Cc: dev@dpdk.org, anatoly.burakov@intel.com,
david.marchand@redhat.com, chenbo.xia@intel.com, grive@u256.net
Subject: Re: [dpdk-dev] [PATCH v5 3/3] PCI: don't use vfio ioctl call to access PIO resource
Date: Thu, 21 Jan 2021 23:00:19 +0800 [thread overview]
Message-ID: <8da8e9d0-0bfe-04f3-8635-fcc970fea228@alibaba-inc.com> (raw)
In-Reply-To: <40e0702d-7847-9dc3-1904-03a7b8e92c2e@alibaba-inc.com>
>> "
>>
>> I think that using inb/outb in the case of VFIO with IOMMU enabled won't
>> work without cap_sys_rawio, and using it in the case of VFIO with IOMMU
>> disabled just bypasses VFIO and so is not correct.
>
> Get your concern.
>
> PIO bar:
>
> HW virtio on HW machine: any vendor implements hardware virtio
> using PIO bar? I think this isn't right. And i dout if vfio doesn't
> check rawio perssion in the syscall in this case.
>
> Para virtio: you have no choice to enable unsafe no-iommu mode.
> You must have RAWIO permission.
Sorry. typo. "you have no choice but to enable unsafe no-iommu mode. "
>
> so with PIO bar, the regression doesn't exist in real world.
>
> Btw, our virtio device is basically MMIO bar, either in hardware
> machine or in pass-throughed virtual machine.
>
>
> Do you mean we apply or abandon patch 3? I am both OK. The first
> priority to me is to enable MMIO bar support.
>
>
next prev parent reply other threads:[~2021-01-21 15:00 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 14:59 [dpdk-dev] [PATCH v2] pci: support both PIO and MMIO BAR for legacy virtio on x86 谢华伟(此时此刻)
2020-10-01 10:22 ` Burakov, Anatoly
2020-10-02 5:44 ` 谢华伟(此时此刻)
2020-10-09 8:36 ` [dpdk-dev] [PATCH v3] " 谢华伟(此时此刻)
2020-10-13 8:41 ` [dpdk-dev] [PATCH v4] support both PIO and MMIO bar for virtio pci device 谢华伟(此时此刻)
2020-10-13 8:41 ` [dpdk-dev] [PATCH v4] pci: support both PIO and MMIO BAR for legacy virtio on x86 谢华伟(此时此刻)
2020-10-13 12:34 ` 谢华伟(此时此刻)
2020-10-21 8:46 ` 谢华伟(此时此刻)
2020-10-21 11:49 ` Ferruh Yigit
2020-10-21 12:32 ` 谢华伟(此时此刻)
2020-10-21 17:24 ` Ferruh Yigit
2020-10-22 9:15 ` 谢华伟(此时此刻)
2020-10-22 9:44 ` Ferruh Yigit
2020-10-22 9:57 ` 谢华伟(此时此刻)
2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD 谢华伟(此时此刻)
2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 1/3] PCI: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻)
2021-01-12 8:07 ` Maxime Coquelin
2021-01-14 18:23 ` 谢华伟(此时此刻)
2021-01-24 15:10 ` Xueming(Steven) Li
2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 2/3] PCI: support MMIO in rte_pci_ioport_map/unap/read/write 谢华伟(此时此刻)
2021-01-12 8:23 ` Maxime Coquelin
2021-01-21 6:30 ` 谢华伟(此时此刻)
2021-01-24 15:22 ` Xueming(Steven) Li
2021-01-25 3:08 ` 谢华伟(此时此刻)
2021-01-27 10:40 ` Ferruh Yigit
2021-01-27 15:34 ` 谢华伟(此时此刻)
2021-01-27 16:45 ` Ferruh Yigit
2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 3/3] PCI: don't use vfio ioctl call to access PIO resource 谢华伟(此时此刻)
2021-01-12 9:37 ` Maxime Coquelin
2021-01-12 16:58 ` Maxime Coquelin
2021-01-20 14:54 ` 谢华伟(此时此刻)
2021-01-21 8:29 ` Maxime Coquelin
2021-01-21 14:57 ` 谢华伟(此时此刻)
2021-01-21 15:00 ` 谢华伟(此时此刻) [this message]
2021-01-21 15:38 ` Maxime Coquelin
2021-01-22 7:25 ` 谢华伟(此时此刻)
2021-01-26 10:44 ` Maxime Coquelin
2021-01-27 10:32 ` Ferruh Yigit
2021-01-27 12:17 ` Maxime Coquelin
2021-01-27 14:43 ` 谢华伟(此时此刻)
2021-01-27 16:45 ` Ferruh Yigit
2021-01-28 13:43 ` 谢华伟(此时此刻)
2021-01-26 12:30 ` 谢华伟(此时此刻)
2021-01-26 12:35 ` Maxime Coquelin
2021-01-26 14:24 ` 谢华伟(此时此刻)
2020-10-27 8:50 ` [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD 谢华伟(此时此刻)
2020-10-28 3:48 ` 谢华伟(此时此刻)
2020-11-02 11:56 ` 谢华伟(此时此刻)
2020-11-10 12:35 ` 谢华伟(此时此刻)
2020-11-10 12:42 ` David Marchand
2020-11-12 13:35 ` 谢华伟(此时此刻)
2020-12-14 14:24 ` 谢华伟(此时此刻)
2020-12-16 7:54 ` Maxime Coquelin
2021-01-12 17:37 ` Maxime Coquelin
2021-01-14 18:19 ` 谢华伟(此时此刻)
2021-01-21 4:12 ` 谢华伟(此时此刻)
2021-01-21 8:47 ` Maxime Coquelin
2021-01-21 13:51 ` 谢华伟(此时此刻)
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