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Subject: Re: [PATCH v4 2/2] config/arm: disable SVE ACLE for cn10k
To: Rahul Bhansali <rbhansali@marvell.com>, <dev@dpdk.org>, Jan Viktorin
 <viktorin@rehivetech.com>, Ruifeng Wang <ruifeng.wang@arm.com>, Bruce
 Richardson <bruce.richardson@intel.com>
CC: <jerinj@marvell.com>
References: <20220505142744.1423344-1-rbhansali@marvell.com>
 <20220509101932.2403562-1-rbhansali@marvell.com>
 <20220509101932.2403562-2-rbhansali@marvell.com>
From: fengchengwen <fengchengwen@huawei.com>
Message-ID: <9423a6e9-9912-062b-82a5-ef4204ea7755@huawei.com>
Date: Tue, 10 May 2022 10:57:37 +0800
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Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>

On 2022/5/9 18:19, Rahul Bhansali wrote:
> This disable the sve_acle flag for cn10k.
> 
> Performance impact:-
> With l3fwd example, lpm lookup performance increased
> by ~21% if Neon is used instead of SVE.
> 
> Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
> ---
> Changes in v4:
> - Resend patches. With v3, patches were not sent properly
> in single series.
> 
> Changes in v3: No change
> 
> Changes in v2:
> - Renamed the flag to sve_acle from sve
> 
>  config/arm/meson.build | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index 6f8961eac8..a94129168f 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -281,7 +281,8 @@ soc_cn10k = {
>      ],
>      'part_number': '0xd49',
>      'extra_march_features': ['crypto'],
> -    'numa': false
> +    'numa': false,
> +    'sve_acle': false
>  }
> 
>  soc_dpaa = {
> --
> 2.25.1
> 
> 
> .
>