From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 71C161396; Fri, 15 Sep 2017 04:06:37 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Sep 2017 19:06:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,395,1500966000"; d="scan'208";a="1172394777" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga001.jf.intel.com with ESMTP; 14 Sep 2017 19:06:35 -0700 Received: from fmsmsx123.amr.corp.intel.com (10.18.125.38) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 14 Sep 2017 19:06:35 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx123.amr.corp.intel.com (10.18.125.38) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 14 Sep 2017 19:06:35 -0700 Received: from shsmsx151.ccr.corp.intel.com ([169.254.3.98]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.117]) with mapi id 14.03.0319.002; Fri, 15 Sep 2017 10:06:33 +0800 From: "Xing, Beilei" To: "Wu, Jingjing" CC: "dev@dpdk.org" , "stable@dpdk.org" Thread-Topic: [PATCH] net/i40e: fix incorrect var assignment Thread-Index: AQHTLPNKrsaTonPfj0ejOBqzGOFFfKK1K0Xw Date: Fri, 15 Sep 2017 02:06:31 +0000 Message-ID: <94479800C636CB44BD422CB454846E01320274C1@SHSMSX151.ccr.corp.intel.com> References: <1505323889-9744-1-git-send-email-jingjing.wu@intel.com> In-Reply-To: <1505323889-9744-1-git-send-email-jingjing.wu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] net/i40e: fix incorrect var assignment X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Sep 2017 02:06:38 -0000 > -----Original Message----- > From: Wu, Jingjing > Sent: Thursday, September 14, 2017 1:31 AM > To: Xing, Beilei > Cc: dev@dpdk.org; Wu, Jingjing ; stable@dpdk.org > Subject: [PATCH] net/i40e: fix incorrect var assignment >=20 > rx/tx_queue_setup functions are shared between PF and VF drivers. So the > var 'pf' should not be assigned at the beginning. > This patch fixes the issue, and also corrects the return err code. >=20 > Cc: stable@dpdk.org > Fixes: b6583ee40265 ("i40e: full VMDQ pools support") >=20 > Signed-off-by: Jingjing Wu > --- > drivers/net/i40e/i40e_rxtx.c | 72 +++++++++++++++++++++++---------------= - > ----- > 1 file changed, 37 insertions(+), 35 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c = index > d42c23c..232d850 100644 > --- a/drivers/net/i40e/i40e_rxtx.c > +++ b/drivers/net/i40e/i40e_rxtx.c > @@ -1736,34 +1736,40 @@ i40e_dev_rx_queue_setup(struct rte_eth_dev > *dev, { > struct i40e_vsi *vsi; > struct i40e_hw *hw =3D I40E_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > - struct i40e_pf *pf =3D I40E_DEV_PRIVATE_TO_PF(dev->data- > >dev_private); > + struct i40e_pf *pf =3D NULL; > struct i40e_adapter *ad =3D > I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); > struct i40e_rx_queue *rxq; > const struct rte_memzone *rz; > uint32_t ring_size; > uint16_t len, i; > - uint16_t base, bsf, tc_mapping; > - int use_def_burst_func =3D 1; > + uint16_t reg_idx, base, bsf, tc_mapping; > + int q_offset, use_def_burst_func =3D 1; >=20 > if (hw->mac.type =3D=3D I40E_MAC_VF || hw->mac.type =3D=3D > I40E_MAC_X722_VF) { > struct i40e_vf *vf =3D > I40EVF_DEV_PRIVATE_TO_VF(dev->data- > >dev_private); One minor comment: how about moving variable vf to the beginning of the fu= nction to align with variable pf? > vsi =3D &vf->vsi; > - } else > + if (!vsi) > + return -EINVAL; > + reg_idx =3D queue_idx; > + } else { > + pf =3D I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); > vsi =3D i40e_pf_get_vsi_by_qindex(pf, queue_idx); > - > - if (vsi =3D=3D NULL) { > - PMD_DRV_LOG(ERR, "VSI not available or queue " > - "index exceeds the maximum"); > - return I40E_ERR_PARAM; > + if (!vsi) > + return -EINVAL; > + q_offset =3D i40e_get_queue_offset_by_qindex(pf, > queue_idx); > + if (q_offset < 0) > + return -EINVAL; > + reg_idx =3D vsi->base_queue + q_offset; > } > + > if (nb_desc % I40E_ALIGN_RING_DESC !=3D 0 || > - (nb_desc > I40E_MAX_RING_DESC) || > - (nb_desc < I40E_MIN_RING_DESC)) { > + (nb_desc > I40E_MAX_RING_DESC) || > + (nb_desc < I40E_MIN_RING_DESC)) { > PMD_DRV_LOG(ERR, "Number (%u) of receive descriptors is > " > "invalid", nb_desc); > - return I40E_ERR_PARAM; > + return -EINVAL; > } >=20 > /* Free memory if needed */ > @@ -1786,12 +1792,7 @@ i40e_dev_rx_queue_setup(struct rte_eth_dev > *dev, > rxq->nb_rx_desc =3D nb_desc; > rxq->rx_free_thresh =3D rx_conf->rx_free_thresh; > rxq->queue_id =3D queue_idx; > - if (hw->mac.type =3D=3D I40E_MAC_VF || hw->mac.type =3D=3D > I40E_MAC_X722_VF) > - rxq->reg_idx =3D queue_idx; > - else /* PF device */ > - rxq->reg_idx =3D vsi->base_queue + > - i40e_get_queue_offset_by_qindex(pf, queue_idx); > - > + rxq->reg_idx =3D reg_idx; > rxq->port_id =3D dev->data->port_id; > rxq->crc_len =3D (uint8_t) ((dev->data- > >dev_conf.rxmode.hw_strip_crc) ? > 0 : ETHER_CRC_LEN); > @@ -2014,32 +2015,38 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev > *dev, { > struct i40e_vsi *vsi; > struct i40e_hw *hw =3D I40E_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > - struct i40e_pf *pf =3D I40E_DEV_PRIVATE_TO_PF(dev->data- > >dev_private); > + struct i40e_pf *pf =3D NULL; > struct i40e_tx_queue *txq; > const struct rte_memzone *tz; > uint32_t ring_size; > uint16_t tx_rs_thresh, tx_free_thresh; > - uint16_t i, base, bsf, tc_mapping; > + uint16_t reg_idx, i, base, bsf, tc_mapping; > + int q_offset; >=20 > if (hw->mac.type =3D=3D I40E_MAC_VF || hw->mac.type =3D=3D > I40E_MAC_X722_VF) { > struct i40e_vf *vf =3D > I40EVF_DEV_PRIVATE_TO_VF(dev->data- > >dev_private); Same comment here. > vsi =3D &vf->vsi; > - } else > + if (!vsi) > + return -EINVAL; > + reg_idx =3D queue_idx; > + } else { > + pf =3D I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); > vsi =3D i40e_pf_get_vsi_by_qindex(pf, queue_idx); > - > - if (vsi =3D=3D NULL) { > - PMD_DRV_LOG(ERR, "VSI is NULL, or queue index (%u) " > - "exceeds the maximum", queue_idx); > - return I40E_ERR_PARAM; > + if (!vsi) > + return -EINVAL; > + q_offset =3D i40e_get_queue_offset_by_qindex(pf, > queue_idx); > + if (q_offset < 0) > + return -EINVAL; > + reg_idx =3D vsi->base_queue + q_offset; > } >=20 > if (nb_desc % I40E_ALIGN_RING_DESC !=3D 0 || > - (nb_desc > I40E_MAX_RING_DESC) || > - (nb_desc < I40E_MIN_RING_DESC)) { > + (nb_desc > I40E_MAX_RING_DESC) || > + (nb_desc < I40E_MIN_RING_DESC)) { > PMD_DRV_LOG(ERR, "Number (%u) of transmit descriptors > is " > "invalid", nb_desc); > - return I40E_ERR_PARAM; > + return -EINVAL; > } >=20 > /** > @@ -2148,12 +2155,7 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev > *dev, > txq->hthresh =3D tx_conf->tx_thresh.hthresh; > txq->wthresh =3D tx_conf->tx_thresh.wthresh; > txq->queue_id =3D queue_idx; > - if (hw->mac.type =3D=3D I40E_MAC_VF || hw->mac.type =3D=3D > I40E_MAC_X722_VF) > - txq->reg_idx =3D queue_idx; > - else /* PF device */ > - txq->reg_idx =3D vsi->base_queue + > - i40e_get_queue_offset_by_qindex(pf, queue_idx); > - > + txq->reg_idx =3D reg_idx; > txq->port_id =3D dev->data->port_id; > txq->txq_flags =3D tx_conf->txq_flags; > txq->vsi =3D vsi; > -- > 2.7.4