From: Alvin Zhang <alvinx.zhang@intel.com> If support-multi-driver option been set, we suppose the DPDK will not modify the value of global register GLQF_FD_MSK. Current situation is if we create a new flow with 'flow creat ...' command, the register value may be changed. Fixes: cfdfca493cae ("net/i40e: fix multiple driver support") Cc: stable@dpdk.org Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com> --- drivers/net/i40e/i40e_flow.c | 34 +++++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index e902a35..8c54394 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -2349,6 +2349,33 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, if (num < 0) return -EINVAL; + if (pf->support_multi_driver) { + for (i = 0; i < num; i++) + if (i40e_read_rx_ctl(hw, + I40E_GLQF_FD_MSK(i, pctype)) != + mask_reg[i]) { + PMD_DRV_LOG(ERR, "Input set setting is not" + " supported."); + return -1; + } + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) + if (i40e_read_rx_ctl(hw, + I40E_GLQF_FD_MSK(i, pctype)) != 0) { + PMD_DRV_LOG(ERR, "Input set setting is not" + " supported."); + return -1; + } + + } else { + for (i = 0; i < num; i++) + i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), + mask_reg[i]); + /*clear unused mask registers of the pctype */ + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) + i40e_check_write_reg(hw, + I40E_GLQF_FD_MSK(i, pctype), 0); + } + inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), @@ -2357,13 +2384,6 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, (uint32_t)((inset_reg >> I40E_32_BIT_WIDTH) & UINT32_MAX)); - for (i = 0; i < num; i++) - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), - mask_reg[i]); - - /*clear unused mask registers of the pctype */ - for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0); I40E_WRITE_FLUSH(hw); pf->fdir.input_set[pctype] = input_set; -- 1.8.3.1
> -----Original Message----- > From: Zhang, AlvinX > Sent: Friday, September 20, 2019 6:57 PM > To: Zhang, Qi Z <qi.z.zhang@intel.com>; Xing, Beilei <beilei.xing@intel.com> > Cc: dev@dpdk.org; Zhang, AlvinX <alvinx.zhang@intel.com>; > stable@dpdk.org > Subject: [PATCH] net/i40e: fix conflict with multi-driver > > From: Alvin Zhang <alvinx.zhang@intel.com> > > If support-multi-driver option been set, we suppose the DPDK will not modify > the value of global register GLQF_FD_MSK. Current situation is if we create a > new flow with 'flow creat ...' command, the register value may be changed. Thanks for the fix, the patch looks OK for me, but the commit log should be amended. How about "If support-multi-driver is enabled, the global registers should not be configured. But with the correct code base, if creating a flow with rte_flow API, the global register GLQF_FD_MSK may be changed." ? Beilei > > Fixes: cfdfca493cae ("net/i40e: fix multiple driver support") > Cc: stable@dpdk.org > > Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com> > --- > drivers/net/i40e/i40e_flow.c | 34 +++++++++++++++++++++++++++------- > 1 file changed, 27 insertions(+), 7 deletions(-) > > diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c > index e902a35..8c54394 100644 > --- a/drivers/net/i40e/i40e_flow.c > +++ b/drivers/net/i40e/i40e_flow.c > @@ -2349,6 +2349,33 @@ static int i40e_flow_destroy_tunnel_filter(struct > i40e_pf *pf, > if (num < 0) > return -EINVAL; > > + if (pf->support_multi_driver) { > + for (i = 0; i < num; i++) > + if (i40e_read_rx_ctl(hw, > + I40E_GLQF_FD_MSK(i, pctype)) != > + mask_reg[i]) { > + PMD_DRV_LOG(ERR, "Input set setting is not" > + " supported."); > + return -1; > + } > + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) > + if (i40e_read_rx_ctl(hw, > + I40E_GLQF_FD_MSK(i, pctype)) != 0) { > + PMD_DRV_LOG(ERR, "Input set setting is not" > + " supported."); > + return -1; > + } > + > + } else { > + for (i = 0; i < num; i++) > + i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), > + mask_reg[i]); > + /*clear unused mask registers of the pctype */ > + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) > + i40e_check_write_reg(hw, > + I40E_GLQF_FD_MSK(i, pctype), 0); > + } > + > inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); > > i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), @@ > -2357,13 +2384,6 @@ static int i40e_flow_destroy_tunnel_filter(struct > i40e_pf *pf, > (uint32_t)((inset_reg >> > I40E_32_BIT_WIDTH) & UINT32_MAX)); > > - for (i = 0; i < num; i++) > - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), > - mask_reg[i]); > - > - /*clear unused mask registers of the pctype */ > - for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) > - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0); > I40E_WRITE_FLUSH(hw); > > pf->fdir.input_set[pctype] = input_set; > -- > 1.8.3.1
From: Alvin Zhang <alvinx.zhang@intel.com> If support-multi-driver is enabled, the global registers should not be configured. But with the correct code base, if creating a flow with rte_flow API, the global register GLQF_FD_MSK may be changed. Fixes: cfdfca493cae ("net/i40e: fix multiple driver support") Cc: stable@dpdk.org Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com> -- v2: modify codes according to the comments. --- drivers/net/i40e/i40e_flow.c | 34 +++++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index e902a35..9dd7b13 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -2349,6 +2349,33 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, if (num < 0) return -EINVAL; + if (pf->support_multi_driver) { + for (i = 0; i < num; i++) + if (i40e_read_rx_ctl(hw, + I40E_GLQF_FD_MSK(i, pctype)) != + mask_reg[i]) { + PMD_DRV_LOG(ERR, "Input set setting is not" + " supported."); + return -EPERM; + } + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) + if (i40e_read_rx_ctl(hw, + I40E_GLQF_FD_MSK(i, pctype)) != 0) { + PMD_DRV_LOG(ERR, "Input set setting is not" + " supported."); + return -EPERM; + } + + } else { + for (i = 0; i < num; i++) + i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), + mask_reg[i]); + /*clear unused mask registers of the pctype */ + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) + i40e_check_write_reg(hw, + I40E_GLQF_FD_MSK(i, pctype), 0); + } + inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), @@ -2357,13 +2384,6 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, (uint32_t)((inset_reg >> I40E_32_BIT_WIDTH) & UINT32_MAX)); - for (i = 0; i < num; i++) - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), - mask_reg[i]); - - /*clear unused mask registers of the pctype */ - for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0); I40E_WRITE_FLUSH(hw); pf->fdir.input_set[pctype] = input_set; -- 1.8.3.1
On 09/26, alvinx.zhang@intel.com wrote: >From: Alvin Zhang <alvinx.zhang@intel.com> > >If support-multi-driver is enabled, the global registers should not >be configured. But with the correct code base, if creating a flow correct -> current >with rte_flow API, the global register GLQF_FD_MSK may be changed. > >Fixes: cfdfca493cae ("net/i40e: fix multiple driver support") >Cc: stable@dpdk.org > >Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com> >-- > >v2: modify codes according to the comments. >--- > drivers/net/i40e/i40e_flow.c | 34 +++++++++++++++++++++++++++------- > 1 file changed, 27 insertions(+), 7 deletions(-) > >diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c >index e902a35..9dd7b13 100644 >--- a/drivers/net/i40e/i40e_flow.c >+++ b/drivers/net/i40e/i40e_flow.c >@@ -2349,6 +2349,33 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, > if (num < 0) > return -EINVAL; > >+ if (pf->support_multi_driver) { >+ for (i = 0; i < num; i++) >+ if (i40e_read_rx_ctl(hw, >+ I40E_GLQF_FD_MSK(i, pctype)) != >+ mask_reg[i]) { >+ PMD_DRV_LOG(ERR, "Input set setting is not" >+ " supported."); Could you mention multi-driver in the err log? otherwise this info is misleading. >+ return -EPERM; >+ } >+ for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) >+ if (i40e_read_rx_ctl(hw, >+ I40E_GLQF_FD_MSK(i, pctype)) != 0) { >+ PMD_DRV_LOG(ERR, "Input set setting is not" >+ " supported."); Ditto. Thanks, Xiaolong >+ return -EPERM; >+ } >+ >+ } else { >+ for (i = 0; i < num; i++) >+ i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), >+ mask_reg[i]); >+ /*clear unused mask registers of the pctype */ >+ for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) >+ i40e_check_write_reg(hw, >+ I40E_GLQF_FD_MSK(i, pctype), 0); >+ } >+ > inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); > > i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), >@@ -2357,13 +2384,6 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, > (uint32_t)((inset_reg >> > I40E_32_BIT_WIDTH) & UINT32_MAX)); > >- for (i = 0; i < num; i++) >- i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), >- mask_reg[i]); >- >- /*clear unused mask registers of the pctype */ >- for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) >- i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0); > I40E_WRITE_FLUSH(hw); > > pf->fdir.input_set[pctype] = input_set; >-- >1.8.3.1 >
From: Alvin Zhang <alvinx.zhang@intel.com> If support-multi-driver is enabled, the global registers should not be configured. But with the current code base, if creating a flow with rte_flow API, the global register GLQF_FD_MSK may be changed. Fixes: cfdfca493cae ("net/i40e: fix multiple driver support") Cc: stable@dpdk.org Signed-off-by: root <alvinx.zhang@intel.com> -- v3: modify codes according to the comments. v2: modify codes according to the comments. --- drivers/net/i40e/i40e_flow.c | 38 +++++++++++++++++++++++++++++++------- 1 file changed, 31 insertions(+), 7 deletions(-) diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index e902a35..f9c3183 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -2349,6 +2349,37 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, if (num < 0) return -EINVAL; + if (pf->support_multi_driver) { + for (i = 0; i < num; i++) + if (i40e_read_rx_ctl(hw, + I40E_GLQF_FD_MSK(i, pctype)) != + mask_reg[i]) { + PMD_DRV_LOG(ERR, "Input set setting is not" + " supported with" + " `support-multi-driver`" + " enabled!"); + return -EPERM; + } + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) + if (i40e_read_rx_ctl(hw, + I40E_GLQF_FD_MSK(i, pctype)) != 0) { + PMD_DRV_LOG(ERR, "Input set setting is not" + " supported with" + " `support-multi-driver`" + " enabled!"); + return -EPERM; + } + + } else { + for (i = 0; i < num; i++) + i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), + mask_reg[i]); + /*clear unused mask registers of the pctype */ + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) + i40e_check_write_reg(hw, + I40E_GLQF_FD_MSK(i, pctype), 0); + } + inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), @@ -2357,13 +2388,6 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, (uint32_t)((inset_reg >> I40E_32_BIT_WIDTH) & UINT32_MAX)); - for (i = 0; i < num; i++) - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), - mask_reg[i]); - - /*clear unused mask registers of the pctype */ - for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0); I40E_WRITE_FLUSH(hw); pf->fdir.input_set[pctype] = input_set; -- 1.8.3.1
From: Alvin Zhang <alvinx.zhang@intel.com> If support-multi-driver is enabled, the global registers should not be configured. But with the current code base, if creating a flow with rte_flow API, the global register GLQF_FD_MSK may be changed. Fixes: cfdfca493cae ("net/i40e: fix multiple driver support") Cc: stable@dpdk.org Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com> -- v3: modify codes according to the comments. v2: modify codes according to the comments. --- drivers/net/i40e/i40e_flow.c | 38 +++++++++++++++++++++++++++++++------- 1 file changed, 31 insertions(+), 7 deletions(-) diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index e902a35..f9c3183 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -2349,6 +2349,37 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, if (num < 0) return -EINVAL; + if (pf->support_multi_driver) { + for (i = 0; i < num; i++) + if (i40e_read_rx_ctl(hw, + I40E_GLQF_FD_MSK(i, pctype)) != + mask_reg[i]) { + PMD_DRV_LOG(ERR, "Input set setting is not" + " supported with" + " `support-multi-driver`" + " enabled!"); + return -EPERM; + } + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) + if (i40e_read_rx_ctl(hw, + I40E_GLQF_FD_MSK(i, pctype)) != 0) { + PMD_DRV_LOG(ERR, "Input set setting is not" + " supported with" + " `support-multi-driver`" + " enabled!"); + return -EPERM; + } + + } else { + for (i = 0; i < num; i++) + i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), + mask_reg[i]); + /*clear unused mask registers of the pctype */ + for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) + i40e_check_write_reg(hw, + I40E_GLQF_FD_MSK(i, pctype), 0); + } + inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), @@ -2357,13 +2388,6 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, (uint32_t)((inset_reg >> I40E_32_BIT_WIDTH) & UINT32_MAX)); - for (i = 0; i < num; i++) - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), - mask_reg[i]); - - /*clear unused mask registers of the pctype */ - for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) - i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0); I40E_WRITE_FLUSH(hw); pf->fdir.input_set[pctype] = input_set; -- 1.8.3.1
On 10/08, alvinx.zhang@intel.com wrote: >From: Alvin Zhang <alvinx.zhang@intel.com> > >If support-multi-driver is enabled, the global registers should not >be configured. But with the current code base, if creating a flow >with rte_flow API, the global register GLQF_FD_MSK may be changed. > >Fixes: cfdfca493cae ("net/i40e: fix multiple driver support") >Cc: stable@dpdk.org > >Signed-off-by: root <alvinx.zhang@intel.com> The signature should be Alvin Zhang <alvinx.zhang@intel.com>, fixed it while merging. >-- > >v3: modify codes according to the comments. >v2: modify codes according to the comments. Better to be specific about the changes you made for each version. >--- > drivers/net/i40e/i40e_flow.c | 38 +++++++++++++++++++++++++++++++------- > 1 file changed, 31 insertions(+), 7 deletions(-) > >diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c >index e902a35..f9c3183 100644 >--- a/drivers/net/i40e/i40e_flow.c >+++ b/drivers/net/i40e/i40e_flow.c >@@ -2349,6 +2349,37 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, > if (num < 0) > return -EINVAL; > >+ if (pf->support_multi_driver) { >+ for (i = 0; i < num; i++) >+ if (i40e_read_rx_ctl(hw, >+ I40E_GLQF_FD_MSK(i, pctype)) != >+ mask_reg[i]) { >+ PMD_DRV_LOG(ERR, "Input set setting is not" >+ " supported with" >+ " `support-multi-driver`" >+ " enabled!"); >+ return -EPERM; >+ } >+ for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) >+ if (i40e_read_rx_ctl(hw, >+ I40E_GLQF_FD_MSK(i, pctype)) != 0) { >+ PMD_DRV_LOG(ERR, "Input set setting is not" >+ " supported with" >+ " `support-multi-driver`" >+ " enabled!"); >+ return -EPERM; >+ } >+ >+ } else { >+ for (i = 0; i < num; i++) >+ i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), >+ mask_reg[i]); >+ /*clear unused mask registers of the pctype */ >+ for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) >+ i40e_check_write_reg(hw, >+ I40E_GLQF_FD_MSK(i, pctype), 0); >+ } >+ > inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set); > > i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), >@@ -2357,13 +2388,6 @@ static int i40e_flow_destroy_tunnel_filter(struct i40e_pf *pf, > (uint32_t)((inset_reg >> > I40E_32_BIT_WIDTH) & UINT32_MAX)); > >- for (i = 0; i < num; i++) >- i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), >- mask_reg[i]); >- >- /*clear unused mask registers of the pctype */ >- for (i = num; i < I40E_INSET_MASK_NUM_REG; i++) >- i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0); > I40E_WRITE_FLUSH(hw); > > pf->fdir.input_set[pctype] = input_set; >-- >1.8.3.1 > Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com> Applied to dpdk-next-net-intel. Thanks.
From: Beilei Xing <beilei.xing@intel.com> PMD configures the global register I40E_GLINT_CTL during device initialization to work around the Rx write back issue. But when a device is bound from DPDK to kernel, the global register is not recovered to the original state, it will cause kernel driver performance drop issue. This patch fixes this issue. Fixes: be6c228d4da3 ("i40e: support Rx interrupt") Cc: stable@dpdk.org Signed-off-by: Beilei Xing <beilei.xing@intel.com> --- drivers/net/i40e/i40e_ethdev.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index f54769c29d..2cb18ecc03 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -763,6 +763,21 @@ static inline void i40e_config_automask(struct i40e_pf *pf) I40E_WRITE_REG(hw, I40E_GLINT_CTL, val); } +static inline void i40e_clear_automask(struct i40e_pf *pf) +{ + struct i40e_hw *hw = I40E_PF_TO_HW(pf); + uint32_t val; + + val = I40E_READ_REG(hw, I40E_GLINT_CTL); + val &= ~(I40E_GLINT_CTL_DIS_AUTOMASK_PF0_MASK | + I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK); + + if (!pf->support_multi_driver) + val &= ~I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK; + + I40E_WRITE_REG(hw, I40E_GLINT_CTL, val); +} + #define I40E_FLOW_CONTROL_ETHERTYPE 0x8808 /* @@ -2741,6 +2756,8 @@ i40e_dev_close(struct rte_eth_dev *dev) /* Remove all Traffic Manager configuration */ i40e_tm_conf_uninit(dev); + i40e_clear_automask(pf); + hw->adapter_closed = 1; return ret; } -- 2.26.2
Hi, beilei > -----Original Message----- > From: Xing, Beilei <beilei.xing@intel.com> > Sent: Thursday, November 19, 2020 2:16 PM > To: dev@dpdk.org > Cc: Guo, Jia <jia.guo@intel.com>; Xing, Beilei <beilei.xing@intel.com>; > stable@dpdk.org > Subject: [PATCH] net/i40e: fix conflict with multi-driver > Seems that this patch both handle multi-driver and none multi-driver. I am not sure if it need to rename to a better name, you choice. " net/i40e: fix global register recovery"? > From: Beilei Xing <beilei.xing@intel.com> > > PMD configures the global register I40E_GLINT_CTL during device > initialization to work around the Rx write back issue. But when a device is > bound from DPDK to kernel, the global register is not recovered to the > original state, it will cause kernel driver performance drop issue. > This patch fixes this issue. > > Fixes: be6c228d4da3 ("i40e: support Rx interrupt") If the issue is root cause that the miss-pair automask configure and automask clear, do you think it will be better to add one more fixes tag as below? Fixes: 4ab831449a1c ("net/i40e: fix interrupt conflict with multi-driver ") > Cc: stable@dpdk.org > > Signed-off-by: Beilei Xing <beilei.xing@intel.com> > --- > drivers/net/i40e/i40e_ethdev.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c > index f54769c29d..2cb18ecc03 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -763,6 +763,21 @@ static inline void i40e_config_automask(struct > i40e_pf *pf) > I40E_WRITE_REG(hw, I40E_GLINT_CTL, val); } > > +static inline void i40e_clear_automask(struct i40e_pf *pf) { > + struct i40e_hw *hw = I40E_PF_TO_HW(pf); > + uint32_t val; > + > + val = I40E_READ_REG(hw, I40E_GLINT_CTL); > + val &= ~(I40E_GLINT_CTL_DIS_AUTOMASK_PF0_MASK | > + I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK); > + > + if (!pf->support_multi_driver) > + val &= ~I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK; > + > + I40E_WRITE_REG(hw, I40E_GLINT_CTL, val); } > + > #define I40E_FLOW_CONTROL_ETHERTYPE 0x8808 > > /* > @@ -2741,6 +2756,8 @@ i40e_dev_close(struct rte_eth_dev *dev) > /* Remove all Traffic Manager configuration */ > i40e_tm_conf_uninit(dev); > > + i40e_clear_automask(pf); > + > hw->adapter_closed = 1; > return ret; > } > -- > 2.26.2