From: "Morten Brørup" <mb@smartsharesystems.com>
To: "Bhagyada Modali" <bhagyada.modali@amd.com>, <dev@dpdk.org>,
": Andrew Rybchenko" <andrew.rybchenko@oktetlabs.ru>
Cc: <ssebasti@amd.com>, <rningoji@amd.com>,
"Chengwen Feng" <fengchengwen@huawei.com>
Subject: RE: [PATCH] dma\ae4dma: added AMD user space DMA driver
Date: Mon, 10 Mar 2025 10:35:08 +0100 [thread overview]
Message-ID: <98CBD80474FA8B44BF855DF32C47DC35E9FAD0@smartserver.smartshare.dk> (raw)
In-Reply-To: <20250309084526.972512-1-bhagyada.modali@amd.com>
> --- a/lib/mempool/rte_mempool.h
> +++ b/lib/mempool/rte_mempool.h
> @@ -136,7 +136,7 @@ struct rte_mempool_objsz {
> /**
> * Alignment of elements inside mempool.
> */
> -#define RTE_MEMPOOL_ALIGN RTE_CACHE_LINE_SIZE
> +#define RTE_MEMPOOL_ALIGN 4096
NAK!
This would nearly double the memory footprint of ordinary mbuf pools (with object size 2048).
And the memory footprint of mempools containing small objects would explode.
> #endif
>
> #define RTE_MEMPOOL_ALIGN_MASK (RTE_MEMPOOL_ALIGN - 1)
prev parent reply other threads:[~2025-03-10 9:35 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-09 8:45 Bhagyada Modali
2025-03-10 2:33 ` fengchengwen
2025-03-10 9:35 ` Morten Brørup [this message]
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