From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 43C972906 for ; Mon, 10 Oct 2016 16:02:42 +0200 (CEST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP; 10 Oct 2016 07:02:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,324,1473145200"; d="scan'208";a="178334398" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga004.fm.intel.com with ESMTP; 10 Oct 2016 07:02:41 -0700 Received: from fmsmsx153.amr.corp.intel.com (10.18.125.6) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 10 Oct 2016 07:02:40 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX153.amr.corp.intel.com (10.18.125.6) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 10 Oct 2016 07:02:40 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.234]) by shsmsx102.ccr.corp.intel.com ([169.254.2.15]) with mapi id 14.03.0248.002; Mon, 10 Oct 2016 22:02:37 +0800 From: "Wu, Jingjing" To: "Kulasek, TomaszX" , "dev@dpdk.org" CC: "Ananyev, Konstantin" , "Kulasek, TomaszX" Thread-Topic: [dpdk-dev] [PATCH v4 4/6] i40e: add Tx preparation Thread-Index: AQHSGvlub+LOygNyeUChDu26Tbn/kaChxP0Q Date: Mon, 10 Oct 2016 14:02:36 +0000 Message-ID: <9BB6961774997848B5B42BEC655768F80E277E47@SHSMSX103.ccr.corp.intel.com> References: <20160928111052.9968-1-tomaszx.kulasek@intel.com> <20160930090039.10164-1-tomaszx.kulasek@intel.com> <20160930090039.10164-5-tomaszx.kulasek@intel.com> In-Reply-To: <20160930090039.10164-5-tomaszx.kulasek@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZjMyNjI3NWEtYTJmMy00M2MwLThkOTgtOGFhMjJhYTBhMjJlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IjN5U1Z5WE1FbzZOM2IyditJcjZ5bVhOdTJBck40K3Izd1VwMHpyb3U5RnM9In0= x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4 4/6] i40e: add Tx preparation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 10 Oct 2016 14:02:42 -0000 > #include "i40e_logs.h" > #include "base/i40e_prototype.h" > @@ -79,6 +81,17 @@ > PKT_TX_TCP_SEG | \ > PKT_TX_OUTER_IP_CKSUM) >=20 > +#define I40E_TX_OFFLOAD_MASK ( \ > + PKT_TX_IP_CKSUM | \ > + PKT_TX_L4_MASK | \ > + PKT_TX_OUTER_IP_CKSUM | \ > + PKT_TX_TCP_SEG | \ > + PKT_TX_QINQ_PKT | \ > + PKT_TX_VLAN_PKT) > + More TX flags are added for tunneling as below. /** * Bits 45:48 used for the tunnel type. * When doing Tx offload like TSO or checksum, the HW needs to configure th= e * tunnel type into the HW descriptors. */ #define PKT_TX_TUNNEL_VXLAN (0x1ULL << 45) #define PKT_TX_TUNNEL_GRE (0x2ULL << 45) #define PKT_TX_TUNNEL_IPIP (0x3ULL << 45) #define PKT_TX_TUNNEL_GENEVE (0x4ULL << 45) /* add new TX TUNNEL type here */ #define PKT_TX_TUNNEL_MASK (0xFULL << 45) Please check: commit 63c0d74daaa9a807fbca8a3e363bbe41d6fb715f Author: Jianfeng Tan Date: Mon Aug 1 03:56:53 2016 +0000 mbuf: add Tx side tunneling type Thanks Jingjing