From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 18AE72C4F for ; Wed, 30 Nov 2016 01:35:40 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP; 29 Nov 2016 16:35:39 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,719,1473145200"; d="scan'208";a="1075335745" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga001.fm.intel.com with ESMTP; 29 Nov 2016 16:35:39 -0800 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 29 Nov 2016 16:35:38 -0800 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX152.amr.corp.intel.com (10.18.125.5) with Microsoft SMTP Server (TLS) id 14.3.248.2; Tue, 29 Nov 2016 16:35:38 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.96]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.239]) with mapi id 14.03.0248.002; Wed, 30 Nov 2016 08:35:22 +0800 From: "Wu, Jingjing" To: "Yigit, Ferruh" , "dev@dpdk.org" CC: "Zhang, Helin" Thread-Topic: [dpdk-dev] [PATCH] net/i40evf: fix casting between structs Thread-Index: AQHSSJGotCEpG1eqdk6r9TdI/XWh6aDvniOAgAEThfA= Date: Wed, 30 Nov 2016 00:35:21 +0000 Message-ID: <9BB6961774997848B5B42BEC655768F80E2BD17E@SHSMSX103.ccr.corp.intel.com> References: <1480239317-7827-1-git-send-email-jingjing.wu@intel.com> <2c330ced-2d11-446e-0e2b-c6dd5aa49f8b@intel.com> In-Reply-To: <2c330ced-2d11-446e-0e2b-c6dd5aa49f8b@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] net/i40evf: fix casting between structs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 30 Nov 2016 00:35:41 -0000 > -----Original Message----- > From: Yigit, Ferruh > Sent: Wednesday, November 30, 2016 12:08 AM > To: Wu, Jingjing ; dev@dpdk.org > Cc: Zhang, Helin > Subject: Re: [dpdk-dev] [PATCH] net/i40evf: fix casting between structs >=20 > On 11/27/2016 9:35 AM, Jingjing Wu wrote: > > Casting from structs which lay out data in typed members to structs > > which have flat memory buffers, will cause problems if the alignment > > of the former isn't as expected. > > This patch removes the casting between structs. > > > > Fixes: ae19955e7c86 ("i40evf: support reporting PF reset") > > Signed-off-by: Jingjing Wu > > --- > > drivers/net/i40e/i40e_ethdev_vf.c | 27 +++++++++++++++------------ > > 1 file changed, 15 insertions(+), 12 deletions(-) > > > > diff --git a/drivers/net/i40e/i40e_ethdev_vf.c > > b/drivers/net/i40e/i40e_ethdev_vf.c > > index aa306d6..53d7c87 100644 > > --- a/drivers/net/i40e/i40e_ethdev_vf.c > > +++ b/drivers/net/i40e/i40e_ethdev_vf.c > > @@ -1336,8 +1336,9 @@ i40evf_handle_aq_msg(struct rte_eth_dev *dev) > > struct i40e_hw *hw =3D I40E_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > > struct i40e_vf *vf =3D I40EVF_DEV_PRIVATE_TO_VF(dev->data- > >dev_private); > > struct i40e_arq_event_info info; > > - struct i40e_virtchnl_msg *v_msg; > > - uint16_t pending, opcode; > > + uint16_t pending, aq_opc; > > + enum i40e_virtchnl_ops msg_opc; > > + enum i40e_status_code msg_ret; > > int ret; > > > > info.buf_len =3D I40E_AQ_BUF_SZ; > > @@ -1346,7 +1347,6 @@ i40evf_handle_aq_msg(struct rte_eth_dev *dev) > > return; > > } > > info.msg_buf =3D vf->aq_resp; > > - v_msg =3D (struct i40e_virtchnl_msg *)&info.desc; > > > > pending =3D 1; > > while (pending) { > > @@ -1357,32 +1357,35 @@ i40evf_handle_aq_msg(struct rte_eth_dev *dev) > > "ret: %d", ret); > > break; > > } > > - opcode =3D rte_le_to_cpu_16(info.desc.opcode); > > - > > - switch (opcode) { > > + aq_opc =3D rte_le_to_cpu_16(info.desc.opcode); > > + msg_opc =3D (enum i40e_virtchnl_ops)rte_le_to_cpu_32( > > + info.desc.cookie_high); > > + msg_ret =3D (enum i40e_status_code)rte_le_to_cpu_32( > > + info.desc.cookie_low); >=20 > What do you think commenting cookie_high is opcode and cookie_low is > return_value? >=20 OK. Will add some comments. > > + switch (aq_opc) { > > case i40e_aqc_opc_send_msg_to_vf: > > - if (v_msg->v_opcode =3D=3D I40E_VIRTCHNL_OP_EVENT) > > + if (msg_opc =3D=3D I40E_VIRTCHNL_OP_EVENT) > > /* process event*/ > > i40evf_handle_pf_event(dev, info.msg_buf, > > info.msg_len); > > else { > > /* read message and it's expected one */ > > - if (v_msg->v_opcode =3D=3D vf->pend_cmd) { > > - vf->cmd_retval =3D v_msg->v_retval; > > + if (msg_opc =3D=3D vf->pend_cmd) { > > + vf->cmd_retval =3D msg_ret; > > /* prevent compiler reordering */ > > rte_compiler_barrier(); > > _clear_cmd(vf); > > } else > > PMD_DRV_LOG(ERR, "command > mismatch," > > "expect %u, get %u", > > - vf->pend_cmd, v_msg- > >v_opcode); > > + vf->pend_cmd, msg_ret); >=20 > s/msg_ret/msg_opc/ ? Yes, should use msg_opc here. Thanks! Will update! Thanks Jingjing