From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 7660F58CB for ; Mon, 5 Dec 2016 09:44:52 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP; 05 Dec 2016 00:44:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,303,1477983600"; d="scan'208";a="1068032875" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga001.jf.intel.com with ESMTP; 05 Dec 2016 00:44:51 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.248.2; Mon, 5 Dec 2016 00:44:51 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.96]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.142]) with mapi id 14.03.0248.002; Mon, 5 Dec 2016 16:44:49 +0800 From: "Wu, Jingjing" To: "Sexton, Rory" CC: "dev@dpdk.org" , "Marjanovic, Nemanja" , "Mcnamara, John" Thread-Topic: [PATCH v1] net/i40e: set no drop for traffic class Thread-Index: AQHSTjYCOqbbcDGaEEOO58x9QoWgHqD5BVpA Date: Mon, 5 Dec 2016 08:44:49 +0000 Message-ID: <9BB6961774997848B5B42BEC655768F80E2C29D0@SHSMSX103.ccr.corp.intel.com> References: <1480859687-27047-1-git-send-email-rory.sexton@intel.com> In-Reply-To: <1480859687-27047-1-git-send-email-rory.sexton@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v1] net/i40e: set no drop for traffic class X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Dec 2016 08:44:53 -0000 -----Original Message----- From: Sexton, Rory=20 Sent: Sunday, December 4, 2016 9:55 PM To: Wu, Jingjing Cc: dev@dpdk.org; Marjanovic, Nemanja ; Mcnam= ara, John ; Sexton, Rory Subject: [PATCH v1] net/i40e: set no drop for traffic class From: John McNamara The default traffic class in i40e is set to drop versus on ixgbe it isset t= o no drop. This means when packets build up in the RX SRAM on the NIC, they= are dropped, and they do this when the SW descriptor rings fill up. This patch changes this behaviour and our testing shows there are no drops = as a result. Signed-off-by: Rory Sexton Signed-off-by: Nemanja Marjanovic --- drivers/net/i40e/i40e_ethdev.c | 1 + drivers/net/i40e/i40e_rxtx.c | 12 ++++++++++++ drivers/net/i40e/i40e_rxtx.h | 1 + lib/librte_ether/rte_ethdev.h | 24 ++++++++++++++++++++++++ 4 files changed, 38 insertions(+) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.= c index 67778ba..9702acb 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -553,6 +553,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops =3D { .get_eeprom =3D i40e_get_eeprom, .mac_addr_set =3D i40e_set_default_mac_addr, .mtu_set =3D i40e_dev_mtu_set, + .set_no_drop =3D i40e_set_no_drop, }; =20 /* store statistics names and its offset in stats structure */ diff --git = a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index 7ae7d9f= ..02aeff4 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -783,6 +783,18 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pk= ts, uint16_t nb_pkts) return nb_rx; } =20 +uint32_t +i40e_set_no_drop(struct rte_eth_dev *dev, uint16_t rx_queue_id) { + struct i40e_rx_queue *rxq =3D dev->data->rx_queues[rx_queue_id]; + struct i40e_hw *hw =3D I40E_VSI_TO_HW(rxq->vsi); + + /* Set No Drop Traffic Class. */ + I40E_WRITE_REG(hw, 0x1c0980, 0xff); + + return 1; +} 0x1c0980 is the register (PRTDCB_TC2PFC) which is used to control pfc for e= ach TC. We already have ETH_DCB_PFC_SUPPORT flag in rte_eth_conf.dcb_capability_en = to Control if PFC is enabled. And rte_eth_dcb_rx_conf.nb_tcs identified number= of TCs It supports. "I40E_WRITE_REG(hw, 0x1c0980, 0xff);" can be achieved by enabling DCB and P= FC For all TCs. Why do we need such a new API? Thanks Jingjing