From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 88416594B for ; Fri, 8 May 2015 05:22:55 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 07 May 2015 20:22:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,387,1427785200"; d="scan'208";a="722612572" Received: from pgsmsx103.gar.corp.intel.com ([10.221.44.82]) by fmsmga002.fm.intel.com with ESMTP; 07 May 2015 20:22:54 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by PGSMSX103.gar.corp.intel.com (10.221.44.82) with Microsoft SMTP Server (TLS) id 14.3.224.2; Fri, 8 May 2015 11:22:29 +0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.162]) by SHSMSX101.ccr.corp.intel.com ([10.239.4.153]) with mapi id 14.03.0224.002; Fri, 8 May 2015 11:22:28 +0800 From: "Wu, Jingjing" To: "Zhang, Helin" , "dev@dpdk.org" Thread-Topic: [PATCH v2 02/33] i40e: disable setting of phy configuration Thread-Index: AQHQg1byjr649BMVCUWPM71VqZH/f51xdbTw Date: Fri, 8 May 2015 03:22:28 +0000 Message-ID: <9BB6961774997848B5B42BEC655768F8C18328@SHSMSX104.ccr.corp.intel.com> References: <1429518150-28098-1-git-send-email-helin.zhang@intel.com> <1430406219-23901-1-git-send-email-helin.zhang@intel.com> <1430406219-23901-3-git-send-email-helin.zhang@intel.com> In-Reply-To: <1430406219-23901-3-git-send-email-helin.zhang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "Kenguva, Monica" , "Murray, Steven J" , "Nelson, Shannon" Subject: Re: [dpdk-dev] [PATCH v2 02/33] i40e: disable setting of phy configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 08 May 2015 03:22:56 -0000 Acked-by: Jingjing Wu > -----Original Message----- > From: Zhang, Helin > Sent: Thursday, April 30, 2015 11:03 PM > To: dev@dpdk.org > Cc: Cao, Min; Xu, Qian Q; Wu, Jingjing; Liu, Jijiang; Kenguva, Monica; Pa= tel, > Rashmin N; Murray, Steven J; Nelson, Shannon; Zhang, Helin > Subject: [PATCH v2 02/33] i40e: disable setting of phy configuration >=20 > There was a known link issue on 40G ports on NVM version (FVL3E), when > setting phy configuration. As a workaround, setting of phy configuration > should be disabled. The impact is that the link cannot be forcedly config= ured, > which doesn't affect any feature functions. > The workaround can be removed when a formal fix is ready later. >=20 > Signed-off-by: Helin Zhang > --- > lib/librte_pmd_i40e/i40e_ethdev.c | 4 ++++ > 1 file changed, 4 insertions(+) >=20 > diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c > b/lib/librte_pmd_i40e/i40e_ethdev.c > index 40c90d7..49d1067 100644 > --- a/lib/librte_pmd_i40e/i40e_ethdev.c > +++ b/lib/librte_pmd_i40e/i40e_ethdev.c > @@ -791,6 +791,10 @@ i40e_phy_conf_link(struct i40e_hw *hw, uint8_t > abilities, uint8_t force_speed) > I40E_LINK_SPEED_100MB; > int ret =3D -ENOTSUP; >=20 > + /* Skip it on 40G interfaces, as a workaround for the link issue */ > + if (i40e_is_40G_device(hw->device_id)) > + return I40E_SUCCESS; > + > status =3D i40e_aq_get_phy_capabilities(hw, false, false, &phy_ab, > NULL); > if (status) > -- > 1.8.1.4