From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 60F922956 for ; Thu, 25 Feb 2016 08:05:01 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 24 Feb 2016 23:05:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,497,1449561600"; d="scan'208";a="752909947" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga003.jf.intel.com with ESMTP; 24 Feb 2016 23:05:00 -0800 Received: from fmsmsx116.amr.corp.intel.com (10.18.116.20) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 24 Feb 2016 23:05:00 -0800 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx116.amr.corp.intel.com (10.18.116.20) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 24 Feb 2016 23:04:59 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.132]) by shsmsx102.ccr.corp.intel.com ([169.254.2.232]) with mapi id 14.03.0248.002; Thu, 25 Feb 2016 15:04:57 +0800 From: "Wu, Jingjing" To: "Zhang, Helin" , "Richardson, Bruce" Thread-Topic: [PATCH v2 1/3] i40e: enable DCB in VMDQ VSIs Thread-Index: AQHRaVCc6Sk2sUyxX0yCGY8emPiump86SNUAgAIZnGA= Date: Thu, 25 Feb 2016 07:04:57 +0000 Message-ID: <9BB6961774997848B5B42BEC655768F8DC950D@SHSMSX104.ccr.corp.intel.com> References: <1453280236-8778-1-git-send-email-jingjing.wu@intel.com> <1455692300-17883-1-git-send-email-jingjing.wu@intel.com> <1455692300-17883-2-git-send-email-jingjing.wu@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH v2 1/3] i40e: enable DCB in VMDQ VSIs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Feb 2016 07:05:01 -0000 > > + /* 4 bits per TC, 4th bit is reserved */ > > + veb->bw_info.bw_ets_max[i] =3D > > + (uint8_t)((bw_max >> (i * I40E_4_BIT_WIDTH)) & > > + I40E_3_BIT_MASK); > Use RTE_LEN2MASK() to replace I40E_3_BIT_MASK. OK. >=20 > > + PMD_DRV_LOG(DEBUG, "\tVEB TC%u:share credits %u", i, > > + veb->bw_info.bw_ets_share_credits[i]); > > + PMD_DRV_LOG(DEBUG, "\tVEB TC%u:credits %u", i, > > + veb->bw_info.bw_ets_credits[i]); > > + PMD_DRV_LOG(DEBUG, "\tVEB TC%u: max credits: %u", i, > > + veb->bw_info.bw_ets_max[i]); > > + } > > + > > + veb->enabled_tc =3D tc_map; > > + > > + return ret; > > +} > > + > > + > > +/* > > * i40e_vsi_config_tc - Configure VSI tc setting for given TC map > > * @vsi: VSI to be configured > > * @tc_map: enabled TC bitmap > > @@ -8152,7 +8252,7 @@ i40e_vsi_update_queue_mapping(struct i40e_vsi > > *vsi, > > * Returns 0 on success, negative value on failure > > */ > > static enum i40e_status_code > > -i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 tc_map) > > +i40e_vsi_config_tc(struct i40e_vsi *vsi, uint8_t tc_map) > > { > > struct i40e_aqc_configure_vsi_tc_bw_data bw_data; > > struct i40e_vsi_context ctxt; > > @@ -8294,15 +8394,27 @@ i40e_dcb_hw_configure(struct i40e_pf *pf, > > i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_LOCAL, 0, > > &hw->local_dcbx_config); > > > > + /* if Veb is created, need to update TC of it at first */ > > + if (main_vsi->veb) { > > + ret =3D i40e_config_switch_comp_tc(main_vsi->veb, tc_map); > > + if (ret) > > + PMD_INIT_LOG(WARNING, > > + "Failed configuring TC for VEB seid=3D%d\n", > > + main_vsi->veb->seid); > > + } > How about if VEB hasn't been created? If VEB is not created, no need to update tc on switch comp. Thanks Jingjing >=20 > > 2.4.0