From: Paul Emmerich <emmericp@net.in.tum.de>
To: Stephen Hemminger <stephen@networkplumber.org>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] Polling too often at lower packet rates?
Date: Fri, 10 Apr 2015 02:42:46 +0200 [thread overview]
Message-ID: <9DF6C88A-AD12-4B04-899C-23C30FA760F1@net.in.tum.de> (raw)
In-Reply-To: <20150409142437.203fed44@urahara>
Stephen Hemminger <stephen@networkplumber.org> wrote:
> Your excess polling consumes PCI bandwidth which is a fixed resource.
I doubt that this is the problem for three reasons:
* The poll rate would regulate itself if the PCIe bus was the bottleneck
* This problem only occurs with 82599 chips, not with X540 chips
(which are virtually identical except for 10GBase-T vs. fiber)
* This effect already appears with relatively low poll rates (batch size 1).
The overhead would have to be > 128 bytes per poll to saturate the PCIe bus
at this rate. (Even if this was the case, my first point still applies)
I unfortunately don't have a test system with a CPU that supports PCIe
performance counters with a 82599 card. Otherwise I'd measure this since I
think this effect is really interesting (I'm a co-authors of the paper
linked above).
Paul
next prev parent reply other threads:[~2015-04-10 0:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-08 16:35 Aaron Campbell
2015-04-08 18:00 ` Stephen Hemminger
2015-04-09 18:26 ` Aaron Campbell
2015-04-09 21:24 ` Stephen Hemminger
2015-04-10 0:42 ` Paul Emmerich [this message]
2015-04-10 1:05 ` Paul Emmerich
2015-04-08 19:11 ` Ananyev, Konstantin
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