From: Anatoly Burakov <anatoly.burakov@intel.com>
To: dev@dpdk.org
Cc: Ian Stokes <ian.stokes@intel.com>,
bruce.richardson@intel.com,
Przemek Kitszel <przemyslaw.kitszel@intel.com>
Subject: [PATCH v2 001/148] net/ice/base: convert enum ice_status to int
Date: Wed, 12 Jun 2024 15:59:55 +0100 [thread overview]
Message-ID: <9b86f60a2aad0ecf53f55a0bd56e74d22e123415.1718204528.git.anatoly.burakov@intel.com> (raw)
In-Reply-To: <cover.1718204528.git.anatoly.burakov@intel.com>
From: Ian Stokes <ian.stokes@intel.com>
Convert enum ice_status variables/return type to just int.
Do so by applying following:
grep -Inrl ice_status |
grep -v ice_status.h |
xargs -r gawk -i inplace '/[Ii]nclude/ || gsub(/(enum )?ice_status/, "int") || 1'
Signed-off-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Signed-off-by: Ian Stokes <ian.stokes@intel.com>
---
drivers/net/ice/base/ice_acl.c | 56 ++--
drivers/net/ice/base/ice_acl.h | 50 ++--
drivers/net/ice/base/ice_acl_ctrl.c | 36 +--
drivers/net/ice/base/ice_common.c | 267 +++++++++--------
drivers/net/ice/base/ice_common.h | 150 +++++-----
drivers/net/ice/base/ice_controlq.c | 58 ++--
drivers/net/ice/base/ice_dcb.c | 60 ++--
drivers/net/ice/base/ice_dcb.h | 32 +--
drivers/net/ice/base/ice_ddp.c | 48 ++--
drivers/net/ice/base/ice_ddp.h | 14 +-
drivers/net/ice/base/ice_fdir.c | 20 +-
drivers/net/ice/base/ice_fdir.h | 18 +-
drivers/net/ice/base/ice_flex_pipe.c | 176 ++++++------
drivers/net/ice/base/ice_flex_pipe.h | 30 +-
drivers/net/ice/base/ice_flow.c | 136 ++++-----
drivers/net/ice/base/ice_flow.h | 28 +-
drivers/net/ice/base/ice_nvm.c | 119 ++++----
drivers/net/ice/base/ice_nvm.h | 33 +--
drivers/net/ice/base/ice_parser.c | 16 +-
drivers/net/ice/base/ice_parser.h | 12 +-
drivers/net/ice/base/ice_parser_rt.c | 4 +-
drivers/net/ice/base/ice_parser_rt.h | 2 +-
drivers/net/ice/base/ice_ptp_hw.c | 414 +++++++++++++--------------
drivers/net/ice/base/ice_ptp_hw.h | 86 +++---
drivers/net/ice/base/ice_sched.c | 372 ++++++++++++------------
drivers/net/ice/base/ice_sched.h | 96 +++----
drivers/net/ice/base/ice_switch.c | 325 ++++++++++-----------
drivers/net/ice/base/ice_switch.h | 106 +++----
drivers/net/ice/base/ice_vlan_mode.c | 28 +-
drivers/net/ice/base/ice_vlan_mode.h | 2 +-
30 files changed, 1396 insertions(+), 1398 deletions(-)
diff --git a/drivers/net/ice/base/ice_acl.c b/drivers/net/ice/base/ice_acl.c
index fd9c6d5c14..34d031338f 100644
--- a/drivers/net/ice/base/ice_acl.c
+++ b/drivers/net/ice/base/ice_acl.c
@@ -13,7 +13,7 @@
*
* Allocate ACL table (indirect 0x0C10)
*/
-enum ice_status
+int
ice_aq_alloc_acl_tbl(struct ice_hw *hw, struct ice_acl_alloc_tbl *tbl,
struct ice_sq_cd *cd)
{
@@ -64,7 +64,7 @@ ice_aq_alloc_acl_tbl(struct ice_hw *hw, struct ice_acl_alloc_tbl *tbl,
* format is 'struct ice_aqc_acl_generic', pass ptr to that struct
* as 'buf' and its size as 'buf_size'
*/
-enum ice_status
+int
ice_aq_dealloc_acl_tbl(struct ice_hw *hw, u16 alloc_id,
struct ice_aqc_acl_generic *buf, struct ice_sq_cd *cd)
{
@@ -78,7 +78,7 @@ ice_aq_dealloc_acl_tbl(struct ice_hw *hw, u16 alloc_id,
return ice_aq_send_cmd(hw, &desc, buf, sizeof(*buf), cd);
}
-static enum ice_status
+static int
ice_aq_acl_entry(struct ice_hw *hw, u16 opcode, u8 tcam_idx, u16 entry_idx,
struct ice_aqc_acl_data *buf, struct ice_sq_cd *cd)
{
@@ -107,7 +107,7 @@ ice_aq_acl_entry(struct ice_hw *hw, u16 opcode, u8 tcam_idx, u16 entry_idx,
*
* Program ACL entry (direct 0x0C20)
*/
-enum ice_status
+int
ice_aq_program_acl_entry(struct ice_hw *hw, u8 tcam_idx, u16 entry_idx,
struct ice_aqc_acl_data *buf, struct ice_sq_cd *cd)
{
@@ -128,7 +128,7 @@ ice_aq_program_acl_entry(struct ice_hw *hw, u8 tcam_idx, u16 entry_idx,
* NOTE: Caller of this API to parse 'buf' appropriately since it contains
* response (key and key invert)
*/
-enum ice_status
+int
ice_aq_query_acl_entry(struct ice_hw *hw, u8 tcam_idx, u16 entry_idx,
struct ice_aqc_acl_data *buf, struct ice_sq_cd *cd)
{
@@ -137,7 +137,7 @@ ice_aq_query_acl_entry(struct ice_hw *hw, u8 tcam_idx, u16 entry_idx,
}
/* Helper function to alloc/dealloc ACL action pair */
-static enum ice_status
+static int
ice_aq_actpair_a_d(struct ice_hw *hw, u16 opcode, u16 alloc_id,
struct ice_aqc_acl_generic *buf, struct ice_sq_cd *cd)
{
@@ -163,7 +163,7 @@ ice_aq_actpair_a_d(struct ice_hw *hw, u16 opcode, u16 alloc_id,
* This command doesn't need and doesn't have its own command buffer
* but for response format is as specified in 'struct ice_aqc_acl_generic'
*/
-enum ice_status
+int
ice_aq_alloc_actpair(struct ice_hw *hw, u16 alloc_id,
struct ice_aqc_acl_generic *buf, struct ice_sq_cd *cd)
{
@@ -180,7 +180,7 @@ ice_aq_alloc_actpair(struct ice_hw *hw, u16 alloc_id,
*
* Deallocate ACL actionpair (direct 0x0C13)
*/
-enum ice_status
+int
ice_aq_dealloc_actpair(struct ice_hw *hw, u16 alloc_id,
struct ice_aqc_acl_generic *buf, struct ice_sq_cd *cd)
{
@@ -189,7 +189,7 @@ ice_aq_dealloc_actpair(struct ice_hw *hw, u16 alloc_id,
}
/* Helper function to program/query ACL action pair */
-static enum ice_status
+static int
ice_aq_actpair_p_q(struct ice_hw *hw, u16 opcode, u8 act_mem_idx,
u16 act_entry_idx, struct ice_aqc_actpair *buf,
struct ice_sq_cd *cd)
@@ -219,7 +219,7 @@ ice_aq_actpair_p_q(struct ice_hw *hw, u16 opcode, u8 act_mem_idx,
*
* Program action entries (indirect 0x0C1C)
*/
-enum ice_status
+int
ice_aq_program_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
struct ice_aqc_actpair *buf, struct ice_sq_cd *cd)
{
@@ -237,7 +237,7 @@ ice_aq_program_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
*
* Query ACL actionpair (indirect 0x0C25)
*/
-enum ice_status
+int
ice_aq_query_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
struct ice_aqc_actpair *buf, struct ice_sq_cd *cd)
{
@@ -253,7 +253,7 @@ ice_aq_query_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
* De-allocate ACL resources (direct 0x0C1A). Used by SW to release all the
* resources allocated for it using a single command
*/
-enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd)
+int ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd)
{
struct ice_aq_desc desc;
@@ -272,7 +272,7 @@ enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd)
*
* This function sends ACL profile commands
*/
-static enum ice_status
+static int
ice_acl_prof_aq_send(struct ice_hw *hw, u16 opc, u8 prof_id,
struct ice_aqc_acl_prof_generic_frmt *buf,
struct ice_sq_cd *cd)
@@ -296,7 +296,7 @@ ice_acl_prof_aq_send(struct ice_hw *hw, u16 opc, u8 prof_id,
*
* Program ACL profile extraction (indirect 0x0C1D)
*/
-enum ice_status
+int
ice_prgm_acl_prof_xtrct(struct ice_hw *hw, u8 prof_id,
struct ice_aqc_acl_prof_generic_frmt *buf,
struct ice_sq_cd *cd)
@@ -314,7 +314,7 @@ ice_prgm_acl_prof_xtrct(struct ice_hw *hw, u8 prof_id,
*
* Query ACL profile (indirect 0x0C21)
*/
-enum ice_status
+int
ice_query_acl_prof(struct ice_hw *hw, u8 prof_id,
struct ice_aqc_acl_prof_generic_frmt *buf,
struct ice_sq_cd *cd)
@@ -330,7 +330,7 @@ ice_query_acl_prof(struct ice_hw *hw, u8 prof_id,
* This function checks the counter bank range for counter type and returns
* success or failure.
*/
-static enum ice_status ice_aq_acl_cntrs_chk_params(struct ice_acl_cntrs *cntrs)
+static int ice_aq_acl_cntrs_chk_params(struct ice_acl_cntrs *cntrs)
{
enum ice_status status = ICE_SUCCESS;
@@ -373,14 +373,14 @@ static enum ice_status ice_aq_acl_cntrs_chk_params(struct ice_acl_cntrs *cntrs)
* unsuccessful if returned counter value is invalid. In this case it returns
* an error otherwise success.
*/
-enum ice_status
+int
ice_aq_alloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
struct ice_sq_cd *cd)
{
struct ice_aqc_acl_alloc_counters *cmd;
u16 first_cntr, last_cntr;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
/* check for invalid params */
status = ice_aq_acl_cntrs_chk_params(cntrs);
@@ -412,13 +412,13 @@ ice_aq_alloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
*
* De-allocate ACL counters (direct 0x0C17)
*/
-enum ice_status
+int
ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
struct ice_sq_cd *cd)
{
struct ice_aqc_acl_dealloc_counters *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
/* check for invalid params */
status = ice_aq_acl_cntrs_chk_params(cntrs);
@@ -443,7 +443,7 @@ ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
*
* Program ACL profile ranges (indirect 0x0C1E)
*/
-enum ice_status
+int
ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
struct ice_aqc_acl_profile_ranges *buf,
struct ice_sq_cd *cd)
@@ -466,7 +466,7 @@ ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
*
* Query ACL profile ranges (indirect 0x0C22)
*/
-enum ice_status
+int
ice_query_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
struct ice_aqc_acl_profile_ranges *buf,
struct ice_sq_cd *cd)
@@ -488,13 +488,13 @@ ice_query_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
*
* Allocate ACL scenario (indirect 0x0C14)
*/
-enum ice_status
+int
ice_aq_alloc_acl_scen(struct ice_hw *hw, u16 *scen_id,
struct ice_aqc_acl_scen *buf, struct ice_sq_cd *cd)
{
struct ice_aqc_acl_alloc_scen *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (!scen_id)
return ICE_ERR_PARAM;
@@ -518,7 +518,7 @@ ice_aq_alloc_acl_scen(struct ice_hw *hw, u16 *scen_id,
*
* Deallocate ACL scenario (direct 0x0C15)
*/
-enum ice_status
+int
ice_aq_dealloc_acl_scen(struct ice_hw *hw, u16 scen_id, struct ice_sq_cd *cd)
{
struct ice_aqc_acl_dealloc_scen *cmd;
@@ -541,7 +541,7 @@ ice_aq_dealloc_acl_scen(struct ice_hw *hw, u16 scen_id, struct ice_sq_cd *cd)
*
* Calls update or query ACL scenario
*/
-static enum ice_status
+static int
ice_aq_update_query_scen(struct ice_hw *hw, u16 opcode, u16 scen_id,
struct ice_aqc_acl_scen *buf, struct ice_sq_cd *cd)
{
@@ -566,7 +566,7 @@ ice_aq_update_query_scen(struct ice_hw *hw, u16 opcode, u16 scen_id,
*
* Update ACL scenario (indirect 0x0C1B)
*/
-enum ice_status
+int
ice_aq_update_acl_scen(struct ice_hw *hw, u16 scen_id,
struct ice_aqc_acl_scen *buf, struct ice_sq_cd *cd)
{
@@ -583,7 +583,7 @@ ice_aq_update_acl_scen(struct ice_hw *hw, u16 scen_id,
*
* Query ACL scenario (indirect 0x0C23)
*/
-enum ice_status
+int
ice_aq_query_acl_scen(struct ice_hw *hw, u16 scen_id,
struct ice_aqc_acl_scen *buf, struct ice_sq_cd *cd)
{
diff --git a/drivers/net/ice/base/ice_acl.h b/drivers/net/ice/base/ice_acl.h
index ac703be0a1..f7bb4c687d 100644
--- a/drivers/net/ice/base/ice_acl.h
+++ b/drivers/net/ice/base/ice_acl.h
@@ -126,77 +126,77 @@ struct ice_acl_cntrs {
u16 last_cntr;
};
-enum ice_status
+int
ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params);
-enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw);
-enum ice_status
+int ice_acl_destroy_tbl(struct ice_hw *hw);
+int
ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
u16 *scen_id);
-enum ice_status
+int
ice_aq_alloc_acl_tbl(struct ice_hw *hw, struct ice_acl_alloc_tbl *tbl,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_dealloc_acl_tbl(struct ice_hw *hw, u16 alloc_id,
struct ice_aqc_acl_generic *buf, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_program_acl_entry(struct ice_hw *hw, u8 tcam_idx, u16 entry_idx,
struct ice_aqc_acl_data *buf, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_query_acl_entry(struct ice_hw *hw, u8 tcam_idx, u16 entry_idx,
struct ice_aqc_acl_data *buf, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_alloc_actpair(struct ice_hw *hw, u16 alloc_id,
struct ice_aqc_acl_generic *buf, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_dealloc_actpair(struct ice_hw *hw, u16 alloc_id,
struct ice_aqc_acl_generic *buf, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_program_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
struct ice_aqc_actpair *buf, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_query_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
struct ice_aqc_actpair *buf, struct ice_sq_cd *cd);
-enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd);
-enum ice_status
+int ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd);
+int
ice_prgm_acl_prof_xtrct(struct ice_hw *hw, u8 prof_id,
struct ice_aqc_acl_prof_generic_frmt *buf,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_query_acl_prof(struct ice_hw *hw, u8 prof_id,
struct ice_aqc_acl_prof_generic_frmt *buf,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_alloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
struct ice_aqc_acl_profile_ranges *buf,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_query_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
struct ice_aqc_acl_profile_ranges *buf,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_alloc_acl_scen(struct ice_hw *hw, u16 *scen_id,
struct ice_aqc_acl_scen *buf, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_dealloc_acl_scen(struct ice_hw *hw, u16 scen_id, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_update_acl_scen(struct ice_hw *hw, u16 scen_id,
struct ice_aqc_acl_scen *buf, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_query_acl_scen(struct ice_hw *hw, u16 scen_id,
struct ice_aqc_acl_scen *buf, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
enum ice_acl_entry_prio prio, u8 *keys, u8 *inverts,
struct ice_acl_act_entry *acts, u8 acts_cnt, u16 *entry_idx);
-enum ice_status
+int
ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
struct ice_acl_act_entry *acts, u8 acts_cnt, u16 entry_idx);
-enum ice_status
+int
ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx);
#endif /* _ICE_ACL_H_ */
diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 2223a8313b..4a902cbe7f 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -74,7 +74,7 @@ ice_acl_scen_assign_entry_idx(struct ice_acl_scen *scen,
*
* To mark an entry available in scenario
*/
-static enum ice_status
+static int
ice_acl_scen_free_entry_idx(struct ice_acl_scen *scen, u16 idx)
{
if (idx >= scen->num_entry)
@@ -141,11 +141,11 @@ static u16 ice_acl_tbl_calc_end_idx(u16 start, u16 num_entries, u16 width)
*
* Initialize the ACL table by invalidating TCAM entries and action pairs.
*/
-static enum ice_status ice_acl_init_tbl(struct ice_hw *hw)
+static int ice_acl_init_tbl(struct ice_hw *hw)
{
struct ice_aqc_actpair act_buf;
struct ice_aqc_acl_data buf;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_acl_tbl *tbl;
u8 tcam_idx, i;
u16 idx;
@@ -303,14 +303,14 @@ static void ice_acl_divide_act_mems_to_tcams(struct ice_acl_tbl *tbl)
* values for the size of the table, but this will need to grow as more flow
* entries are added by the user level.
*/
-enum ice_status
+int
ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
{
u16 width, depth, first_e, last_e, i;
struct ice_aqc_acl_generic *resp_buf;
struct ice_acl_alloc_tbl tbl_alloc;
struct ice_acl_tbl *tbl;
- enum ice_status status;
+ int status;
if (hw->acl_tbl)
return ICE_ERR_ALREADY_EXISTS;
@@ -423,7 +423,7 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
* @hw: pointer to the hardware structure
* @req: info of partition being allocated
*/
-static enum ice_status
+static int
ice_acl_alloc_partition(struct ice_hw *hw, struct ice_acl_scen *req)
{
u16 start = 0, cnt = 0, off = 0;
@@ -737,14 +737,14 @@ ice_acl_commit_partition(struct ice_hw *hw, struct ice_acl_scen *scen,
* @num_entries: number of entries to be allocated for the scenario
* @scen_id: holds returned scenario ID if successful
*/
-enum ice_status
+int
ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
u16 *scen_id)
{
u8 cascade_cnt, first_tcam, last_tcam, i, k;
struct ice_aqc_acl_scen scen_buf;
struct ice_acl_scen *scen;
- enum ice_status status;
+ int status;
if (!hw->acl_tbl)
return ICE_ERR_DOES_NOT_EXIST;
@@ -845,11 +845,11 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
* @hw: pointer to the HW struct
* @scen_id: ID of the remove scenario
*/
-static enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
+static int ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
{
struct ice_acl_scen *scen, *tmp_scen;
struct ice_flow_prof *p, *tmp;
- enum ice_status status;
+ int status;
if (!hw->acl_tbl)
return ICE_ERR_DOES_NOT_EXIST;
@@ -889,12 +889,12 @@ static enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
* ice_acl_destroy_tbl - Destroy a previously created LEM table for ACL
* @hw: pointer to the HW struct
*/
-enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
+int ice_acl_destroy_tbl(struct ice_hw *hw)
{
struct ice_acl_scen *pos_scen, *tmp_scen;
struct ice_aqc_acl_generic resp_buf;
struct ice_aqc_acl_scen buf;
- enum ice_status status;
+ int status;
u8 i;
if (!hw->acl_tbl)
@@ -966,7 +966,7 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
* The "keys" and "inverts" buffers must be of the size which is the same as
* the scenario's width
*/
-enum ice_status
+int
ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
enum ice_acl_entry_prio prio, u8 *keys, u8 *inverts,
struct ice_acl_act_entry *acts, u8 acts_cnt, u16 *entry_idx)
@@ -974,7 +974,7 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
struct ice_aqc_acl_data buf;
u8 entry_tcam, offset;
u16 i, num_cscd, idx;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (!scen)
return ICE_ERR_DOES_NOT_EXIST;
@@ -1043,14 +1043,14 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
*
* Program a scenario's action memory
*/
-enum ice_status
+int
ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
struct ice_acl_act_entry *acts, u8 acts_cnt,
u16 entry_idx)
{
u16 idx, entry_tcam, num_cscd, i, actx_idx = 0;
struct ice_aqc_actpair act_buf;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (entry_idx >= scen->num_entry)
return ICE_ERR_MAX_LIMIT;
@@ -1105,12 +1105,12 @@ ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
* @scen: scenario to remove the entry from
* @entry_idx: the scenario-relative index of the flow entry being removed
*/
-enum ice_status
+int
ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
{
struct ice_aqc_actpair act_buf;
struct ice_aqc_acl_data buf;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u16 num_cscd, idx, i;
u8 entry_tcam;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 8867279c28..da8681d3e8 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -132,7 +132,7 @@ ice_dump_phy_type_high(struct ice_hw *hw, u64 high, const char *prefix)
* This function sets the MAC type of the adapter based on the
* vendor ID and device ID stored in the HW structure.
*/
-static enum ice_status ice_set_mac_type(struct ice_hw *hw)
+static int ice_set_mac_type(struct ice_hw *hw)
{
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -277,7 +277,7 @@ bool ice_is_e823(struct ice_hw *hw)
* Clears any existing PF configuration (VSIs, VSI lists, switch rules, port
* configuration, flow director filters, etc.).
*/
-enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
+int ice_clear_pf_cfg(struct ice_hw *hw)
{
struct ice_aq_desc desc;
@@ -301,14 +301,14 @@ enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
* ice_discover_dev_caps is expected to be called before this function is
* called.
*/
-static enum ice_status
+static int
ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aqc_manage_mac_read_resp *resp;
struct ice_aqc_manage_mac_read *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
u16 flags;
u8 i;
@@ -355,7 +355,7 @@ ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,
*
* Returns the various PHY capabilities supported on the Port (0x0600)
*/
-enum ice_status
+int
ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
struct ice_aqc_get_phy_caps_data *pcaps,
struct ice_sq_cd *cd)
@@ -363,9 +363,9 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
struct ice_aqc_get_phy_caps *cmd;
u16 pcaps_size = sizeof(*pcaps);
struct ice_aq_desc desc;
- enum ice_status status;
const char *prefix;
struct ice_hw *hw;
+ int status;
cmd = &desc.params.get_phy;
@@ -440,7 +440,7 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
* @cmd: get_link_topo_pin AQ structure
* @node_handle: output node handle parameter if node found
*/
-enum ice_status
+int
ice_aq_get_netlist_node_pin(struct ice_hw *hw,
struct ice_aqc_get_link_topo_pin *cmd,
u16 *node_handle)
@@ -467,7 +467,7 @@ ice_aq_get_netlist_node_pin(struct ice_hw *hw,
* @node_part_number: output node part number if node found
* @node_handle: output node handle parameter if node found
*/
-enum ice_status
+int
ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,
u8 *node_part_number, u16 *node_handle)
{
@@ -500,7 +500,7 @@ ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,
* netlist. When found ICE_SUCCESS is returned, ICE_ERR_DOES_NOT_EXIST
* otherwise. If node_handle provided, it would be set to found node handle.
*/
-enum ice_status
+int
ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,
u16 *node_handle)
{
@@ -510,7 +510,7 @@ ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,
u8 idx;
for (idx = 0; idx < MAX_NETLIST_SIZE; idx++) {
- enum ice_status status;
+ int status;
memset(&cmd, 0, sizeof(cmd));
@@ -693,7 +693,7 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
*
* Get Link Status (0x607). Returns the link status of the adapter.
*/
-enum ice_status
+int
ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
struct ice_link_status *link, struct ice_sq_cd *cd)
{
@@ -704,9 +704,9 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
struct ice_fc_info *hw_fc_info;
bool tx_pause, rx_pause;
struct ice_aq_desc desc;
- enum ice_status status;
struct ice_hw *hw;
u16 cmd_flags;
+ int status;
if (!pi)
return ICE_ERR_PARAM;
@@ -832,7 +832,7 @@ ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw,
*
* Set MAC configuration (0x0603)
*/
-enum ice_status
+int
ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, bool auto_drop,
struct ice_sq_cd *cd)
{
@@ -859,10 +859,10 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, bool auto_drop,
* ice_init_fltr_mgmt_struct - initializes filter management list and locks
* @hw: pointer to the HW struct
*/
-enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
+int ice_init_fltr_mgmt_struct(struct ice_hw *hw)
{
struct ice_switch_info *sw;
- enum ice_status status;
+ int status;
hw->switch_info = (struct ice_switch_info *)
ice_malloc(hw, sizeof(*hw->switch_info));
@@ -1021,12 +1021,12 @@ void ice_set_umac_shared(struct ice_hw *hw)
* ice_init_hw - main hardware initialization routine
* @hw: pointer to the hardware structure
*/
-enum ice_status ice_init_hw(struct ice_hw *hw)
+int ice_init_hw(struct ice_hw *hw)
{
struct ice_aqc_get_phy_caps_data *pcaps;
- enum ice_status status;
u16 mac_buf_len;
void *mac_buf;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -1211,7 +1211,7 @@ void ice_deinit_hw(struct ice_hw *hw)
* ice_check_reset - Check to see if a global reset is complete
* @hw: pointer to the hardware structure
*/
-enum ice_status ice_check_reset(struct ice_hw *hw)
+int ice_check_reset(struct ice_hw *hw)
{
u32 cnt, reg = 0, grst_timeout, uld_mask;
@@ -1270,7 +1270,7 @@ enum ice_status ice_check_reset(struct ice_hw *hw)
* If a global reset has been triggered, this function checks
* for its completion and then issues the PF reset
*/
-static enum ice_status ice_pf_reset(struct ice_hw *hw)
+static int ice_pf_reset(struct ice_hw *hw)
{
u32 cnt, reg;
@@ -1326,7 +1326,7 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw)
* This has to be cleared using ice_clear_pxe_mode again, once the AQ
* interface has been restored in the rebuild flow.
*/
-enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req)
+int ice_reset(struct ice_hw *hw, enum ice_reset_req req)
{
u32 val = 0;
@@ -1361,7 +1361,7 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req)
*
* Copies rxq context from dense structure to HW register space
*/
-static enum ice_status
+static int
ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
{
u8 i;
@@ -1392,7 +1392,7 @@ ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
*
* Copies rxq context from HW register space to dense structure
*/
-static enum ice_status
+static int
ice_copy_rxq_ctx_from_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
{
u8 i;
@@ -1451,7 +1451,7 @@ static const struct ice_ctx_ele ice_rlan_ctx_info[] = {
* it to HW register space and enables the hardware to prefetch descriptors
* instead of only fetching them on demand
*/
-enum ice_status
+int
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
u32 rxq_index)
{
@@ -1475,12 +1475,12 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
* Read rxq context from HW register space and then converts it from dense
* structure to sparse
*/
-enum ice_status
+int
ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
u32 rxq_index)
{
u8 ctx_buf[ICE_RXQ_CTX_SZ] = { 0 };
- enum ice_status status;
+ int status;
if (!rlan_ctx)
return ICE_ERR_BAD_PTR;
@@ -1499,7 +1499,7 @@ ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
*
* Clears rxq context in HW register space
*/
-enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)
+int ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)
{
u8 i;
@@ -1558,7 +1558,7 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = {
*
* Copies Tx completion queue context from dense structure to HW register space
*/
-static enum ice_status
+static int
ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
u32 tx_cmpltnq_index)
{
@@ -1607,7 +1607,7 @@ static const struct ice_ctx_ele ice_tx_cmpltnq_ctx_info[] = {
* Converts completion queue context from sparse to dense structure and then
* writes it to HW register space
*/
-enum ice_status
+int
ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
struct ice_tx_cmpltnq_ctx *tx_cmpltnq_ctx,
u32 tx_cmpltnq_index)
@@ -1625,7 +1625,7 @@ ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
*
* Clears Tx completion queue context in HW register space
*/
-enum ice_status
+int
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
{
u8 i;
@@ -1648,7 +1648,7 @@ ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
*
* Copies doorbell queue context from dense structure to HW register space
*/
-static enum ice_status
+static int
ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
u32 tx_drbell_q_index)
{
@@ -1698,7 +1698,7 @@ static const struct ice_ctx_ele ice_tx_drbell_q_ctx_info[] = {
* Converts doorbell queue context from sparse to dense structure and then
* writes it to HW register space
*/
-enum ice_status
+int
ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx,
u32 tx_drbell_q_index)
@@ -1717,7 +1717,7 @@ ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
*
* Clears doorbell queue context in HW register space
*/
-enum ice_status
+int
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index)
{
u8 i;
@@ -1753,7 +1753,7 @@ static struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw)
* @buf_size: size of buffer for indirect commands (0 for direct commands)
* @cd: pointer to command details structure
*/
-static enum ice_status
+static int
ice_sbq_send_cmd(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc,
void *buf, u16 buf_size, struct ice_sq_cd *cd)
{
@@ -1770,7 +1770,7 @@ ice_sbq_send_cmd(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc,
* @buf_size: size of buffer for indirect commands (0 for direct commands)
* @cd: pointer to command details structure
*/
-static enum ice_status
+static int
ice_sbq_send_cmd_nolock(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc,
void *buf, u16 buf_size, struct ice_sq_cd *cd)
{
@@ -1786,13 +1786,13 @@ ice_sbq_send_cmd_nolock(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc,
* @lock: true to lock the sq_lock (the usual case); false if the sq_lock has
* already been locked at a higher level
*/
-enum ice_status ice_sbq_rw_reg_lp(struct ice_hw *hw,
+int ice_sbq_rw_reg_lp(struct ice_hw *hw,
struct ice_sbq_msg_input *in, bool lock)
{
struct ice_sbq_cmd_desc desc = {0};
struct ice_sbq_msg_req msg = {0};
- enum ice_status status;
u16 msg_len;
+ int status;
msg_len = sizeof(msg);
@@ -1830,7 +1830,7 @@ enum ice_status ice_sbq_rw_reg_lp(struct ice_hw *hw,
* @hw: pointer to the HW struct
* @in: message info to be filled in descriptor
*/
-enum ice_status ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in)
+int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in)
{
return ice_sbq_rw_reg_lp(hw, in, true);
}
@@ -1887,17 +1887,17 @@ static bool ice_should_retry_sq_send_cmd(u16 opcode)
* Retry sending the FW Admin Queue command, multiple times, to the FW Admin
* Queue if the EBUSY AQ error is returned.
*/
-static enum ice_status
+static int
ice_sq_send_cmd_retry(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_aq_desc *desc, void *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aq_desc desc_cpy;
- enum ice_status status;
bool is_cmd_for_retry;
u8 *buf_cpy = NULL;
u8 idx = 0;
u16 opcode;
+ int status;
opcode = LE16_TO_CPU(desc->opcode);
is_cmd_for_retry = ice_should_retry_sq_send_cmd(opcode);
@@ -1948,13 +1948,13 @@ ice_sq_send_cmd_retry(struct ice_hw *hw, struct ice_ctl_q_info *cq,
*
* Helper function to send FW Admin Queue commands to the FW Admin Queue.
*/
-enum ice_status
+int
ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,
u16 buf_size, struct ice_sq_cd *cd)
{
if (hw->aq_send_cmd_fn) {
- enum ice_status status = ICE_ERR_NOT_READY;
u16 retval = ICE_AQ_RC_OK;
+ int status = ICE_ERR_NOT_READY;
ice_acquire_lock(&hw->adminq.sq_lock);
if (!hw->aq_send_cmd_fn(hw->aq_send_cmd_param, desc,
@@ -1984,11 +1984,11 @@ ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,
*
* Get the firmware version (0x0001) from the admin queue commands
*/
-enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
+int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
{
struct ice_aqc_get_ver *resp;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
resp = &desc.params.get_ver;
@@ -2019,7 +2019,7 @@ enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
*
* Send the driver version (0x0002) to the firmware
*/
-enum ice_status
+int
ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
struct ice_sq_cd *cd)
{
@@ -2056,7 +2056,7 @@ ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
* Tell the Firmware that we're shutting down the AdminQ and whether
* or not the driver is unloading as well (0x0003).
*/
-enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
+int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
{
struct ice_aqc_q_shutdown *cmd;
struct ice_aq_desc desc;
@@ -2097,14 +2097,14 @@ enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
* will likely get an error propagated back to it indicating the Download
* Package, Update Package or the Release Resource AQ commands timed out.
*/
-static enum ice_status
+static int
ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,
enum ice_aq_res_access_type access, u8 sdp_number, u32 *timeout,
struct ice_sq_cd *cd)
{
struct ice_aqc_req_res *cmd_resp;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -2168,7 +2168,7 @@ ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,
*
* release common resource using the admin queue commands (0x0009)
*/
-static enum ice_status
+static int
ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,
struct ice_sq_cd *cd)
{
@@ -2196,14 +2196,14 @@ ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,
*
* This function will attempt to acquire the ownership of a resource.
*/
-enum ice_status
+int
ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
enum ice_aq_res_access_type access, u32 timeout)
{
#define ICE_RES_POLLING_DELAY_MS 10
u32 delay = ICE_RES_POLLING_DELAY_MS;
u32 time_left = timeout;
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -2257,8 +2257,8 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
*/
void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
{
- enum ice_status status;
u32 total_delay = 0;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -2286,7 +2286,7 @@ void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
*
* Helper function to allocate/free resources using the admin queue commands
*/
-enum ice_status
+int
ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
enum ice_adminq_opc opc, struct ice_sq_cd *cd)
@@ -2321,12 +2321,12 @@ ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
* @btm: allocate from bottom
* @res: pointer to array that will receive the resources
*/
-enum ice_status
+int
ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
{
struct ice_aqc_alloc_free_res_elem *buf;
- enum ice_status status;
u16 buf_len;
+ int status;
buf_len = ice_struct_size(buf, elem, num);
buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
@@ -2360,11 +2360,11 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
* @num: number of resources
* @res: pointer to array that contains the resources to free
*/
-enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
+int ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
{
struct ice_aqc_alloc_free_res_elem *buf;
- enum ice_status status;
u16 buf_len;
+ int status;
buf_len = ice_struct_size(buf, elem, num);
buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
@@ -2972,13 +2972,13 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
* buffer size be set to ICE_AQ_MAX_BUF_LEN (the largest possible buffer that
* firmware could return) to avoid this.
*/
-static enum ice_status
+static int
ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
enum ice_adminq_opc opc, struct ice_sq_cd *cd)
{
struct ice_aqc_list_caps *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.get_cap;
@@ -3003,12 +3003,12 @@ ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
* Read the device capabilities and extract them into the dev_caps structure
* for later use.
*/
-static enum ice_status
+static int
ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps)
{
- enum ice_status status;
u32 cap_count = 0;
void *cbuf;
+ int status;
cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);
if (!cbuf)
@@ -3037,12 +3037,12 @@ ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps)
* Read the function capabilities and extract them into the func_caps structure
* for later use.
*/
-static enum ice_status
+static int
ice_discover_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_caps)
{
- enum ice_status status;
u32 cap_count = 0;
void *cbuf;
+ int status;
cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);
if (!cbuf)
@@ -3130,9 +3130,9 @@ void ice_set_safe_mode_caps(struct ice_hw *hw)
* ice_get_caps - get info about the HW
* @hw: pointer to the hardware structure
*/
-enum ice_status ice_get_caps(struct ice_hw *hw)
+int ice_get_caps(struct ice_hw *hw)
{
- enum ice_status status;
+ int status;
status = ice_discover_dev_caps(hw, &hw->dev_caps);
if (status)
@@ -3150,7 +3150,7 @@ enum ice_status ice_get_caps(struct ice_hw *hw)
*
* This function is used to write MAC address to the NVM (0x0108).
*/
-enum ice_status
+int
ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
struct ice_sq_cd *cd)
{
@@ -3172,7 +3172,7 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
*
* Tell the firmware that the driver is taking over from PXE (0x0110).
*/
-static enum ice_status ice_aq_clear_pxe_mode(struct ice_hw *hw)
+static int ice_aq_clear_pxe_mode(struct ice_hw *hw)
{
struct ice_aq_desc desc;
@@ -3206,7 +3206,7 @@ void ice_clear_pxe_mode(struct ice_hw *hw)
*
* Set Physical port parameters (0x0203)
*/
-enum ice_status
+int
ice_aq_set_port_params(struct ice_port_info *pi, u16 bad_frame_vsi,
bool save_bad_pac, bool pad_short_pac, bool double_vlan,
struct ice_sq_cd *cd)
@@ -3440,12 +3440,12 @@ ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
* mode as the PF may not have the privilege to set some of the PHY Config
* parameters. This status will be indicated by the command response (0x0601).
*/
-enum ice_status
+int
ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd)
{
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (!cfg)
return ICE_ERR_PARAM;
@@ -3490,10 +3490,10 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
* ice_update_link_info - update status of the HW network link
* @pi: port info structure of the interested logical port
*/
-enum ice_status ice_update_link_info(struct ice_port_info *pi)
+int ice_update_link_info(struct ice_port_info *pi)
{
struct ice_link_status *li;
- enum ice_status status;
+ int status;
if (!pi)
return ICE_ERR_PARAM;
@@ -3617,7 +3617,7 @@ enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options)
* @cfg: PHY configuration data to set FC mode
* @req_mode: FC mode to configure
*/
-static enum ice_status
+static int
ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
enum ice_fc_mode req_mode)
{
@@ -3631,7 +3631,7 @@ ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
case ICE_FC_AUTO:
{
struct ice_aqc_get_phy_caps_data *pcaps;
- enum ice_status status;
+ int status;
pcaps = (struct ice_aqc_get_phy_caps_data *)
ice_malloc(pi->hw, sizeof(*pcaps));
@@ -3690,13 +3690,13 @@ ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
*
* Set the requested flow control mode.
*/
-enum ice_status
+int
ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
{
struct ice_aqc_set_phy_cfg_data cfg = { 0 };
struct ice_aqc_get_phy_caps_data *pcaps;
- enum ice_status status;
struct ice_hw *hw;
+ int status;
if (!pi || !aq_failures)
return ICE_ERR_BAD_PTR;
@@ -3837,13 +3837,13 @@ ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
* @cfg: PHY configuration data to set FEC mode
* @fec: FEC mode to configure
*/
-enum ice_status
+int
ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
enum ice_fec_mode fec)
{
struct ice_aqc_get_phy_caps_data *pcaps;
- enum ice_status status = ICE_SUCCESS;
struct ice_hw *hw;
+ int status = 0;
if (!pi || !cfg)
return ICE_ERR_BAD_PTR;
@@ -3931,10 +3931,10 @@ ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
* The variable link_up is invalid if status is non zero. As a
* result of this call, link status reporting becomes enabled
*/
-enum ice_status ice_get_link_status(struct ice_port_info *pi, bool *link_up)
+int ice_get_link_status(struct ice_port_info *pi, bool *link_up)
{
struct ice_phy_info *phy_info;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (!pi || !link_up)
return ICE_ERR_PARAM;
@@ -3962,7 +3962,7 @@ enum ice_status ice_get_link_status(struct ice_port_info *pi, bool *link_up)
*
* Sets up the link and restarts the Auto-Negotiation over the link.
*/
-enum ice_status
+int
ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
struct ice_sq_cd *cd)
{
@@ -3992,7 +3992,7 @@ ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
*
* Set event mask (0x0613)
*/
-enum ice_status
+int
ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
struct ice_sq_cd *cd)
{
@@ -4017,7 +4017,7 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
*
* Enable/disable loopback on a given port
*/
-enum ice_status
+int
ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd)
{
struct ice_aqc_set_mac_lb *cmd;
@@ -4040,7 +4040,7 @@ ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd)
*
* Set LED value for the given port (0x06e9)
*/
-enum ice_status
+int
ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
struct ice_sq_cd *cd)
{
@@ -4075,14 +4075,14 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
*
* Read/Write SFF EEPROM (0x06EE)
*/
-enum ice_status
+int
ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
bool write, struct ice_sq_cd *cd)
{
struct ice_aqc_sff_eeprom *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (!data || (mem_addr & 0xff00))
return ICE_ERR_PARAM;
@@ -4115,7 +4115,7 @@ ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
* Program Topology Device NVM (0x06F2)
*
*/
-enum ice_status
+int
ice_aq_prog_topo_dev_nvm(struct ice_hw *hw,
struct ice_aqc_link_topo_params *topo_params,
struct ice_sq_cd *cd)
@@ -4144,7 +4144,7 @@ ice_aq_prog_topo_dev_nvm(struct ice_hw *hw,
* Read Topology Device NVM (0x06F3)
*
*/
-enum ice_status
+int
ice_aq_read_topo_dev_nvm(struct ice_hw *hw,
struct ice_aqc_link_topo_params *topo_params,
u32 start_address, u8 *data, u8 data_size,
@@ -4152,7 +4152,7 @@ ice_aq_read_topo_dev_nvm(struct ice_hw *hw,
{
struct ice_aqc_read_topo_dev_nvm *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (!data || data_size == 0 ||
data_size > ICE_AQC_READ_TOPO_DEV_NVM_DATA_READ_SIZE)
@@ -4184,13 +4184,13 @@ ice_aq_read_topo_dev_nvm(struct ice_hw *hw,
*
* Internal function to get (0x0B05) or set (0x0B03) RSS look up table
*/
-static enum ice_status
+static int
__ice_aq_get_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *params, bool set)
{
u16 flags = 0, vsi_id, lut_type, lut_size, glob_lut_idx, vsi_handle;
struct ice_aqc_get_set_rss_lut *cmd_resp;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
u8 *lut;
if (!params)
@@ -4286,7 +4286,7 @@ __ice_aq_get_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params
*
* get the RSS lookup table, PF or VSI type
*/
-enum ice_status
+int
ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params)
{
return __ice_aq_get_set_rss_lut(hw, get_params, false);
@@ -4299,7 +4299,7 @@ ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_
*
* set the RSS lookup table, PF or VSI type
*/
-enum ice_status
+int
ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params)
{
return __ice_aq_get_set_rss_lut(hw, set_params, true);
@@ -4314,8 +4314,7 @@ ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_
*
* get (0x0B04) or set (0x0B02) the RSS key per VSI
*/
-static enum
-ice_status __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,
+static int __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,
struct ice_aqc_get_set_rss_keys *key,
bool set)
{
@@ -4348,7 +4347,7 @@ ice_status __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,
*
* get the RSS key per VSI
*/
-enum ice_status
+int
ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *key)
{
@@ -4367,7 +4366,7 @@ ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
*
* set the RSS key per VSI
*/
-enum ice_status
+int
ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys)
{
@@ -4399,7 +4398,7 @@ ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
* Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue
* flow.
*/
-enum ice_status
+int
ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
struct ice_sq_cd *cd)
@@ -4449,7 +4448,7 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
*
* Disable LAN Tx queue (0x0C31)
*/
-static enum ice_status
+static int
ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
struct ice_aqc_dis_txq_item *qg_list, u16 buf_size,
enum ice_disq_rst_src rst_src, u16 vmvf_num,
@@ -4458,7 +4457,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
struct ice_aqc_dis_txq_item *item;
struct ice_aqc_dis_txqs *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
u16 i, sz = 0;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -4545,7 +4544,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
*
* Move / Reconfigure Tx LAN queues (0x0C32)
*/
-enum ice_status
+int
ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,
bool is_tc_change, bool subseq_call, bool flush_pipe,
u8 timeout, u32 *blocked_cgds,
@@ -4554,7 +4553,7 @@ ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,
{
struct ice_aqc_move_txqs *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.move_txqs;
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_move_recfg_txqs);
@@ -4792,7 +4791,7 @@ ice_write_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
* @dest_ctx: pointer to memory for the packed structure
* @ce_info: a description of the structure to be transformed
*/
-enum ice_status
+int
ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
const struct ice_ctx_ele *ce_info)
{
@@ -4844,7 +4843,7 @@ ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
*
* Get internal FW/HW data (0xFF08) for debug purposes.
*/
-enum ice_status
+int
ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,
u32 start, void *buf, u16 buf_size, u16 *ret_buf_size,
u16 *ret_next_table, u32 *ret_next_index,
@@ -4852,7 +4851,7 @@ ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,
{
struct ice_aqc_debug_dump_internals *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.debug_dump;
@@ -5066,7 +5065,7 @@ ice_read_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
* @dest_ctx: pointer to a generic non-packed context structure
* @ce_info: a description of the structure to be read from
*/
-enum ice_status
+int
ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
{
int f;
@@ -5131,7 +5130,7 @@ ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle)
*
* This function adds one LAN queue
*/
-enum ice_status
+int
ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd)
@@ -5139,8 +5138,8 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
struct ice_aqc_txsched_elem_data node = { 0 };
struct ice_sched_node *parent;
struct ice_q_ctx *q_ctx;
- enum ice_status status;
struct ice_hw *hw;
+ int status;
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
return ICE_ERR_CFG;
@@ -5236,15 +5235,15 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
*
* This function removes queues and their corresponding nodes in SW DB
*/
-enum ice_status
+int
ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
u16 *q_handles, u16 *q_ids, u32 *q_teids,
enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cd)
{
- enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
struct ice_aqc_dis_txq_item *qg_list;
struct ice_q_ctx *q_ctx;
+ int status = ICE_ERR_DOES_NOT_EXIST;
struct ice_hw *hw;
u16 i, buf_size;
@@ -5314,11 +5313,11 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
*
* This function adds/updates the VSI queues per TC.
*/
-static enum ice_status
+static int
ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
u16 *maxqs, u8 owner)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 i;
if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
@@ -5353,7 +5352,7 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
*
* This function adds/updates the VSI LAN queues per TC.
*/
-enum ice_status
+int
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
u16 *max_lanqs)
{
@@ -5371,14 +5370,14 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
*
* Get sensor reading (0x0632)
*/
-enum ice_status
+int
ice_aq_get_sensor_reading(struct ice_hw *hw, u8 sensor, u8 format,
struct ice_aqc_get_sensor_reading_resp *data,
struct ice_sq_cd *cd)
{
struct ice_aqc_get_sensor_reading *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (!data)
return ICE_ERR_PARAM;
@@ -5417,10 +5416,10 @@ static bool ice_is_main_vsi(struct ice_hw *hw, u16 vsi_handle)
*
* Initializes required config data for VSI, FD, ACL, and RSS before replay.
*/
-enum ice_status
+int
ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
{
- enum ice_status status;
+ int status;
u8 i;
/* Delete old entries from replay filter list head if there is any */
@@ -5449,11 +5448,11 @@ ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
* Restore all VSI configuration after reset. It is required to call this
* function with main VSI first.
*/
-enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
+int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
{
struct ice_switch_info *sw = hw->switch_info;
struct ice_port_info *pi = hw->port_info;
- enum ice_status status;
+ int status;
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
@@ -5623,12 +5622,12 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,
*
* This function queries HW element information
*/
-enum ice_status
+int
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_txsched_elem_data *buf)
{
u16 buf_size, num_elem_ret = 0;
- enum ice_status status;
+ int status;
buf_size = sizeof(*buf);
ice_memset(buf, 0, buf_size, ICE_NONDMA_MEM);
@@ -5677,15 +5676,15 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw)
*
* Read I2C (0x06E2)
*/
-enum ice_status
+int
ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
u16 bus_addr, __le16 addr, u8 params, u8 *data,
struct ice_sq_cd *cd)
{
struct ice_aq_desc desc = { 0 };
struct ice_aqc_i2c *cmd;
- enum ice_status status;
u8 data_size;
+ int status;
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_read_i2c);
cmd = &desc.params.read_write_i2c;
@@ -5727,7 +5726,7 @@ ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
*
* Write I2C (0x06E3)
*/
-enum ice_status
+int
ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
u16 bus_addr, __le16 addr, u8 params, u8 *data,
struct ice_sq_cd *cd)
@@ -5773,7 +5772,7 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
* a single PF will write the parameter value, while all other PFs will only
* read it.
*/
-enum ice_status
+int
ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
u32 value, struct ice_sq_cd *cd)
{
@@ -5806,13 +5805,13 @@ ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
* Note that firmware provides no synchronization or locking. It is expected
* that only a single PF will write a given parameter.
*/
-enum ice_status
+int
ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
u32 *value, struct ice_sq_cd *cd)
{
struct ice_aqc_driver_shared_params *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (idx >= ICE_AQC_DRIVER_PARAM_MAX)
return ICE_ERR_OUT_OF_RANGE;
@@ -5843,7 +5842,7 @@ ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
*
* Sends 0x06EC AQ command to set the GPIO pin state that's part of the topology
*/
-enum ice_status
+int
ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
struct ice_sq_cd *cd)
{
@@ -5870,13 +5869,13 @@ ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
* Sends 0x06ED AQ command to get the value of a GPIO signal which is part of
* the topology
*/
-enum ice_status
+int
ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
bool *value, struct ice_sq_cd *cd)
{
struct ice_aqc_gpio *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_gpio);
cmd = &desc.params.read_write_gpio;
@@ -5963,13 +5962,13 @@ bool ice_fw_supports_link_override(struct ice_hw *hw)
*
* Gets the link default override for a port
*/
-enum ice_status
+int
ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
struct ice_port_info *pi)
{
u16 i, tlv, tlv_len, tlv_start, buf, offset;
struct ice_hw *hw = pi->hw;
- enum ice_status status;
+ int status;
status = ice_get_pfa_module_tlv(hw, &tlv, &tlv_len,
ICE_SR_LINK_DEFAULT_OVERRIDE_PTR);
@@ -6054,7 +6053,7 @@ bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps)
*
* Set the LLDP MIB. (0x0A08)
*/
-enum ice_status
+int
ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
@@ -6097,7 +6096,7 @@ bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw)
* @vsi_num: absolute HW index for VSI
* @add: boolean for if adding or removing a filter
*/
-enum ice_status
+int
ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)
{
struct ice_aqc_lldp_filter_ctrl *cmd;
@@ -6121,7 +6120,7 @@ ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)
* ice_lldp_execute_pending_mib - execute LLDP pending MIB request
* @hw: pointer to HW struct
*/
-enum ice_status ice_lldp_execute_pending_mib(struct ice_hw *hw)
+int ice_lldp_execute_pending_mib(struct ice_hw *hw)
{
struct ice_aq_desc desc;
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 0f1be917db..2aeb1a520a 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -22,51 +22,49 @@ enum ice_fw_modes {
ICE_FW_MODE_ROLLBACK
};
-enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw);
+int ice_init_fltr_mgmt_struct(struct ice_hw *hw);
void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw);
void ice_set_umac_shared(struct ice_hw *hw);
-enum ice_status ice_init_hw(struct ice_hw *hw);
+int ice_init_hw(struct ice_hw *hw);
void ice_deinit_hw(struct ice_hw *hw);
-enum ice_status ice_check_reset(struct ice_hw *hw);
-enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req);
-
-enum ice_status ice_create_all_ctrlq(struct ice_hw *hw);
-enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);
+int ice_check_reset(struct ice_hw *hw);
+int ice_reset(struct ice_hw *hw, enum ice_reset_req req);
+int ice_create_all_ctrlq(struct ice_hw *hw);
+int ice_init_all_ctrlq(struct ice_hw *hw);
void ice_shutdown_all_ctrlq(struct ice_hw *hw, bool unloading);
void ice_destroy_all_ctrlq(struct ice_hw *hw);
-enum ice_status
+int
ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_rq_event_info *e, u16 *pending);
-enum ice_status
+int
ice_get_link_status(struct ice_port_info *pi, bool *link_up);
-enum ice_status ice_update_link_info(struct ice_port_info *pi);
-enum ice_status
+int ice_update_link_info(struct ice_port_info *pi);
+int
ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
enum ice_aq_res_access_type access, u32 timeout);
void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
-enum ice_status
+int
ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
-enum ice_status
+int
ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
-enum ice_status
+int
ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
enum ice_adminq_opc opc, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_aq_desc *desc, void *buf, u16 buf_size,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_aq_desc *desc, void *buf, u16 buf_size,
struct ice_sq_cd *cd);
void ice_clear_pxe_mode(struct ice_hw *hw);
-
-enum ice_status ice_get_caps(struct ice_hw *hw);
+int ice_get_caps(struct ice_hw *hw);
void ice_set_safe_mode_caps(struct ice_hw *hw);
-enum ice_status
+int
ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,
u32 start, void *buf, u16 buf_size, u16 *ret_buf_size,
u16 *ret_next_table, u32 *ret_next_index,
@@ -83,41 +81,41 @@ ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,
*/
#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1))
-enum ice_status
+int
ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
u32 rxq_index);
-enum ice_status
+int
ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
u32 rxq_index);
-enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);
-enum ice_status
+int ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);
+int
ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index);
-enum ice_status
+int
ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
struct ice_tx_cmpltnq_ctx *tx_cmpltnq_ctx,
u32 tx_cmpltnq_index);
-enum ice_status
+int
ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index);
-enum ice_status
+int
ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx,
u32 tx_drbell_q_index);
-enum ice_status
+int
ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);
-enum ice_status
+int
ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params);
-enum ice_status
+int
ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys);
-enum ice_status
+int
ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
struct ice_aqc_get_set_rss_keys *keys);
-enum ice_status
+int
ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,
struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,
bool is_tc_change, bool subseq_call, bool flush_pipe,
u8 timeout, u32 *blocked_cgds,
@@ -125,62 +123,62 @@ ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,
u8 *txqs_moved, struct ice_sq_cd *cd);
bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
-enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
+int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
extern const struct ice_ctx_ele ice_tlan_ctx_info[];
-enum ice_status
+int
ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
const struct ice_ctx_ele *ce_info);
-enum ice_status
+int
ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info);
-enum ice_status
+int
ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
void *buf, u16 buf_size, struct ice_sq_cd *cd);
-enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
+int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_set_port_params(struct ice_port_info *pi, u16 bad_frame_vsi,
bool save_bad_pac, bool pad_short_pac, bool double_vlan,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
struct ice_aqc_get_phy_caps_data *caps,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_netlist_node_pin(struct ice_hw *hw,
struct ice_aqc_get_link_topo_pin *cmd,
u16 *node_handle);
-enum ice_status
+int
ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,
u8 *node_part_number, u16 *node_handle);
-enum ice_status
+int
ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,
u16 *node_handle);
void
ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
u16 link_speeds_bitmap);
-enum ice_status
+int
ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
struct ice_sq_cd *cd);
-enum ice_status ice_clear_pf_cfg(struct ice_hw *hw);
-enum ice_status
+int ice_clear_pf_cfg(struct ice_hw *hw);
+int
ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
bool ice_fw_supports_link_override(struct ice_hw *hw);
bool ice_fw_supports_fec_dis_auto(struct ice_hw *hw);
-enum ice_status
+int
ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
struct ice_port_info *pi);
bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
-enum ice_status
+int
ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
bool ena_auto_link_update);
bool
@@ -190,66 +188,66 @@ void
ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
struct ice_aqc_get_phy_caps_data *caps,
struct ice_aqc_set_phy_cfg_data *cfg);
-enum ice_status
+int
ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
enum ice_fec_mode fec);
-enum ice_status
+int
ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, bool auto_drop,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
struct ice_link_status *link, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
bool write, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_prog_topo_dev_nvm(struct ice_hw *hw,
struct ice_aqc_link_topo_params *topo_params,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_read_topo_dev_nvm(struct ice_hw *hw,
struct ice_aqc_link_topo_params *topo_params,
u32 start_address, u8 *buf, u8 buf_size,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
u16 *q_handle, u16 *q_ids, u32 *q_teids,
enum ice_disq_rst_src rst_src, u16 vmvf_num,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
u16 *max_lanqs);
-enum ice_status
+int
ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw);
-enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
+int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
void ice_replay_post(struct ice_hw *hw);
struct ice_q_ctx *
ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);
-enum ice_status ice_sbq_rw_reg_lp(struct ice_hw *hw,
+int ice_sbq_rw_reg_lp(struct ice_hw *hw,
struct ice_sbq_msg_input *in, bool lock);
void ice_sbq_lock(struct ice_hw *hw);
void ice_sbq_unlock(struct ice_hw *hw);
-enum ice_status ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in);
-enum ice_status
+int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in);
+int
ice_aq_get_sensor_reading(struct ice_hw *hw, u8 sensor, u8 format,
struct ice_aqc_get_sensor_reading_resp *data,
struct ice_sq_cd *cd);
@@ -268,34 +266,34 @@ bool ice_is_generic_mac(struct ice_hw *hw);
bool ice_is_e810(struct ice_hw *hw);
bool ice_is_e810t(struct ice_hw *hw);
bool ice_is_e823(struct ice_hw *hw);
-enum ice_status
+int
ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_txsched_elem_data *buf);
-enum ice_status
+int
ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
u32 value, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
u32 *value, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
bool *value, struct ice_sq_cd *cd);
bool ice_is_100m_speed_supported(struct ice_hw *hw);
-enum ice_status
+int
ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
struct ice_sq_cd *cd);
bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
-enum ice_status
+int
ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
-enum ice_status ice_lldp_execute_pending_mib(struct ice_hw *hw);
-enum ice_status
+int ice_lldp_execute_pending_mib(struct ice_hw *hw);
+int
ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
u16 bus_addr, __le16 addr, u8 params, u8 *data,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
u16 bus_addr, __le16 addr, u8 params, u8 *data,
struct ice_sq_cd *cd);
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index c34407b48c..8c02a5067f 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -92,7 +92,7 @@ bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* @hw: pointer to the hardware structure
* @cq: pointer to the specific Control queue
*/
-static enum ice_status
+static int
ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
size_t size = cq->num_sq_entries * sizeof(struct ice_aq_desc);
@@ -116,7 +116,7 @@ ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* @hw: pointer to the hardware structure
* @cq: pointer to the specific Control queue
*/
-static enum ice_status
+static int
ice_alloc_ctrlq_rq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
size_t size = cq->num_rq_entries * sizeof(struct ice_aq_desc);
@@ -145,7 +145,7 @@ static void ice_free_cq_ring(struct ice_hw *hw, struct ice_ctl_q_ring *ring)
* @hw: pointer to the hardware structure
* @cq: pointer to the specific Control queue
*/
-static enum ice_status
+static int
ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
int i;
@@ -209,7 +209,7 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* @hw: pointer to the hardware structure
* @cq: pointer to the specific Control queue
*/
-static enum ice_status
+static int
ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
int i;
@@ -244,7 +244,7 @@ ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
return ICE_ERR_NO_MEMORY;
}
-static enum ice_status
+static int
ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries)
{
/* Clear Head and Tail */
@@ -270,7 +270,7 @@ ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries)
*
* Configure base address and length registers for the transmit queue
*/
-static enum ice_status
+static int
ice_cfg_sq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
return ice_cfg_cq_regs(hw, &cq->sq, cq->num_sq_entries);
@@ -283,10 +283,10 @@ ice_cfg_sq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
*
* Configure base address and length registers for the receive (event queue)
*/
-static enum ice_status
+static int
ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
- enum ice_status status;
+ int status;
status = ice_cfg_cq_regs(hw, &cq->rq, cq->num_rq_entries);
if (status)
@@ -330,9 +330,9 @@ do { \
* Do *NOT* hold the lock when calling this as the memory allocation routines
* called are not going to be atomic context safe
*/
-static enum ice_status ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
+static int ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
- enum ice_status ret_code;
+ int ret_code;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -392,9 +392,9 @@ static enum ice_status ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* Do *NOT* hold the lock when calling this as the memory allocation routines
* called are not going to be atomic context safe
*/
-static enum ice_status ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
+static int ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
- enum ice_status ret_code;
+ int ret_code;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -447,10 +447,10 @@ static enum ice_status ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
*
* The main shutdown routine for the Control Transmit Queue
*/
-static enum ice_status
+static int
ice_shutdown_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
- enum ice_status ret_code = ICE_SUCCESS;
+ int ret_code = ICE_SUCCESS;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -518,10 +518,10 @@ static bool ice_aq_ver_check(struct ice_hw *hw)
*
* The main shutdown routine for the Control Receive Queue
*/
-static enum ice_status
+static int
ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
{
- enum ice_status ret_code = ICE_SUCCESS;
+ int ret_code = ICE_SUCCESS;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -555,10 +555,10 @@ ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* ice_init_check_adminq - Check version for Admin Queue to know if its alive
* @hw: pointer to the hardware structure
*/
-static enum ice_status ice_init_check_adminq(struct ice_hw *hw)
+static int ice_init_check_adminq(struct ice_hw *hw)
{
struct ice_ctl_q_info *cq = &hw->adminq;
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -593,10 +593,10 @@ static enum ice_status ice_init_check_adminq(struct ice_hw *hw)
*
* NOTE: this function does not initialize the controlq locks
*/
-static enum ice_status ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)
+static int ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)
{
struct ice_ctl_q_info *cq;
- enum ice_status ret_code;
+ int ret_code;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -726,10 +726,10 @@ void ice_shutdown_all_ctrlq(struct ice_hw *hw, bool unloading)
*
* NOTE: this function does not initialize the controlq locks.
*/
-enum ice_status ice_init_all_ctrlq(struct ice_hw *hw)
+int ice_init_all_ctrlq(struct ice_hw *hw)
{
- enum ice_status status;
u32 retry = 0;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -791,7 +791,7 @@ static void ice_init_ctrlq_locks(struct ice_ctl_q_info *cq)
* driver needs to re-initialize control queues at run time it should call
* ice_init_all_ctrlq instead.
*/
-enum ice_status ice_create_all_ctrlq(struct ice_hw *hw)
+int ice_create_all_ctrlq(struct ice_hw *hw)
{
ice_init_ctrlq_locks(&hw->adminq);
if (ice_is_sbq_supported(hw))
@@ -941,7 +941,7 @@ static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)
* This is the main send command routine for the ATQ. It runs the queue,
* cleans the queue, etc.
*/
-enum ice_status
+int
ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_aq_desc *desc, void *buf, u16 buf_size,
struct ice_sq_cd *cd)
@@ -949,7 +949,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_dma_mem *dma_buf = NULL;
struct ice_aq_desc *desc_on_ring;
bool cmd_completed = false;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_sq_cd *details;
u32 total_delay = 0;
u16 retval = 0;
@@ -1120,12 +1120,12 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
* This is the main send command routine for the ATQ. It runs the queue,
* cleans the queue, etc.
*/
-enum ice_status
+int
ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_aq_desc *desc, void *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
/* if reset is in progress return a soft error */
if (hw->reset_ongoing)
@@ -1164,13 +1164,13 @@ void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode)
* the contents through e. It can also return how many events are
* left to process through 'pending'.
*/
-enum ice_status
+int
ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
struct ice_rq_event_info *e, u16 *pending)
{
u16 ntc = cq->rq.next_to_clean;
enum ice_aq_err rq_last_status;
- enum ice_status ret_code = ICE_SUCCESS;
+ int ret_code = ICE_SUCCESS;
struct ice_aq_desc *desc;
struct ice_dma_mem *bi;
u16 desc_idx;
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
index cc4e28a702..dc401f7c00 100644
--- a/drivers/net/ice/base/ice_dcb.c
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -19,14 +19,14 @@
*
* Requests the complete LLDP MIB (entire packet). (0x0A00)
*/
-enum ice_status
+int
ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
u16 buf_size, u16 *local_len, u16 *remote_len,
struct ice_sq_cd *cd)
{
struct ice_aqc_lldp_get_mib *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.lldp_get_mib;
@@ -61,7 +61,7 @@ ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
* Enable or Disable posting of an event on ARQ when LLDP MIB
* associated with the interface changes (0x0A01)
*/
-enum ice_status
+int
ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
struct ice_sq_cd *cd)
{
@@ -92,7 +92,7 @@ ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
*
* Stop or Shutdown the embedded LLDP Agent (0x0A05)
*/
-enum ice_status
+int
ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,
struct ice_sq_cd *cd)
{
@@ -120,7 +120,7 @@ ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,
*
* Start the embedded LLDP Agent on all ports. (0x0A06)
*/
-enum ice_status
+int
ice_aq_start_lldp(struct ice_hw *hw, bool persist, struct ice_sq_cd *cd)
{
struct ice_aqc_lldp_start *cmd;
@@ -601,10 +601,10 @@ ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
*
* Parse DCB configuration from the LLDPDU
*/
-enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
+int ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
{
struct ice_lldp_org_tlv *tlv;
- enum ice_status ret = ICE_SUCCESS;
+ int ret = ICE_SUCCESS;
u16 offset = 0;
u16 typelen;
u16 type;
@@ -651,11 +651,11 @@ enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
*
* Query DCB configuration from the firmware
*/
-enum ice_status
+int
ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
struct ice_dcbx_cfg *dcbcfg)
{
- enum ice_status ret;
+ int ret;
u8 *lldpmib;
/* Allocate the LLDPDU */
@@ -689,14 +689,14 @@ ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
* returns ICE_SUCCESS, caller will need to check if FW returns back the same
* value as stated in dcbx_agent_status, and react accordingly. (0x0A09)
*/
-enum ice_status
+int
ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
bool *dcbx_agent_status, struct ice_sq_cd *cd)
{
struct ice_aqc_lldp_stop_start_specific_agent *cmd;
enum ice_adminq_opc opcode;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.lldp_agent_ctrl;
@@ -726,7 +726,7 @@ ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
*
* Get CEE DCBX mode operational configuration from firmware (0x0A07)
*/
-enum ice_status
+int
ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
struct ice_aqc_get_cee_dcb_cfg_resp *buff,
struct ice_sq_cd *cd)
@@ -747,12 +747,12 @@ ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
* This AQ call configures the PFC mdoe to DSCP-based PFC mode or VLAN
* -based PFC (0x0303)
*/
-enum ice_status
+int
ice_aq_set_pfc_mode(struct ice_hw *hw, u8 pfc_mode, struct ice_sq_cd *cd)
{
struct ice_aqc_set_query_pfc_mode *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (pfc_mode > ICE_AQC_PFC_DSCP_BASED_PFC)
return ICE_ERR_PARAM;
@@ -906,11 +906,11 @@ ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
*
* Get IEEE or CEE mode DCB configuration from the Firmware
*/
-STATIC enum ice_status
+STATIC int
ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
{
struct ice_dcbx_cfg *dcbx_cfg = NULL;
- enum ice_status ret;
+ int ret;
if (!pi)
return ICE_ERR_PARAM;
@@ -946,11 +946,11 @@ ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
*
* Get DCB configuration from the Firmware
*/
-enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
+int ice_get_dcb_cfg(struct ice_port_info *pi)
{
struct ice_aqc_get_cee_dcb_cfg_resp cee_cfg;
struct ice_dcbx_cfg *dcbx_cfg;
- enum ice_status ret;
+ int ret;
if (!pi)
return ICE_ERR_PARAM;
@@ -1014,10 +1014,10 @@ void ice_get_dcb_cfg_from_mib_change(struct ice_port_info *pi,
*
* Update DCB configuration from the Firmware
*/
-enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
+int ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
{
struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;
- enum ice_status ret = ICE_SUCCESS;
+ int ret = ICE_SUCCESS;
if (!hw->func_caps.common_cap.dcb)
return ICE_ERR_NOT_SUPPORTED;
@@ -1056,10 +1056,10 @@ enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
*
* Configure (disable/enable) MIB
*/
-enum ice_status ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib)
+int ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib)
{
struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;
- enum ice_status ret;
+ int ret;
if (!hw->func_caps.common_cap.dcb)
return ICE_ERR_NOT_SUPPORTED;
@@ -1508,11 +1508,11 @@ void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg)
*
* Set DCB configuration to the Firmware
*/
-enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
+int ice_set_dcb_cfg(struct ice_port_info *pi)
{
u8 mib_type, *lldpmib = NULL;
struct ice_dcbx_cfg *dcbcfg;
- enum ice_status ret;
+ int ret;
struct ice_hw *hw;
u16 miblen;
@@ -1550,14 +1550,14 @@ enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
*
* query current port ETS configuration
*/
-enum ice_status
+int
ice_aq_query_port_ets(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aqc_query_port_ets *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (!pi)
return ICE_ERR_PARAM;
@@ -1577,13 +1577,13 @@ ice_aq_query_port_ets(struct ice_port_info *pi,
*
* update the SW DB with the new TC changes
*/
-enum ice_status
+int
ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf)
{
struct ice_sched_node *node, *tc_node;
struct ice_aqc_txsched_elem_data elem;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u32 teid1, teid2;
u8 i, j;
@@ -1645,12 +1645,12 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
* query current port ETS configuration and update the
* SW DB with the TC changes
*/
-enum ice_status
+int
ice_query_port_ets(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
- enum ice_status status;
+ int status;
ice_acquire_lock(&pi->sched_lock);
status = ice_aq_query_port_ets(pi, buf, buf_size, cd);
diff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h
index bae033a460..c2c48ae8bb 100644
--- a/drivers/net/ice/base/ice_dcb.h
+++ b/drivers/net/ice/base/ice_dcb.h
@@ -188,48 +188,48 @@ struct ice_dcbx_variables {
u32 deftsaassignment;
};
-enum ice_status
+int
ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,
u16 buf_size, u16 *local_len, u16 *remote_len,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,
struct ice_aqc_get_cee_dcb_cfg_resp *buff,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_set_pfc_mode(struct ice_hw *hw, u8 pfc_mode, struct ice_sq_cd *cd);
-enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);
+int ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);
u8 ice_get_dcbx_status(struct ice_hw *hw);
-enum ice_status
+int
ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,
struct ice_dcbx_cfg *dcbcfg);
-enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi);
-enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi);
+int ice_get_dcb_cfg(struct ice_port_info *pi);
+int ice_set_dcb_cfg(struct ice_port_info *pi);
void ice_get_dcb_cfg_from_mib_change(struct ice_port_info *pi,
struct ice_rq_event_info *event);
-enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change);
+int ice_init_dcb(struct ice_hw *hw, bool enable_mib_change);
void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg);
-enum ice_status
+int
ice_query_port_ets(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf, u16 buf_size,
struct ice_sq_cd *cmd_details);
-enum ice_status
+int
ice_aq_query_port_ets(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
struct ice_aqc_port_ets_elem *buf);
-enum ice_status
+int
ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_start_lldp(struct ice_hw *hw, bool persist, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,
bool *dcbx_agent_status, struct ice_sq_cd *cd);
-enum ice_status ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib);
-enum ice_status
+int ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib);
+int
ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,
struct ice_sq_cd *cd);
#endif /* _ICE_DCB_H_ */
diff --git a/drivers/net/ice/base/ice_ddp.c b/drivers/net/ice/base/ice_ddp.c
index ffcd5a9394..6b0af7f601 100644
--- a/drivers/net/ice/base/ice_ddp.c
+++ b/drivers/net/ice/base/ice_ddp.c
@@ -19,14 +19,14 @@
*
* Download Package (0x0C40)
*/
-static enum ice_status
+static int
ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
u16 buf_size, bool last_buf, u32 *error_offset,
u32 *error_info, struct ice_sq_cd *cd)
{
struct ice_aqc_download_pkg *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (error_offset)
*error_offset = 0;
@@ -64,7 +64,7 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
*
* Upload Section (0x0C41)
*/
-enum ice_status
+int
ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
u16 buf_size, struct ice_sq_cd *cd)
{
@@ -88,14 +88,14 @@ ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
*
* Update Package (0x0C42)
*/
-static enum ice_status
+static int
ice_aq_update_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, u16 buf_size,
bool last_buf, u32 *error_offset, u32 *error_info,
struct ice_sq_cd *cd)
{
struct ice_aqc_download_pkg *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
if (error_offset)
*error_offset = 0;
@@ -228,10 +228,10 @@ ice_is_signing_seg_type_at_idx(struct ice_pkg_hdr *pkg_hdr, u32 idx,
* @bufs: pointer to an array of buffers
* @count: the number of buffers in the array
*/
-enum ice_status
+int
ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u32 i;
for (i = 0; i < count; i++) {
@@ -260,10 +260,10 @@ ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
*
* Obtains change lock and updates package.
*/
-enum ice_status
+int
ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
{
- enum ice_status status;
+ int status;
status = ice_acquire_change_lock(hw, ICE_RES_WRITE);
if (status)
@@ -367,8 +367,8 @@ ice_dwnld_cfg_bufs_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 start,
return ICE_DDP_PKG_SUCCESS;
for (i = 0; i < count; i++) {
- enum ice_status status;
bool last = false;
+ int status;
bh = (struct ice_buf_hdr *)(bufs + start + i);
@@ -403,7 +403,7 @@ ice_dwnld_cfg_bufs_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 start,
*
* Get Package Info List (0x0C43)
*/
-static enum ice_status
+static int
ice_aq_get_pkg_info_list(struct ice_hw *hw,
struct ice_aqc_get_pkg_info_resp *pkg_info,
u16 buf_size, struct ice_sq_cd *cd)
@@ -606,7 +606,7 @@ static enum ice_ddp_state
ice_post_dwnld_pkg_actions(struct ice_hw *hw)
{
enum ice_ddp_state state = ICE_DDP_PKG_SUCCESS;
- enum ice_status status;
+ int status;
status = ice_set_vlan_mode(hw);
if (status) {
@@ -628,7 +628,7 @@ ice_download_pkg_with_sig_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
{
enum ice_aq_err aq_err = hw->adminq.sq_last_status;
enum ice_ddp_state state = ICE_DDP_PKG_ERR;
- enum ice_status status;
+ int status;
u32 i;
ice_debug(hw, ICE_DBG_INIT, "Segment ID %d\n", hw->pkg_seg_id);
@@ -674,8 +674,8 @@ static enum ice_ddp_state
ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
{
enum ice_ddp_state state = ICE_DDP_PKG_SUCCESS;
- enum ice_status status;
struct ice_buf_hdr *bh;
+ int status;
if (!bufs || !count)
return ICE_DDP_PKG_ERR;
@@ -1572,7 +1572,7 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type req_profs,
* NOTE: The caller of the function is responsible for freeing the memory
* allocated for every list entry.
*/
-enum ice_status
+int
ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list)
{
@@ -1713,7 +1713,7 @@ void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)
* result in some wasted space in the buffer.
* Note: all package contents must be in Little Endian form.
*/
-enum ice_status
+int
ice_pkg_buf_reserve_section(struct ice_buf_build *bld, u16 count)
{
struct ice_buf_hdr *buf;
@@ -2129,7 +2129,7 @@ ice_boost_tcam_handler(u32 sect_type, void *section, u32 index, u32 *offset)
* if it is found. The ice_seg parameter must not be NULL since the first call
* to ice_pkg_enum_entry requires a pointer to an actual ice_segment structure.
*/
-static enum ice_status
+static int
ice_find_boost_entry(struct ice_seg *ice_seg, u16 addr,
struct ice_boost_tcam_entry **entry)
{
@@ -2231,11 +2231,11 @@ void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg)
* this case, the caller can just skip performing any
* update of the package.
*/
-enum ice_status
+int
ice_acquire_global_cfg_lock(struct ice_hw *hw,
enum ice_aq_res_access_type access)
{
- enum ice_status status;
+ int status;
status = ice_acquire_res(hw, ICE_GLOBAL_CFG_LOCK_RES_ID, access,
ICE_GLOBAL_CFG_LOCK_TIMEOUT);
@@ -2264,7 +2264,7 @@ void ice_release_global_cfg_lock(struct ice_hw *hw)
*
* This function will request ownership of the change lock.
*/
-enum ice_status
+int
ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access)
{
return ice_acquire_res(hw, ICE_CHANGE_LOCK_RES_ID, access,
@@ -2293,13 +2293,13 @@ void ice_release_change_lock(struct ice_hw *hw)
*
* The function will get or set tx topology
*/
-static enum ice_status
+static int
ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,
struct ice_sq_cd *cd, u8 *flags, bool set)
{
struct ice_aqc_get_set_tx_topo *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.get_set_tx_topo;
if (set) {
@@ -2333,7 +2333,7 @@ ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,
* The function will apply the new Tx topology from the package buffer
* if available.
*/
-enum ice_status ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len)
+int ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len)
{
u8 *current_topo, *new_topo = NULL;
struct ice_run_time_cfg_seg *seg;
@@ -2341,7 +2341,7 @@ enum ice_status ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len)
struct ice_pkg_hdr *pkg_hdr;
enum ice_ddp_state state;
u16 i, size = 0, offset;
- enum ice_status status;
+ int status;
u32 reg = 0;
u8 flags;
diff --git a/drivers/net/ice/base/ice_ddp.h b/drivers/net/ice/base/ice_ddp.h
index 1e02adf0db..9aa5f03559 100644
--- a/drivers/net/ice/base/ice_ddp.h
+++ b/drivers/net/ice/base/ice_ddp.h
@@ -405,23 +405,23 @@ struct ice_marker_ptype_tcam_section {
struct ice_hw;
-enum ice_status
+int
ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access);
void ice_release_change_lock(struct ice_hw *hw);
struct ice_buf_build *ice_pkg_buf_alloc(struct ice_hw *hw);
void *
ice_pkg_buf_alloc_section(struct ice_buf_build *bld, u32 type, u16 size);
-enum ice_status
+int
ice_pkg_buf_reserve_section(struct ice_buf_build *bld, u16 count);
-enum ice_status
+int
ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,
ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list);
u16 ice_pkg_buf_get_active_sections(struct ice_buf_build *bld);
-enum ice_status
+int
ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count);
-enum ice_status
+int
ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count);
void ice_release_global_cfg_lock(struct ice_hw *hw);
struct ice_generic_seg_hdr *
@@ -433,7 +433,7 @@ enum ice_ddp_state
ice_get_pkg_info(struct ice_hw *hw);
void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg);
struct ice_buf_table *ice_find_buf_table(struct ice_seg *ice_seg);
-enum ice_status
+int
ice_acquire_global_cfg_lock(struct ice_hw *hw,
enum ice_aq_res_access_type access);
@@ -462,6 +462,6 @@ ice_pkg_buf_alloc_single_section(struct ice_hw *hw, u32 type, u16 size,
struct ice_buf *ice_pkg_buf(struct ice_buf_build *bld);
void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld);
-enum ice_status ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len);
+int ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len);
#endif /* _ICE_DDP_H_ */
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index c742c77ac6..9334933a2e 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -3502,7 +3502,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
* @hw: pointer to the hardware structure
* @cntr_id: returns counter index
*/
-enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id)
+int ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id)
{
return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
@@ -3513,7 +3513,7 @@ enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id)
* @hw: pointer to the hardware structure
* @cntr_id: counter index to be freed
*/
-enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id)
+int ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id)
{
return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_COUNTER_BLOCK,
ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1, cntr_id);
@@ -3525,7 +3525,7 @@ enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id)
* @cntr_id: returns counter index
* @num_fltr: number of filter entries to be allocated
*/
-enum ice_status
+int
ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
{
return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
@@ -3539,7 +3539,7 @@ ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
* @cntr_id: counter index that needs to be freed
* @num_fltr: number of filters to be freed
*/
-enum ice_status
+int
ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
{
return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_GUARANTEED_ENTRIES,
@@ -3553,7 +3553,7 @@ ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
* @cntr_id: returns counter index
* @num_fltr: number of filter entries to be allocated
*/
-enum ice_status
+int
ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
{
return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
@@ -3567,7 +3567,7 @@ ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr)
* @cntr_id: counter index that needs to be freed
* @num_fltr: number of filters to be freed
*/
-enum ice_status
+int
ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr)
{
return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_FDIR_SHARED_ENTRIES,
@@ -3690,7 +3690,7 @@ static void ice_pkt_insert_mac_addr(u8 *pkt, u8 *addr)
*
* returns an open tunnel port specified for this flow type
*/
-static enum ice_status
+static int
ice_fdir_get_open_tunnel_port(struct ice_hw *hw, enum ice_fltr_ptype flow,
u16 *port)
{
@@ -3822,7 +3822,7 @@ ice_fdir_gen_l2tpv2_pkt(u8 *pkt, struct ice_fdir_l2tpv2 *l2tpv2_data,
* @frag: generate a fragment packet
* @tun: true implies generate a tunnel packet
*/
-enum ice_status
+int
ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
u8 *pkt, bool frag, bool tun)
{
@@ -4810,7 +4810,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
* @pkt: pointer to return filter packet
* @frag: generate a fragment packet
*/
-enum ice_status
+int
ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag)
{
return ice_fdir_get_gen_prgm_pkt(NULL, input, pkt, frag, false);
@@ -4995,7 +4995,7 @@ bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input)
*
* Clears FD table entries for a PF by issuing admin command (direct, 0x0B06)
*/
-enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw)
+int ice_clear_pf_fd_table(struct ice_hw *hw)
{
struct ice_aqc_clear_fd_table *cmd;
struct ice_aq_desc desc;
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 81ba6008e4..1bb8a14a5d 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -318,24 +318,24 @@ ice_fdir_comp_rules_basic(struct ice_fdir_fltr *a, struct ice_fdir_fltr *b);
bool
ice_fdir_comp_rules_extended(struct ice_fdir_fltr *a, struct ice_fdir_fltr *b);
-enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
-enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
-enum ice_status
+int ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
+int ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
+int
ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
-enum ice_status
+int
ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
-enum ice_status
+int
ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
-enum ice_status
+int
ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
-enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
+int ice_clear_pf_fd_table(struct ice_hw *hw);
void
ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
struct ice_fltr_desc *fdesc, bool add);
-enum ice_status
+int
ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
u8 *pkt, bool frag, bool tun);
-enum ice_status
+int
ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag);
int ice_get_fdir_cnt_all(struct ice_hw *hw);
bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index f9266447d9..0e75ae9ebe 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -182,7 +182,7 @@ void ice_add_dvm_hint(struct ice_hw *hw, u16 val, bool enable)
* ------------------------------
* Result: key: b01 10 11 11 00 00
*/
-static enum ice_status
+static int
ice_gen_key_word(u8 val, u8 valid, u8 dont_care, u8 nvr_mtch, u8 *key,
u8 *key_inv)
{
@@ -284,7 +284,7 @@ static bool ice_bits_max_set(const u8 *mask, u16 size, u16 max)
* dc == NULL --> dc mask is all 0's (no don't care bits)
* nm == NULL --> nm mask is all 0's (no never match bits)
*/
-enum ice_status
+int
ice_set_key(u8 *key, u16 size, u8 *val, u8 *upd, u8 *dc, u8 *nm, u16 off,
u16 len)
{
@@ -445,12 +445,12 @@ ice_get_open_tunnel_port(struct ice_hw *hw, enum ice_tunnel_type type,
* @hw: pointer to the HW structure
* @entry: pointer to double vlan boost entry info
*/
-static enum ice_status
+static int
ice_upd_dvm_boost_entry(struct ice_hw *hw, struct ice_dvm_entry *entry)
{
struct ice_boost_tcam_section *sect_rx, *sect_tx;
- enum ice_status status = ICE_ERR_MAX_LIMIT;
struct ice_buf_build *bld;
+ int status = ICE_ERR_MAX_LIMIT;
u8 val, dc, nm;
bld = ice_pkg_buf_alloc(hw);
@@ -513,12 +513,12 @@ ice_upd_dvm_boost_entry(struct ice_hw *hw, struct ice_dvm_entry *entry)
*
* Enable double vlan by updating the appropriate boost tcam entries.
*/
-enum ice_status ice_set_dvm_boost_entries(struct ice_hw *hw)
+int ice_set_dvm_boost_entries(struct ice_hw *hw)
{
u16 i;
for (i = 0; i < hw->dvm_upd.count; i++) {
- enum ice_status status;
+ int status;
status = ice_upd_dvm_boost_entry(hw, &hw->dvm_upd.tbl[i]);
if (status)
@@ -538,12 +538,12 @@ enum ice_status ice_set_dvm_boost_entries(struct ice_hw *hw)
* creating a package buffer with the tunnel info and issuing an update package
* command.
*/
-enum ice_status
+int
ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port)
{
struct ice_boost_tcam_section *sect_rx, *sect_tx;
- enum ice_status status = ICE_ERR_MAX_LIMIT;
struct ice_buf_build *bld;
+ int status = ICE_ERR_MAX_LIMIT;
u16 index;
ice_acquire_lock(&hw->tnl_lock);
@@ -625,11 +625,11 @@ ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port)
* targeting the specific updates requested and then performing an update
* package.
*/
-enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all)
+int ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all)
{
struct ice_boost_tcam_section *sect_rx, *sect_tx;
- enum ice_status status = ICE_ERR_MAX_LIMIT;
struct ice_buf_build *bld;
+ int status = ICE_ERR_MAX_LIMIT;
u16 count = 0;
u16 index;
u16 size;
@@ -729,7 +729,7 @@ enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all)
* @prot: variable to receive the protocol ID
* @off: variable to receive the protocol offset
*/
-enum ice_status
+int
ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx,
u8 *prot, u16 *off)
{
@@ -762,7 +762,7 @@ ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx,
* PTG ID that contains it through the PTG parameter, with the value of
* ICE_DEFAULT_PTG (0) meaning it is part the default PTG.
*/
-static enum ice_status
+static int
ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)
{
if (ptype >= ICE_XLT1_CNT || !ptg)
@@ -796,7 +796,7 @@ static void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)
* This function will remove the ptype from the specific PTG, and move it to
* the default PTG (ICE_DEFAULT_PTG).
*/
-static enum ice_status
+static int
ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
{
struct ice_ptg_ptype **ch;
@@ -843,11 +843,11 @@ ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
* a destination PTG ID of ICE_DEFAULT_PTG (0) will move the ptype to the
* default PTG.
*/
-static enum ice_status
+static int
ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)
{
- enum ice_status status;
u8 original_ptg;
+ int status;
if (ptype > ICE_XLT1_CNT - 1)
return ICE_ERR_PARAM;
@@ -987,7 +987,7 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
* This function will lookup the VSI entry in the XLT2 list and return
* the VSI group its associated with.
*/
-enum ice_status
+int
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)
{
if (!vsig || vsi >= ICE_MAX_VSI)
@@ -1056,7 +1056,7 @@ static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)
* for, the list must match exactly, including the order in which the
* characteristics are listed.
*/
-static enum ice_status
+static int
ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
struct LIST_HEAD_TYPE *chs, u16 *vsig)
{
@@ -1082,7 +1082,7 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
* The function will remove all VSIs associated with the input VSIG and move
* them to the DEFAULT_VSIG and mark the VSIG available.
*/
-static enum ice_status
+static int
ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
{
struct ice_vsig_prof *dtmp, *del;
@@ -1143,7 +1143,7 @@ ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)
* The function will remove the input VSI from its VSI group and move it
* to the DEFAULT_VSIG.
*/
-static enum ice_status
+static int
ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
{
struct ice_vsig_vsi **vsi_head, *vsi_cur, *vsi_tgt;
@@ -1201,12 +1201,12 @@ ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
* move the entry to the DEFAULT_VSIG, update the original VSIG and
* then move entry to the new VSIG.
*/
-static enum ice_status
+static int
ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
{
struct ice_vsig_vsi *tmp;
- enum ice_status status;
u16 orig_vsig, idx;
+ int status;
idx = vsig & ICE_VSIG_IDX_M;
@@ -1324,7 +1324,7 @@ ice_prof_has_mask(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 *masks)
* @masks: masks for fv
* @prof_id: receives the profile ID
*/
-static enum ice_status
+static int
ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk,
struct ice_fv_word *fv, u16 *masks, u8 *prof_id)
{
@@ -1422,7 +1422,7 @@ static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
* This function allocates a new entry in a Profile ID TCAM for a specific
* block.
*/
-static enum ice_status
+static int
ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, bool btm,
u16 *tcam_idx)
{
@@ -1442,7 +1442,7 @@ ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, bool btm,
*
* This function frees an entry in a Profile ID TCAM for a specific block.
*/
-static enum ice_status
+static int
ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
{
u16 res_type;
@@ -1462,10 +1462,10 @@ ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)
* This function allocates a new profile ID, which also corresponds to a Field
* Vector (Extraction Sequence) entry.
*/
-static enum ice_status
+static int
ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
{
- enum ice_status status;
+ int status;
u16 res_type;
u16 get_prof;
@@ -1487,7 +1487,7 @@ ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)
*
* This function frees a profile ID, which also corresponds to a Field Vector.
*/
-static enum ice_status
+static int
ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
{
u16 tmp_prof_id = (u16)prof_id;
@@ -1505,7 +1505,7 @@ ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
* @blk: the block from which to free the profile ID
* @prof_id: the profile ID for which to increment the reference count
*/
-static enum ice_status
+static int
ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
{
if (prof_id > hw->blk[blk].es.count)
@@ -1630,13 +1630,13 @@ void ice_init_all_prof_masks(struct ice_hw *hw)
* @mask: the 16-bit mask
* @mask_idx: variable to receive the mask index
*/
-static enum ice_status
+static int
ice_alloc_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 idx, u16 mask,
u16 *mask_idx)
{
bool found_unused = false, found_copy = false;
- enum ice_status status = ICE_ERR_MAX_LIMIT;
u16 unused_idx = 0, copy_idx = 0;
+ int status = ICE_ERR_MAX_LIMIT;
u16 i;
if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
@@ -1698,7 +1698,7 @@ ice_alloc_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 idx, u16 mask,
* @blk: hardware block
* @mask_idx: index of mask
*/
-static enum ice_status
+static int
ice_free_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 mask_idx)
{
if (blk != ICE_BLK_RSS && blk != ICE_BLK_FD)
@@ -1740,7 +1740,7 @@ ice_free_prof_mask(struct ice_hw *hw, enum ice_block blk, u16 mask_idx)
* @blk: hardware block
* @prof_id: profile ID
*/
-static enum ice_status
+static int
ice_free_prof_masks(struct ice_hw *hw, enum ice_block blk, u16 prof_id)
{
u32 mask_bm;
@@ -1802,7 +1802,7 @@ void ice_shutdown_all_prof_masks(struct ice_hw *hw)
* @prof_id: profile ID
* @masks: masks
*/
-static enum ice_status
+static int
ice_update_prof_masking(struct ice_hw *hw, enum ice_block blk, u16 prof_id,
u16 *masks)
{
@@ -1874,7 +1874,7 @@ ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,
* @blk: the block from which to free the profile ID
* @prof_id: the profile ID for which to decrement the reference count
*/
-static enum ice_status
+static int
ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)
{
if (prof_id > hw->blk[blk].es.count)
@@ -2138,7 +2138,7 @@ void ice_init_flow_profs(struct ice_hw *hw, u8 blk_idx)
* ice_init_hw_tbls - init hardware table memory
* @hw: pointer to the hardware structure
*/
-enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
+int ice_init_hw_tbls(struct ice_hw *hw)
{
u8 i;
@@ -2493,7 +2493,7 @@ void ice_clear_hw_tbls(struct ice_hw *hw)
* @nm_msk: never match mask
* @key: output of profile ID key
*/
-static enum ice_status
+static int
ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
u8 cdid, u16 flags, u8 vl_msk[ICE_TCAM_KEY_VAL_SZ],
u8 dc_msk[ICE_TCAM_KEY_VAL_SZ], u8 nm_msk[ICE_TCAM_KEY_VAL_SZ],
@@ -2549,7 +2549,7 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
* @dc_msk: don't care mask
* @nm_msk: never match mask
*/
-static enum ice_status
+static int
ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
u8 prof_id, u8 ptg, u16 vsig, u8 cdid, u16 flags,
u8 vl_msk[ICE_TCAM_KEY_VAL_SZ],
@@ -2557,7 +2557,7 @@ ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
u8 nm_msk[ICE_TCAM_KEY_VAL_SZ])
{
struct ice_prof_tcam_entry;
- enum ice_status status;
+ int status;
status = ice_prof_gen_key(hw, blk, ptg, vsig, cdid, flags, vl_msk,
dc_msk, nm_msk, hw->blk[blk].prof.t[idx].key);
@@ -2576,7 +2576,7 @@ ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,
* @vsig: VSIG to query
* @refs: pointer to variable to receive the reference count
*/
-static enum ice_status
+static int
ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)
{
u16 idx = vsig & ICE_VSIG_IDX_M;
@@ -2626,7 +2626,7 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
*/
-static enum ice_status
+static int
ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
struct ice_buf_build *bld, struct LIST_HEAD_TYPE *chgs)
{
@@ -2667,7 +2667,7 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
*/
-static enum ice_status
+static int
ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
struct ice_buf_build *bld, struct LIST_HEAD_TYPE *chgs)
{
@@ -2707,7 +2707,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
*/
-static enum ice_status
+static int
ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
struct LIST_HEAD_TYPE *chgs)
{
@@ -2742,7 +2742,7 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
* @bld: the update package buffer build to add to
* @chgs: the list of changes to make in hardware
*/
-static enum ice_status
+static int
ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
struct LIST_HEAD_TYPE *chgs)
{
@@ -2784,13 +2784,13 @@ ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
* @blk: hardware block
* @chgs: the list of changes to make in hardware
*/
-static enum ice_status
+static int
ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,
struct LIST_HEAD_TYPE *chgs)
{
struct ice_buf_build *b;
struct ice_chs_chg *tmp;
- enum ice_status status;
+ int status;
u16 pkg_sects;
u16 xlt1 = 0;
u16 xlt2 = 0;
@@ -2942,7 +2942,7 @@ static const struct ice_fd_src_dst_pair ice_fd_pairs[] = {
* @prof_id: profile ID
* @es: extraction sequence (length of array is determined by the block)
*/
-static enum ice_status
+static int
ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
{
ice_declare_bitmap(pair_list, ICE_FD_SRC_DST_PAIR_COUNT);
@@ -3118,7 +3118,7 @@ ice_get_ptype_attrib_info(enum ice_ptype_attrib_type type,
* @attr: array of attributes that will be considered
* @attr_cnt: number of elements in the attribute array
*/
-static enum ice_status
+static int
ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,
const struct ice_ptype_attributes *attr, u16 attr_cnt)
{
@@ -3198,14 +3198,14 @@ static void ice_disable_fd_swap(struct ice_hw *hw, u16 prof_id)
* it will not be written until the first call to ice_add_flow that specifies
* the ID value used here.
*/
-enum ice_status
+int
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,
ice_bitmap_t *ptypes, const struct ice_ptype_attributes *attr,
u16 attr_cnt, struct ice_fv_word *es, u16 *masks, bool fd_swap)
{
ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT);
struct ice_prof_map *prof;
- enum ice_status status;
+ int status;
u8 prof_id;
u16 ptype;
@@ -3344,14 +3344,14 @@ ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
* @blk: hardware block
* @idx: the index to release
*/
-static enum ice_status
+static int
ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
{
/* Masks to invoke a never match entry */
u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFE, 0xFF, 0xFF, 0xFF, 0xFF };
u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x01, 0x00, 0x00, 0x00, 0x00 };
- enum ice_status status;
+ int status;
/* write the TCAM entry */
status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,
@@ -3371,11 +3371,11 @@ ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)
* @blk: hardware block
* @prof: pointer to profile structure to remove
*/
-static enum ice_status
+static int
ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
struct ice_vsig_prof *prof)
{
- enum ice_status status;
+ int status;
u16 i;
for (i = 0; i < prof->tcam_count; i++)
@@ -3397,7 +3397,7 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
* @vsig: the VSIG to remove
* @chg: the change list
*/
-static enum ice_status
+static int
ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
struct LIST_HEAD_TYPE *chg)
{
@@ -3409,7 +3409,7 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
LIST_FOR_EACH_ENTRY_SAFE(d, t,
&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
ice_vsig_prof, list) {
- enum ice_status status;
+ int status;
status = ice_rem_prof_id(hw, blk, d);
if (status)
@@ -3454,7 +3454,7 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
* @hdl: profile handle indicating which profile to remove
* @chg: list to receive a record of changes
*/
-static enum ice_status
+static int
ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
struct LIST_HEAD_TYPE *chg)
{
@@ -3465,7 +3465,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
ice_vsig_prof, list)
if (p->profile_cookie == hdl) {
- enum ice_status status;
+ int status;
if (ice_vsig_prof_id_count(hw, blk, vsig) == 1)
/* this is the last profile, remove the VSIG */
@@ -3488,12 +3488,12 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
* @blk: hardware block
* @id: profile tracking ID
*/
-static enum ice_status
+static int
ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
{
struct ice_chs_chg *del, *tmp;
struct LIST_HEAD_TYPE chg;
- enum ice_status status;
+ int status;
u16 i;
INIT_LIST_HEAD(&chg);
@@ -3529,10 +3529,10 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
* previously created through ice_add_prof. If any existing entries
* are associated with this profile, they will be removed as well.
*/
-enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
+int ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
{
struct ice_prof_map *pmap;
- enum ice_status status;
+ int status;
ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
@@ -3565,11 +3565,11 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
* @hdl: profile handle
* @chg: change list
*/
-static enum ice_status
+static int
ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
struct LIST_HEAD_TYPE *chg)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_prof_map *map;
struct ice_chs_chg *p;
u16 i;
@@ -3620,7 +3620,7 @@ ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
*
* This routine makes a copy of the list of profiles in the specified VSIG.
*/
-static enum ice_status
+static int
ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
struct LIST_HEAD_TYPE *lst)
{
@@ -3658,11 +3658,11 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
* @lst: the list to be added to
* @hdl: profile handle of entry to add
*/
-static enum ice_status
+static int
ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
struct LIST_HEAD_TYPE *lst, u64 hdl)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_prof_map *map;
struct ice_vsig_prof *p;
u16 i;
@@ -3706,11 +3706,11 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
* @vsig: the VSIG to move the VSI to
* @chg: the change list
*/
-static enum ice_status
+static int
ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,
struct LIST_HEAD_TYPE *chg)
{
- enum ice_status status;
+ int status;
struct ice_chs_chg *p;
u16 orig_vsig;
@@ -3780,13 +3780,13 @@ ice_rem_chg_tcam_ent(struct ice_hw *hw, u16 idx, struct LIST_HEAD_TYPE *chg)
*
* This function appends an enable or disable TCAM entry in the change log
*/
-static enum ice_status
+static int
ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
u16 vsig, struct ice_tcam_inf *tcam,
struct LIST_HEAD_TYPE *chg)
{
- enum ice_status status;
struct ice_chs_chg *p;
+ int status;
u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0x00, 0x00, 0x00 };
@@ -3882,13 +3882,13 @@ ice_ptg_attr_in_use(struct ice_tcam_inf *ptg_attr, ice_bitmap_t *ptgs_used,
* @vsig: the VSIG for which to adjust profile priorities
* @chg: the change list
*/
-static enum ice_status
+static int
ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
struct LIST_HEAD_TYPE *chg)
{
ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT);
struct ice_tcam_inf **attr_used;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_vsig_prof *t;
u16 attr_used_cnt = 0;
u16 idx;
@@ -3970,7 +3970,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
* @rev: true to add entries to the end of the list
* @chg: the change list
*/
-static enum ice_status
+static int
ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
bool rev, struct LIST_HEAD_TYPE *chg)
{
@@ -3978,7 +3978,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0x00, 0x00, 0x00 };
u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x00, 0x00, 0x00, 0x00, 0x00 };
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_prof_map *map;
struct ice_vsig_prof *t;
struct ice_chs_chg *p;
@@ -4086,11 +4086,11 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
* @hdl: the profile handle of the profile that will be added to the VSIG
* @chg: the change list
*/
-static enum ice_status
+static int
ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
struct LIST_HEAD_TYPE *chg)
{
- enum ice_status status;
+ int status;
struct ice_chs_chg *p;
u16 new_vsig;
@@ -4136,13 +4136,13 @@ ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,
* @new_vsig: return of new VSIG
* @chg: the change list
*/
-static enum ice_status
+static int
ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,
struct LIST_HEAD_TYPE *lst, u16 *new_vsig,
struct LIST_HEAD_TYPE *chg)
{
struct ice_vsig_prof *t;
- enum ice_status status;
+ int status;
u16 vsig;
vsig = ice_vsig_alloc(hw, blk);
@@ -4178,7 +4178,7 @@ ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
{
struct ice_vsig_prof *t;
struct LIST_HEAD_TYPE lst;
- enum ice_status status;
+ int status;
INIT_LIST_HEAD(&lst);
@@ -4211,12 +4211,12 @@ ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)
* save time in generating a new VSIG and TCAMs till a match is
* found and subsequent rollback when a matching VSIG is found.
*/
-enum ice_status
+int
ice_add_vsi_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
{
struct ice_chs_chg *tmp, *del;
struct LIST_HEAD_TYPE chg;
- enum ice_status status;
+ int status;
/* if target VSIG is default the move is invalid */
if ((vsig & ICE_VSIG_IDX_M) == ICE_DEFAULT_VSIG)
@@ -4249,14 +4249,14 @@ ice_add_vsi_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
* profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
-enum ice_status
+int
ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
{
struct ice_vsig_prof *tmp1, *del1;
struct LIST_HEAD_TYPE union_lst;
struct ice_chs_chg *tmp, *del;
struct LIST_HEAD_TYPE chg;
- enum ice_status status;
+ int status;
u16 vsig;
INIT_LIST_HEAD(&union_lst);
@@ -4390,7 +4390,7 @@ ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
* @lst: list to remove the profile from
* @hdl: the profile handle indicating the profile to remove
*/
-static enum ice_status
+static int
ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)
{
struct ice_vsig_prof *ent, *tmp;
@@ -4416,13 +4416,13 @@ ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)
* profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be disabled.
*/
-enum ice_status
+int
ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
{
struct ice_vsig_prof *tmp1, *del1;
struct LIST_HEAD_TYPE chg, copy;
struct ice_chs_chg *tmp, *del;
- enum ice_status status;
+ int status;
u16 vsig;
INIT_LIST_HEAD(©);
@@ -4550,11 +4550,11 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
* profile indicated by the ID parameter for the VSIs specified in the VSI
* array. Once successfully called, the flow will be enabled.
*/
-enum ice_status
+int
ice_flow_assoc_hw_prof(struct ice_hw *hw, enum ice_block blk,
u16 dest_vsi_handle, u16 fdir_vsi_handle, int id)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u16 vsi_num;
vsi_num = ice_get_hw_vsi_num(hw, dest_vsi_handle);
diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h
index 422d09becc..5e5d3a78f0 100644
--- a/drivers/net/ice/base/ice_flex_pipe.h
+++ b/drivers/net/ice/base/ice_flex_pipe.h
@@ -7,10 +7,10 @@
#include "ice_type.h"
-enum ice_status
+int
ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx,
u8 *prot, u16 *off);
-enum ice_status
+int
ice_find_label_value(struct ice_seg *ice_seg, char const *name, u32 type,
u16 *value);
void
@@ -18,16 +18,16 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type,
ice_bitmap_t *bm);
void
ice_init_prof_result_bm(struct ice_hw *hw);
-enum ice_status
+int
ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,
u16 buf_size, struct ice_sq_cd *cd);
bool
ice_get_open_tunnel_port(struct ice_hw *hw, enum ice_tunnel_type type,
u16 *port);
-enum ice_status
+int
ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port);
-enum ice_status ice_set_dvm_boost_entries(struct ice_hw *hw);
-enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all);
+int ice_set_dvm_boost_entries(struct ice_hw *hw);
+int ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all);
bool ice_tunnel_port_in_use(struct ice_hw *hw, u16 port, u16 *index);
bool
ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type);
@@ -36,9 +36,9 @@ ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type);
bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);
/* XLT2/VSI group functions */
-enum ice_status
+int
ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);
-enum ice_status
+int
ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,
ice_bitmap_t *ptypes, const struct ice_ptype_attributes *attr,
u16 attr_cnt, struct ice_fv_word *es, u16 *masks, bool fd_swap);
@@ -46,23 +46,23 @@ void ice_init_all_prof_masks(struct ice_hw *hw);
void ice_shutdown_all_prof_masks(struct ice_hw *hw);
struct ice_prof_map *
ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id);
-enum ice_status
+int
ice_add_vsi_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig);
-enum ice_status
+int
ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);
-enum ice_status
+int
ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);
-enum ice_status
+int
ice_flow_assoc_hw_prof(struct ice_hw *hw, enum ice_block blk,
u16 dest_vsi_handle, u16 fdir_vsi_handle, int id);
-enum ice_status ice_init_hw_tbls(struct ice_hw *hw);
+int ice_init_hw_tbls(struct ice_hw *hw);
void ice_fill_blk_tbls(struct ice_hw *hw);
void ice_clear_hw_tbls(struct ice_hw *hw);
void ice_free_hw_tbls(struct ice_hw *hw);
-enum ice_status
+int
ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id);
-enum ice_status
+int
ice_set_key(u8 *key, u16 size, u8 *val, u8 *upd, u8 *dc, u8 *nm, u16 off,
u16 len);
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 7f1490de50..d8181805f1 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1016,7 +1016,7 @@ struct ice_flow_prof_params {
* @segs: array of one or more packet segments that describe the flow
* @segs_cnt: number of packet segments provided
*/
-static enum ice_status
+static int
ice_flow_val_hdrs(struct ice_flow_seg_info *segs, u8 segs_cnt)
{
u8 i;
@@ -1091,7 +1091,7 @@ static u16 ice_flow_calc_seg_sz(struct ice_flow_prof_params *params, u8 seg)
* This function identifies the packet types associated with the protocol
* headers being present in packet segments of the specified flow profile.
*/
-static enum ice_status
+static int
ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
{
struct ice_flow_prof *prof;
@@ -1330,7 +1330,7 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
* This function will allocate an extraction sequence entries for a DWORD size
* chunk of the packet flags.
*/
-static enum ice_status
+static int
ice_flow_xtract_pkt_flags(struct ice_hw *hw,
struct ice_flow_prof_params *params,
enum ice_flex_mdid_pkt_flags flags)
@@ -1369,7 +1369,7 @@ ice_flow_xtract_pkt_flags(struct ice_hw *hw,
* field. It then allocates one or more extraction sequence entries for the
* given field, and fill the entries with protocol ID and offset information.
*/
-static enum ice_status
+static int
ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
u8 seg, enum ice_flow_field fld, u64 match)
{
@@ -1626,7 +1626,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
* @params: information about the flow to be processed
* @seg: index of packet segment whose raw fields are to be extracted
*/
-static enum ice_status
+static int
ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params,
u8 seg)
{
@@ -1704,11 +1704,11 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params,
* This function iterates through all matched fields in the given segments, and
* creates an extraction sequence for the fields.
*/
-static enum ice_status
+static int
ice_flow_create_xtrct_seq(struct ice_hw *hw,
struct ice_flow_prof_params *params)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 i;
/* For ACL, we also need to extract the direction bit (Rx,Tx) data from
@@ -1750,7 +1750,7 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw,
* This function will return the specific scenario based on the
* params passed to it
*/
-static enum ice_status
+static int
ice_flow_sel_acl_scen(struct ice_hw *hw, struct ice_flow_prof_params *params)
{
/* Find the best-fit scenario for the provided match width */
@@ -1778,7 +1778,7 @@ ice_flow_sel_acl_scen(struct ice_hw *hw, struct ice_flow_prof_params *params)
* ice_flow_acl_def_entry_frmt - Determine the layout of flow entries
* @params: information about the flow to be processed
*/
-static enum ice_status
+static int
ice_flow_acl_def_entry_frmt(struct ice_flow_prof_params *params)
{
u16 index, i, range_idx = 0;
@@ -1860,10 +1860,10 @@ ice_flow_acl_def_entry_frmt(struct ice_flow_prof_params *params)
* @hw: pointer to the HW struct
* @params: information about the flow to be processed
*/
-static enum ice_status
+static int
ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
{
- enum ice_status status;
+ int status;
status = ice_flow_proc_seg_hdrs(params);
if (status)
@@ -2019,12 +2019,12 @@ ice_dealloc_flow_entry(struct ice_hw *hw, struct ice_flow_entry *entry)
* @prof_id: the profile ID handle
* @hw_prof_id: pointer to variable to receive the HW profile ID
*/
-enum ice_status
+int
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
u8 *hw_prof_id)
{
- enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
struct ice_prof_map *map;
+ int status = ICE_ERR_DOES_NOT_EXIST;
ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
map = ice_search_prof_id(hw, blk, prof_id);
@@ -2048,12 +2048,12 @@ ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
* returns ICE_ERR_IN_USE if at least one PF is associated to the given profile
* returns other error code for real error
*/
-static enum ice_status
+static int
ice_flow_acl_is_prof_in_use(struct ice_hw *hw, struct ice_flow_prof *prof,
struct ice_aqc_acl_prof_generic_frmt *buf)
{
- enum ice_status status;
u8 prof_id = 0;
+ int status;
status = ice_flow_get_hw_prof(hw, ICE_BLK_ACL, prof->id, &prof_id);
if (status)
@@ -2092,7 +2092,7 @@ ice_flow_acl_is_prof_in_use(struct ice_hw *hw, struct ice_flow_prof *prof,
* @acts: array of actions to be performed on a match
* @acts_cnt: number of actions
*/
-static enum ice_status
+static int
ice_flow_acl_free_act_cntr(struct ice_hw *hw, struct ice_flow_action *acts,
u8 acts_cnt)
{
@@ -2103,7 +2103,7 @@ ice_flow_acl_free_act_cntr(struct ice_hw *hw, struct ice_flow_action *acts,
acts[i].type == ICE_FLOW_ACT_CNTR_BYTES ||
acts[i].type == ICE_FLOW_ACT_CNTR_PKT_BYTES) {
struct ice_acl_cntrs cntrs = { 0 };
- enum ice_status status;
+ int status;
/* amount is unused in the dealloc path but the common
* parameter check routine wants a value set, as zero
@@ -2136,11 +2136,11 @@ ice_flow_acl_free_act_cntr(struct ice_hw *hw, struct ice_flow_action *acts,
*
* Disassociate the scenario from the profile for the PF of the VSI.
*/
-static enum ice_status
+static int
ice_flow_acl_disassoc_scen(struct ice_hw *hw, struct ice_flow_prof *prof)
{
struct ice_aqc_acl_prof_generic_frmt buf;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 prof_id = 0;
ice_memset(&buf, 0, sizeof(buf), ICE_NONDMA_MEM);
@@ -2166,7 +2166,7 @@ ice_flow_acl_disassoc_scen(struct ice_hw *hw, struct ice_flow_prof *prof)
* @blk: classification stage
* @entry: flow entry to be removed
*/
-static enum ice_status
+static int
ice_flow_rem_entry_sync(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_entry *entry)
{
@@ -2174,7 +2174,7 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, enum ice_block blk,
return ICE_ERR_BAD_PTR;
if (blk == ICE_BLK_ACL) {
- enum ice_status status;
+ int status;
if (!entry->prof)
return ICE_ERR_BAD_PTR;
@@ -2211,7 +2211,7 @@ ice_flow_rem_entry_sync(struct ice_hw *hw, enum ice_block blk,
*
* Assumption: the caller has acquired the lock to the profile list
*/
-static enum ice_status
+static int
ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
enum ice_flow_dir dir, u64 prof_id,
struct ice_flow_seg_info *segs, u8 segs_cnt,
@@ -2219,7 +2219,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof **prof)
{
struct ice_flow_prof_params *params;
- enum ice_status status;
+ int status;
u8 i;
if (!prof || (acts_cnt && !acts))
@@ -2307,11 +2307,11 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
*
* Assumption: the caller has acquired the lock to the profile list
*/
-static enum ice_status
+static int
ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof *prof)
{
- enum ice_status status;
+ int status;
/* Remove all remaining flow entries before removing the flow profile */
if (!LIST_EMPTY(&prof->entries)) {
@@ -2403,13 +2403,13 @@ ice_flow_acl_set_xtrct_seq_fld(struct ice_aqc_acl_prof_generic_frmt *buf,
* @hw: pointer to the hardware structure
* @prof: pointer to flow profile
*/
-static enum ice_status
+static int
ice_flow_acl_set_xtrct_seq(struct ice_hw *hw, struct ice_flow_prof *prof)
{
struct ice_aqc_acl_prof_generic_frmt buf;
struct ice_flow_fld_info *info;
- enum ice_status status;
u8 prof_id = 0;
+ int status;
u16 i;
ice_memset(&buf, 0, sizeof(buf), ICE_NONDMA_MEM);
@@ -2473,11 +2473,11 @@ ice_flow_acl_set_xtrct_seq(struct ice_hw *hw, struct ice_flow_prof *prof)
* be added has the same characteristics as the VSIG and will
* thereby have access to all resources added to that VSIG.
*/
-enum ice_status
+int
ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
u16 vsig)
{
- enum ice_status status;
+ int status;
if (!ice_is_vsi_valid(hw, vsi_handle) || blk >= ICE_BLK_COUNT)
return ICE_ERR_PARAM;
@@ -2500,11 +2500,11 @@ ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
* Assumption: the caller has acquired the lock to the profile list
* and the software VSI handle has been validated
*/
-enum ice_status
+int
ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof *prof, u16 vsi_handle)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (!ice_is_bit_set(prof->vsis, vsi_handle)) {
if (blk == ICE_BLK_ACL) {
@@ -2536,11 +2536,11 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
* Assumption: the caller has acquired the lock to the profile list
* and the software VSI handle has been validated
*/
-static enum ice_status
+static int
ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof *prof, u16 vsi_handle)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (ice_is_bit_set(prof->vsis, vsi_handle)) {
status = ice_rem_prof_id_flow(hw, blk,
@@ -2574,7 +2574,7 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
* @prof: stores parsed profile info from raw flow
* @blk: classification stage
*/
-enum ice_status
+int
ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle,
u16 fdir_vsi_handle, struct ice_parser_profile *prof,
enum ice_block blk)
@@ -2582,7 +2582,7 @@ ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle,
int id = ice_find_first_bit(prof->ptypes, ICE_FLOW_PTYPE_MAX);
struct ice_flow_prof_params *params;
u8 fv_words = hw->blk[blk].es.fvw;
- enum ice_status status;
+ int status;
int i, idx;
params = (struct ice_flow_prof_params *)ice_malloc(hw, sizeof(*params));
@@ -2652,13 +2652,13 @@ ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle,
* @acts_cnt: number of default actions
* @prof: stores the returned flow profile added
*/
-enum ice_status
+int
ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
u64 prof_id, struct ice_flow_seg_info *segs, u8 segs_cnt,
struct ice_flow_action *acts, u8 acts_cnt,
struct ice_flow_prof **prof)
{
- enum ice_status status;
+ int status;
if (segs_cnt > ICE_FLOW_SEG_MAX)
return ICE_ERR_MAX_LIMIT;
@@ -2691,11 +2691,11 @@ ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
* @blk: the block for which the flow profile is to be removed
* @prof_id: unique ID of the flow profile to be removed
*/
-enum ice_status
+int
ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
{
struct ice_flow_prof *prof;
- enum ice_status status;
+ int status;
ice_acquire_lock(&hw->fl_profs_locks[blk]);
@@ -2759,7 +2759,7 @@ u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id)
* @acts_cnt: number of actions
* @cnt_alloc: indicates if an ACL counter has been allocated.
*/
-static enum ice_status
+static int
ice_flow_acl_check_actions(struct ice_hw *hw, struct ice_flow_action *acts,
u8 acts_cnt, bool *cnt_alloc)
{
@@ -2792,7 +2792,7 @@ ice_flow_acl_check_actions(struct ice_hw *hw, struct ice_flow_action *acts,
acts[i].type == ICE_FLOW_ACT_CNTR_BYTES ||
acts[i].type == ICE_FLOW_ACT_CNTR_PKT_BYTES) {
struct ice_acl_cntrs cntrs = { 0 };
- enum ice_status status;
+ int status;
cntrs.amount = 1;
cntrs.bank = 0; /* Only bank0 for the moment */
@@ -2941,17 +2941,17 @@ ice_flow_acl_frmt_entry_fld(u16 fld, struct ice_flow_fld_info *info, u8 *buf,
* along with data from the flow profile. This key/key_inverse pair makes up
* the 'entry' for an ACL flow entry.
*/
-static enum ice_status
+static int
ice_flow_acl_frmt_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
struct ice_flow_entry *e, u8 *data,
struct ice_flow_action *acts, u8 acts_cnt)
{
u8 *buf = NULL, *dontcare = NULL, *key = NULL, range = 0, dir_flag_msk;
struct ice_aqc_acl_profile_ranges *range_buf = NULL;
- enum ice_status status;
bool cnt_alloc;
u8 prof_id = 0;
u16 i, buf_sz;
+ int status;
status = ice_flow_get_hw_prof(hw, ICE_BLK_ACL, prof->id, &prof_id);
if (status)
@@ -3208,7 +3208,7 @@ ice_flow_acl_convert_to_acl_prio(enum ice_flow_priority p)
* For this function, we do the union between dst_buf and src_buf
* range checker buffer, and we will save the result back to dst_buf
*/
-static enum ice_status
+static int
ice_flow_acl_union_rng_chk(struct ice_aqc_acl_profile_ranges *dst_buf,
struct ice_aqc_acl_profile_ranges *src_buf)
{
@@ -3260,7 +3260,7 @@ ice_flow_acl_union_rng_chk(struct ice_aqc_acl_profile_ranges *dst_buf,
* corresponding ACL scenario. Then, we will perform matching logic to
* see if we want to add/modify/do nothing with this new entry.
*/
-static enum ice_status
+static int
ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
struct ice_flow_entry **entry)
{
@@ -3268,7 +3268,7 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
struct ice_aqc_acl_profile_ranges query_rng_buf, cfg_rng_buf;
struct ice_acl_act_entry *acts = NULL;
struct ice_flow_entry *exist;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_flow_entry *e;
u8 i;
@@ -3406,11 +3406,11 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
* @prof: pointer to flow profile
* @e: double pointer to the flow entry
*/
-static enum ice_status
+static int
ice_flow_acl_add_scen_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
struct ice_flow_entry **e)
{
- enum ice_status status;
+ int status;
ice_acquire_lock(&prof->entries_lock);
status = ice_flow_acl_add_scen_entry_sync(hw, prof, e);
@@ -3432,7 +3432,7 @@ ice_flow_acl_add_scen_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
* @acts_cnt: number of actions
* @entry_h: pointer to buffer that receives the new flow entry's handle
*/
-enum ice_status
+int
ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
u64 entry_id, u16 vsi_handle, enum ice_flow_priority prio,
void *data, struct ice_flow_action *acts, u8 acts_cnt,
@@ -3440,7 +3440,7 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
{
struct ice_flow_entry *e = NULL;
struct ice_flow_prof *prof;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
/* ACL entries must indicate an action */
if (blk == ICE_BLK_ACL && (!acts || !acts_cnt))
@@ -3524,12 +3524,12 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
* @blk: classification stage
* @entry_h: handle to the flow entry to be removed
*/
-enum ice_status ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk,
+int ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk,
u64 entry_h)
{
struct ice_flow_entry *entry;
struct ice_flow_prof *prof;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (entry_h == ICE_FLOW_ENTRY_HANDLE_INVAL)
return ICE_ERR_PARAM;
@@ -3695,11 +3695,11 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len,
* This function removes the flow entries associated to the input
* vsi handle and disassociates the vsi from the flow profile.
*/
-enum ice_status ice_flow_rem_vsi_prof(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
+int ice_flow_rem_vsi_prof(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
u64 prof_id)
{
struct ice_flow_prof *prof = NULL;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (blk >= ICE_BLK_COUNT || !ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
@@ -3764,7 +3764,7 @@ enum ice_status ice_flow_rem_vsi_prof(struct ice_hw *hw, enum ice_block blk, u16
* header value to set flow field segment for further use in flow
* profile entry or removal.
*/
-static enum ice_status
+static int
ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u8 seg_cnt,
const struct ice_rss_hash_cfg *cfg)
{
@@ -3851,11 +3851,11 @@ void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle)
* the VSI from that profile. If the flow profile has no VSIs it will
* be removed.
*/
-enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
+int ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
{
const enum ice_block blk = ICE_BLK_RSS;
struct ice_flow_prof *p, *t;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u16 vsig;
if (!ice_is_vsi_valid(hw, vsi_handle))
@@ -3957,7 +3957,7 @@ ice_rem_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
*
* Assumption: lock has already been acquired for RSS list
*/
-static enum ice_status
+static int
ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
{
enum ice_rss_cfg_hdr_type hdr_type;
@@ -4235,15 +4235,15 @@ ice_rss_update_raw_symm(struct ice_hw *hw,
*
* Assumption: lock has already been acquired for RSS list
*/
-static enum ice_status
+static int
ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg)
{
const enum ice_block blk = ICE_BLK_RSS;
struct ice_flow_prof *prof = NULL;
struct ice_flow_seg_info *segs;
- enum ice_status status;
u8 segs_cnt;
+ int status;
segs_cnt = (cfg->hdr_type == ICE_RSS_OUTER_HEADERS) ?
ICE_FLOW_SEG_SINGLE : ICE_FLOW_SEG_MAX;
@@ -4358,12 +4358,12 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle,
* the input fields to hash on, the flow type and use the VSI number to add
* a flow entry to the profile.
*/
-enum ice_status
+int
ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg)
{
struct ice_rss_hash_cfg local_cfg;
- enum ice_status status;
+ int status;
if (!ice_is_vsi_valid(hw, vsi_handle) ||
!cfg || cfg->hdr_type > ICE_RSS_ANY_HEADERS ||
@@ -4398,15 +4398,15 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
*
* Assumption: lock has already been acquired for RSS list
*/
-static enum ice_status
+static int
ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg)
{
const enum ice_block blk = ICE_BLK_RSS;
struct ice_flow_seg_info *segs;
struct ice_flow_prof *prof;
- enum ice_status status;
u8 segs_cnt;
+ int status;
segs_cnt = (cfg->hdr_type == ICE_RSS_OUTER_HEADERS) ?
ICE_FLOW_SEG_SINGLE : ICE_FLOW_SEG_MAX;
@@ -4457,12 +4457,12 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle,
* removed. Calls are made to underlying flow apis which will in
* turn build or update buffers for RSS XLT1 section.
*/
-enum ice_status
+int
ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg)
{
struct ice_rss_hash_cfg local_cfg;
- enum ice_status status;
+ int status;
if (!ice_is_vsi_valid(hw, vsi_handle) ||
!cfg || cfg->hdr_type > ICE_RSS_ANY_HEADERS ||
@@ -4493,9 +4493,9 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
* @hw: pointer to the hardware structure
* @vsi_handle: software VSI handle
*/
-enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
+int ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_rss_cfg *r;
if (!ice_is_vsi_valid(hw, vsi_handle))
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 57e8e1f1df..4f9206db1f 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -562,34 +562,34 @@ struct ice_flow_action {
u64
ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
struct ice_flow_seg_info *segs, u8 segs_cnt);
-enum ice_status
+int
ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,
u64 prof_id, struct ice_flow_seg_info *segs, u8 segs_cnt,
struct ice_flow_action *acts, u8 acts_cnt,
struct ice_flow_prof **prof);
-enum ice_status
+int
ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id);
-enum ice_status
+int
ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof *prof, u16 vsi_handle);
-enum ice_status
+int
ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,
u16 vsig);
-enum ice_status
+int
ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle,
u16 fdir_vsi_handle, struct ice_parser_profile *prof,
enum ice_block blk);
-enum ice_status
+int
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
u8 *hw_prof);
u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id);
-enum ice_status
+int
ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
u64 entry_id, u16 vsi, enum ice_flow_priority prio,
void *data, struct ice_flow_action *acts, u8 acts_cnt,
u64 *entry_h);
-enum ice_status
+int
ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_h);
void
ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
@@ -600,17 +600,17 @@ ice_flow_set_fld_prefix(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
void
ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len,
u16 val_loc, u16 mask_loc);
-enum ice_status ice_flow_rem_vsi_prof(struct ice_hw *hw, enum ice_block blk,
+int ice_flow_rem_vsi_prof(struct ice_hw *hw, enum ice_block blk,
u16 vsi_handle, u64 prof_id);
void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle);
-enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
-enum ice_status
+int ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
+int
ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds);
-enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
-enum ice_status
+int ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);
+int
ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg);
-enum ice_status
+int
ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,
const struct ice_rss_hash_cfg *cfg);
void ice_rss_update_raw_symm(struct ice_hw *hw,
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index e46aded12a..95d455f376 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -19,7 +19,7 @@
*
* Read the NVM using the admin queue commands (0x0701)
*/
-enum ice_status
+int
ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
void *data, bool last_command, bool read_shadow_ram,
struct ice_sq_cd *cd)
@@ -65,14 +65,14 @@ ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
* Returns a status code on failure. Note that the data pointer may be
* partially updated if some reads succeed before a failure.
*/
-enum ice_status
+int
ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
bool read_shadow_ram)
{
- enum ice_status status;
u32 inlen = *length;
u32 bytes_read = 0;
bool last_cmd;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -125,12 +125,12 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
*
* Reads one 16 bit word from the Shadow RAM using ice_read_flat_nvm.
*/
-static enum ice_status
+static int
ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data)
{
u32 bytes = sizeof(u16);
- enum ice_status status;
__le16 data_local;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -157,11 +157,11 @@ ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data)
* Reads 16 bit words (data buf) from the Shadow RAM. Ownership of the NVM is
* taken before reading the buffer and later released.
*/
-static enum ice_status
+static int
ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
{
u32 bytes = *words * 2, i;
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -187,8 +187,7 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
*
* This function will request NVM ownership.
*/
-enum ice_status
-ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
+int ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
{
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -299,11 +298,11 @@ static u32 ice_get_flash_bank_offset(struct ice_hw *hw, enum ice_bank_select ban
* hw->flash.banks data being setup by ice_determine_active_flash_banks()
* during initialization.
*/
-static enum ice_status
+static int
ice_read_flash_module(struct ice_hw *hw, enum ice_bank_select bank, u16 module,
u32 offset, u8 *data, u32 length)
{
- enum ice_status status;
+ int status;
u32 start;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -336,11 +335,11 @@ ice_read_flash_module(struct ice_hw *hw, enum ice_bank_select bank, u16 module,
* Read the specified word from the active NVM module. This includes the CSS
* header at the start of the NVM module.
*/
-static enum ice_status
+static int
ice_read_nvm_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)
{
- enum ice_status status;
__le16 data_local;
+ int status;
status = ice_read_flash_module(hw, bank, ICE_SR_1ST_NVM_BANK_PTR, offset * sizeof(u16),
(_FORCE_ u8 *)&data_local, sizeof(u16));
@@ -359,13 +358,13 @@ ice_read_nvm_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u1
* Read the CSS header length from the NVM CSS header and add the Authentication
* header size, and then convert to words.
*/
-static enum ice_status
+static int
ice_get_nvm_css_hdr_len(struct ice_hw *hw, enum ice_bank_select bank,
u32 *hdr_len)
{
u16 hdr_len_l, hdr_len_h;
- enum ice_status status;
u32 hdr_len_dword;
+ int status;
status = ice_read_nvm_module(hw, bank, ICE_NVM_CSS_HDR_LEN_L,
&hdr_len_l);
@@ -396,11 +395,11 @@ ice_get_nvm_css_hdr_len(struct ice_hw *hw, enum ice_bank_select bank,
* Read the specified word from the copy of the Shadow RAM found in the
* specified NVM module.
*/
-static enum ice_status
+static int
ice_read_nvm_sr_copy(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)
{
- enum ice_status status;
u32 hdr_len;
+ int status;
status = ice_get_nvm_css_hdr_len(hw, bank, &hdr_len);
if (status)
@@ -422,11 +421,11 @@ ice_read_nvm_sr_copy(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u
* Note that unlike the NVM module, the CSS data is stored at the end of the
* module instead of at the beginning.
*/
-static enum ice_status
+static int
ice_read_orom_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)
{
- enum ice_status status;
__le16 data_local;
+ int status;
status = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR, offset * sizeof(u16),
(_FORCE_ u8 *)&data_local, sizeof(u16));
@@ -444,9 +443,9 @@ ice_read_orom_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u
*
* Reads one 16 bit word from the Shadow RAM using the ice_read_sr_word_aq.
*/
-enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
+int ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
{
- enum ice_status status;
+ int status;
status = ice_acquire_nvm(hw, ICE_RES_READ);
if (!status) {
@@ -468,13 +467,13 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
* Area (PFA) and returns the TLV pointer and length. The caller can
* use these to read the variable length TLV value.
*/
-enum ice_status
+int
ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
u16 module_type)
{
- enum ice_status status;
u16 pfa_len, pfa_ptr;
u16 next_tlv;
+ int status;
status = ice_read_sr_word(hw, ICE_SR_PFA_PTR, &pfa_ptr);
if (status != ICE_SUCCESS) {
@@ -531,12 +530,12 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
*
* Reads the part number string from the NVM.
*/
-enum ice_status
+int
ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)
{
u16 pba_tlv, pba_tlv_len;
- enum ice_status status;
u16 pba_word, pba_size;
+ int status;
u16 i;
status = ice_get_pfa_module_tlv(hw, &pba_tlv, &pba_tlv_len,
@@ -591,10 +590,10 @@ ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)
* Read the security revision out of the CSS header of the active NVM module
* bank.
*/
-static enum ice_status ice_get_nvm_srev(struct ice_hw *hw, enum ice_bank_select bank, u32 *srev)
+static int ice_get_nvm_srev(struct ice_hw *hw, enum ice_bank_select bank, u32 *srev)
{
- enum ice_status status;
u16 srev_l, srev_h;
+ int status;
status = ice_read_nvm_module(hw, bank, ICE_NVM_CSS_SREV_L, &srev_l);
if (status)
@@ -618,11 +617,11 @@ static enum ice_status ice_get_nvm_srev(struct ice_hw *hw, enum ice_bank_select
* Read the NVM EETRACK ID and map version of the main NVM image bank, filling
* in the nvm info structure.
*/
-static enum ice_status
+static int
ice_get_nvm_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_nvm_info *nvm)
{
u16 eetrack_lo, eetrack_hi, ver;
- enum ice_status status;
+ int status;
status = ice_read_nvm_sr_copy(hw, bank, ICE_SR_NVM_DEV_STARTER_VER, &ver);
if (status) {
@@ -662,7 +661,7 @@ ice_get_nvm_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_nv
* inactive NVM bank. Used to access version data for a pending update that
* has not yet been activated.
*/
-enum ice_status ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info *nvm)
+int ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info *nvm)
{
return ice_get_nvm_ver_info(hw, ICE_INACTIVE_FLASH_BANK, nvm);
}
@@ -676,13 +675,13 @@ enum ice_status ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info
* Read the security revision out of the CSS header of the active OROM module
* bank.
*/
-static enum ice_status ice_get_orom_srev(struct ice_hw *hw, enum ice_bank_select bank, u32 *srev)
+static int ice_get_orom_srev(struct ice_hw *hw, enum ice_bank_select bank, u32 *srev)
{
u32 orom_size_word = hw->flash.banks.orom_size / 2;
- enum ice_status status;
u16 srev_l, srev_h;
u32 css_start;
u32 hdr_len;
+ int status;
status = ice_get_nvm_css_hdr_len(hw, bank, &hdr_len);
if (status)
@@ -720,12 +719,12 @@ static enum ice_status ice_get_orom_srev(struct ice_hw *hw, enum ice_bank_select
* Searches through the Option ROM flash contents to locate the CIVD data for
* the image.
*/
-static enum ice_status
+static int
ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank,
struct ice_orom_civd_info *civd)
{
u8 *orom_data;
- enum ice_status status;
+ int status;
u32 offset;
/* The CIVD section is located in the Option ROM aligned to 512 bytes.
@@ -797,12 +796,12 @@ ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank,
* Read Option ROM version and security revision from the Option ROM flash
* section.
*/
-static enum ice_status
+static int
ice_get_orom_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_orom_info *orom)
{
struct ice_orom_civd_info civd;
- enum ice_status status;
u32 combo_ver;
+ int status;
status = ice_get_orom_civd_data(hw, bank, &civd);
if (status) {
@@ -834,7 +833,7 @@ ice_get_orom_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_o
* section of flash. Used to access version data for a pending update that has
* not yet been activated.
*/
-enum ice_status ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom)
+int ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom)
{
return ice_get_orom_ver_info(hw, ICE_INACTIVE_FLASH_BANK, orom);
}
@@ -847,10 +846,10 @@ enum ice_status ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_inf
* the actual size is smaller. Use bisection to determine the accessible size
* of flash memory.
*/
-static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
+static int ice_discover_flash_size(struct ice_hw *hw)
{
u32 min_size = 0, max_size = ICE_AQC_NVM_MAX_OFFSET + 1;
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -904,10 +903,10 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
* sector size by using the highest bit. The reported pointer value will be in
* bytes, intended for flat NVM reads.
*/
-static enum ice_status
+static int
ice_read_sr_pointer(struct ice_hw *hw, u16 offset, u32 *pointer)
{
- enum ice_status status;
+ int status;
u16 value;
status = ice_read_sr_word(hw, offset, &value);
@@ -936,10 +935,10 @@ ice_read_sr_pointer(struct ice_hw *hw, u16 offset, u32 *pointer)
* Each area size word is specified in 4KB sector units. This function reports
* the size in bytes, intended for flat NVM reads.
*/
-static enum ice_status
+static int
ice_read_sr_area_size(struct ice_hw *hw, u16 offset, u32 *size)
{
- enum ice_status status;
+ int status;
u16 value;
status = ice_read_sr_word(hw, offset, &value);
@@ -962,12 +961,12 @@ ice_read_sr_area_size(struct ice_hw *hw, u16 offset, u32 *size)
* structure for later use in order to calculate the correct offset to read
* from the active module.
*/
-static enum ice_status
+static int
ice_determine_active_flash_banks(struct ice_hw *hw)
{
struct ice_bank_info *banks = &hw->flash.banks;
- enum ice_status status;
u16 ctrl_word;
+ int status;
status = ice_read_sr_word(hw, ICE_SR_NVM_CTRL_WORD, &ctrl_word);
if (status) {
@@ -1042,12 +1041,12 @@ ice_determine_active_flash_banks(struct ice_hw *hw)
* This function reads and populates NVM settings such as Shadow RAM size,
* max_timeout, and blank_nvm_mode
*/
-enum ice_status ice_init_nvm(struct ice_hw *hw)
+int ice_init_nvm(struct ice_hw *hw)
{
struct ice_flash_info *flash = &hw->flash;
- enum ice_status status;
u32 fla, gens_stat;
u8 sr_size;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -1107,10 +1106,10 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
* method. The buf read is preceded by the NVM ownership take
* and followed by the release.
*/
-enum ice_status
+int
ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
{
- enum ice_status status;
+ int status;
status = ice_acquire_nvm(hw, ICE_RES_READ);
if (!status) {
@@ -1127,11 +1126,11 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
*
* Verify NVM PFA checksum validity (0x0706)
*/
-enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw)
+int ice_nvm_validate_checksum(struct ice_hw *hw)
{
struct ice_aqc_nvm_checksum *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
status = ice_acquire_nvm(hw, ICE_RES_READ);
if (status)
@@ -1158,11 +1157,11 @@ enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw)
*
* Recalculate NVM PFA checksum (0x0706)
*/
-enum ice_status ice_nvm_recalculate_checksum(struct ice_hw *hw)
+int ice_nvm_recalculate_checksum(struct ice_hw *hw)
{
struct ice_aqc_nvm_checksum *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
status = ice_acquire_nvm(hw, ICE_RES_READ);
if (status)
@@ -1188,7 +1187,7 @@ enum ice_status ice_nvm_recalculate_checksum(struct ice_hw *hw)
* Fill in the data section of the NVM access request with a copy of the NVM
* features structure.
*/
-enum ice_status
+int
ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data)
{
@@ -1254,7 +1253,7 @@ u32 ice_nvm_access_get_adapter(struct ice_nvm_access_cmd *cmd)
* register offset. First validates that the module and flags are correct, and
* then ensures that the register offset is one of the accepted registers.
*/
-static enum ice_status
+static int
ice_validate_nvm_rw_reg(struct ice_nvm_access_cmd *cmd)
{
u32 module, flags, offset;
@@ -1307,11 +1306,11 @@ ice_validate_nvm_rw_reg(struct ice_nvm_access_cmd *cmd)
*
* Process an NVM access request to read a register.
*/
-enum ice_status
+int
ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data)
{
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -1340,11 +1339,11 @@ ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
*
* Process an NVM access request to write a register.
*/
-enum ice_status
+int
ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data)
{
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -1384,7 +1383,7 @@ ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
* For valid commands, perform the necessary function, copying the data into
* the provided data buffer.
*/
-enum ice_status
+int
ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data)
{
diff --git a/drivers/net/ice/base/ice_nvm.h b/drivers/net/ice/base/ice_nvm.h
index c3e61a301f..552e4659b7 100644
--- a/drivers/net/ice/base/ice_nvm.h
+++ b/drivers/net/ice/base/ice_nvm.h
@@ -70,41 +70,42 @@ union ice_nvm_access_data {
u32 ice_nvm_access_get_module(struct ice_nvm_access_cmd *cmd);
u32 ice_nvm_access_get_flags(struct ice_nvm_access_cmd *cmd);
u32 ice_nvm_access_get_adapter(struct ice_nvm_access_cmd *cmd);
-enum ice_status
+int
ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data);
-enum ice_status
+int
ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data);
-enum ice_status
+int
ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data);
-enum ice_status
+int
ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
union ice_nvm_access_data *data);
-enum ice_status
+
+int
ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access);
void ice_release_nvm(struct ice_hw *hw);
-enum ice_status
+int
ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
void *data, bool last_command, bool read_shadow_ram,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
bool read_shadow_ram);
-enum ice_status
+int
ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
u16 module_type);
-enum ice_status
+int
ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom);
-enum ice_status
+int
ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info *nvm);
-enum ice_status
+int
ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);
-enum ice_status ice_init_nvm(struct ice_hw *hw);
-enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
-enum ice_status
+int ice_init_nvm(struct ice_hw *hw);
+int ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
+int
ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data);
-enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
-enum ice_status ice_nvm_recalculate_checksum(struct ice_hw *hw);
+int ice_nvm_validate_checksum(struct ice_hw *hw);
+int ice_nvm_recalculate_checksum(struct ice_hw *hw);
#endif /* _ICE_NVM_H_ */
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index 79c97f7903..05fb297d78 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -161,10 +161,10 @@ void *ice_parser_create_table(struct ice_hw *hw, u32 sect_type,
* @hw: pointer to the hardware structure
* @psr: output parameter for a new parser instance be created
*/
-enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
+int ice_parser_create(struct ice_hw *hw, struct ice_parser **psr)
{
- enum ice_status status;
struct ice_parser *p;
+ int status;
p = (struct ice_parser *)ice_malloc(hw, sizeof(struct ice_parser));
if (!p)
@@ -309,7 +309,7 @@ void ice_parser_destroy(struct ice_parser *psr)
* @pkt_len: packet length
* @rslt: input/output parameter to save parser result.
*/
-enum ice_status ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,
+int ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,
int pkt_len, struct ice_parser_result *rslt)
{
ice_parser_rt_reset(&psr->rt);
@@ -367,7 +367,7 @@ void ice_parser_dvm_set(struct ice_parser *psr, bool on)
_bst_vm_set(psr, "BOOST_MAC_VLAN_SVM", !on);
}
-static enum ice_status
+static int
_tunnel_port_set(struct ice_parser *psr, const char *prefix, u16 udp_port,
bool on)
{
@@ -412,7 +412,7 @@ _tunnel_port_set(struct ice_parser *psr, const char *prefix, u16 udp_port,
* @udp_port: vxlan tunnel port in UDP header
* @on: true to turn on; false to turn off
*/
-enum ice_status ice_parser_vxlan_tunnel_set(struct ice_parser *psr,
+int ice_parser_vxlan_tunnel_set(struct ice_parser *psr,
u16 udp_port, bool on)
{
return _tunnel_port_set(psr, "TNL_VXLAN", udp_port, on);
@@ -424,7 +424,7 @@ enum ice_status ice_parser_vxlan_tunnel_set(struct ice_parser *psr,
* @udp_port: geneve tunnel port in UDP header
* @on: true to turn on; false to turn off
*/
-enum ice_status ice_parser_geneve_tunnel_set(struct ice_parser *psr,
+int ice_parser_geneve_tunnel_set(struct ice_parser *psr,
u16 udp_port, bool on)
{
return _tunnel_port_set(psr, "TNL_GENEVE", udp_port, on);
@@ -436,7 +436,7 @@ enum ice_status ice_parser_geneve_tunnel_set(struct ice_parser *psr,
* @udp_port: ecpri tunnel port in UDP header
* @on: true to turn on; false to turn off
*/
-enum ice_status ice_parser_ecpri_tunnel_set(struct ice_parser *psr,
+int ice_parser_ecpri_tunnel_set(struct ice_parser *psr,
u16 udp_port, bool on)
{
return _tunnel_port_set(psr, "TNL_UDP_ECPRI", udp_port, on);
@@ -485,7 +485,7 @@ static bool _nearest_proto_id(struct ice_parser_result *rslt, u16 offset,
* @prefix_match: match protocol stack exactly or only prefix
* @prof: input/output parameter to save the profile
*/
-enum ice_status ice_parser_profile_init(struct ice_parser_result *rslt,
+int ice_parser_profile_init(struct ice_parser_result *rslt,
const u8 *pkt_buf, const u8 *msk_buf,
int buf_len, enum ice_block blk,
bool prefix_match,
diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h
index 0f64584898..f2a72cc44b 100644
--- a/drivers/net/ice/base/ice_parser.h
+++ b/drivers/net/ice/base/ice_parser.h
@@ -55,14 +55,14 @@ struct ice_parser {
struct ice_parser_rt rt; /* parser runtime */
};
-enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
+int ice_parser_create(struct ice_hw *hw, struct ice_parser **psr);
void ice_parser_destroy(struct ice_parser *psr);
void ice_parser_dvm_set(struct ice_parser *psr, bool on);
-enum ice_status ice_parser_vxlan_tunnel_set(struct ice_parser *psr,
+int ice_parser_vxlan_tunnel_set(struct ice_parser *psr,
u16 udp_port, bool on);
-enum ice_status ice_parser_geneve_tunnel_set(struct ice_parser *psr,
+int ice_parser_geneve_tunnel_set(struct ice_parser *psr,
u16 udp_port, bool on);
-enum ice_status ice_parser_ecpri_tunnel_set(struct ice_parser *psr,
+int ice_parser_ecpri_tunnel_set(struct ice_parser *psr,
u16 udp_port, bool on);
struct ice_parser_proto_off {
@@ -83,7 +83,7 @@ struct ice_parser_result {
u16 flags_rss; /* 16 bits key builder flag for RSS */
};
-enum ice_status ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,
+int ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,
int pkt_len, struct ice_parser_result *rslt);
void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt);
@@ -103,7 +103,7 @@ struct ice_parser_profile {
ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);
};
-enum ice_status ice_parser_profile_init(struct ice_parser_result *rslt,
+int ice_parser_profile_init(struct ice_parser_result *rslt,
const u8 *pkt_buf, const u8 *msk_buf,
int buf_len, enum ice_block blk,
bool prefix_match,
diff --git a/drivers/net/ice/base/ice_parser_rt.c b/drivers/net/ice/base/ice_parser_rt.c
index 68c0f5d7fb..b10e10861c 100644
--- a/drivers/net/ice/base/ice_parser_rt.c
+++ b/drivers/net/ice/base/ice_parser_rt.c
@@ -770,10 +770,10 @@ static void _result_resolve(struct ice_parser_rt *rt,
* @rt: pointer to the parser runtime
* @rslt: input/output parameter to save parser result
*/
-enum ice_status ice_parser_rt_execute(struct ice_parser_rt *rt,
+int ice_parser_rt_execute(struct ice_parser_rt *rt,
struct ice_parser_result *rslt)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_pg_nm_cam_item *pg_nm_cam;
struct ice_parser *psr = rt->psr;
struct ice_pg_cam_item *pg_cam;
diff --git a/drivers/net/ice/base/ice_parser_rt.h b/drivers/net/ice/base/ice_parser_rt.h
index de851643b4..f95068d07d 100644
--- a/drivers/net/ice/base/ice_parser_rt.h
+++ b/drivers/net/ice/base/ice_parser_rt.h
@@ -48,6 +48,6 @@ void ice_parser_rt_pktbuf_set(struct ice_parser_rt *rt, const u8 *pkt_buf,
int pkt_len);
struct ice_parser_result;
-enum ice_status ice_parser_rt_execute(struct ice_parser_rt *rt,
+int ice_parser_rt_execute(struct ice_parser_rt *rt,
struct ice_parser_result *rslt);
#endif /* _ICE_PARSER_RT_H_ */
diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 548ef5e820..3b842475e4 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -110,11 +110,11 @@ u64 ice_ptp_read_src_incval(struct ice_hw *hw)
* Read the contents of a register of the Clock Generation Unit. Only
* applicable to E822 devices.
*/
-static enum ice_status
+static int
ice_read_cgu_reg_e822(struct ice_hw *hw, u16 addr, u32 *val)
{
struct ice_sbq_msg_input cgu_msg;
- enum ice_status status;
+ int status;
cgu_msg.opcode = ice_sbq_msg_rd;
cgu_msg.dest_dev = cgu;
@@ -142,11 +142,11 @@ ice_read_cgu_reg_e822(struct ice_hw *hw, u16 addr, u32 *val)
* Write the specified value to a register of the Clock Generation Unit. Only
* applicable to E822 devices.
*/
-static enum ice_status
+static int
ice_write_cgu_reg_e822(struct ice_hw *hw, u16 addr, u32 val)
{
struct ice_sbq_msg_input cgu_msg;
- enum ice_status status;
+ int status;
cgu_msg.opcode = ice_sbq_msg_wr;
cgu_msg.dest_dev = cgu;
@@ -217,7 +217,7 @@ static const char *ice_clk_src_str(u8 clk_src)
* Configure the Clock Generation Unit with the desired clock frequency and
* time reference, enabling the PLL which drives the PTP hardware clock.
*/
-enum ice_status
+int
ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq,
enum ice_clk_src clk_src)
{
@@ -226,7 +226,7 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq,
union nac_cgu_dword22 dw22;
union nac_cgu_dword24 dw24;
union nac_cgu_dword9 dw9;
- enum ice_status status;
+ int status;
if (clk_freq >= NUM_ICE_TIME_REF_FREQ) {
ice_warn(hw, "Invalid TIME_REF frequency %u\n", clk_freq);
@@ -350,11 +350,11 @@ ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq,
*
* Initialize the Clock Generation Unit of the E822 device.
*/
-static enum ice_status ice_init_cgu_e822(struct ice_hw *hw)
+static int ice_init_cgu_e822(struct ice_hw *hw)
{
struct ice_ts_func_info *ts_info = &hw->func_caps.ts_func_info;
union tspll_cntr_bist_settings cntr_bist;
- enum ice_status status;
+ int status;
status = ice_read_cgu_reg_e822(hw, TSPLL_CNTR_BIST_SETTINGS,
&cntr_bist.val);
@@ -464,12 +464,12 @@ static const u32 eth56g_port_base[ICE_NUM_PHY_PORTS] = {
* @val: Value to write
* @lock_sbq: true to lock the sideband queue
*/
-static enum ice_status
+static int
ice_write_phy_eth56g_raw_lp(struct ice_hw *hw, u32 reg_addr, u32 val,
bool lock_sbq)
{
struct ice_sbq_msg_input phy_msg;
- enum ice_status status;
+ int status;
phy_msg.opcode = ice_sbq_msg_wr;
@@ -495,12 +495,12 @@ ice_write_phy_eth56g_raw_lp(struct ice_hw *hw, u32 reg_addr, u32 val,
* @val: Pointer to the value to read (out param)
* @lock_sbq: true to lock the sideband queue
*/
-static enum ice_status
+static int
ice_read_phy_eth56g_raw_lp(struct ice_hw *hw, u32 reg_addr, u32 *val,
bool lock_sbq)
{
struct ice_sbq_msg_input phy_msg;
- enum ice_status status;
+ int status;
phy_msg.opcode = ice_sbq_msg_rd;
@@ -526,7 +526,7 @@ ice_read_phy_eth56g_raw_lp(struct ice_hw *hw, u32 reg_addr, u32 *val,
* @offset: Offset from PHY port register base
* @address: The result address
*/
-static enum ice_status
+static int
ice_phy_port_reg_address_eth56g(u8 port, u16 offset, u32 *address)
{
u8 phy, lane;
@@ -549,7 +549,7 @@ ice_phy_port_reg_address_eth56g(u8 port, u16 offset, u32 *address)
* @offset: Offset from PHY port register base
* @address: The result address
*/
-static enum ice_status
+static int
ice_phy_port_mem_address_eth56g(u8 port, u16 offset, u32 *address)
{
u8 phy, lane;
@@ -574,11 +574,11 @@ ice_phy_port_mem_address_eth56g(u8 port, u16 offset, u32 *address)
* @val: Value to write
* @lock_sbq: true to lock the sideband queue
*/
-static enum ice_status
+static int
ice_write_phy_reg_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset, u32 val,
bool lock_sbq)
{
- enum ice_status status;
+ int status;
u32 reg_addr;
status = ice_phy_port_reg_address_eth56g(port, offset, ®_addr);
@@ -595,7 +595,7 @@ ice_write_phy_reg_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset, u32 val,
* @offset: Offset from PHY port register base
* @val: Value to write
*/
-enum ice_status
+int
ice_write_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 val)
{
return ice_write_phy_reg_eth56g_lp(hw, port, offset, val, true);
@@ -610,11 +610,11 @@ ice_write_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 val)
* @val: Pointer to the value to read (out param)
* @lock_sbq: true to lock the sideband queue
*/
-static enum ice_status
+static int
ice_read_phy_reg_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset, u32 *val,
bool lock_sbq)
{
- enum ice_status status;
+ int status;
u32 reg_addr;
status = ice_phy_port_reg_address_eth56g(port, offset, ®_addr);
@@ -631,7 +631,7 @@ ice_read_phy_reg_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset, u32 *val,
* @offset: Offset from PHY port register base
* @val: Pointer to the value to read (out param)
*/
-enum ice_status
+int
ice_read_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 *val)
{
return ice_read_phy_reg_eth56g_lp(hw, port, offset, val, true);
@@ -646,11 +646,11 @@ ice_read_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 *val)
* @val: Pointer to the value to read (out param)
* @lock_sbq: true to lock the sideband queue
*/
-static enum ice_status
+static int
ice_phy_port_mem_read_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset,
u32 *val, bool lock_sbq)
{
- enum ice_status status;
+ int status;
u32 mem_addr;
status = ice_phy_port_mem_address_eth56g(port, offset, &mem_addr);
@@ -668,7 +668,7 @@ ice_phy_port_mem_read_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset,
* @offset: Offset from PHY port register base
* @val: Pointer to the value to read (out param)
*/
-static enum ice_status
+static int
ice_phy_port_mem_read_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 *val)
{
return ice_phy_port_mem_read_eth56g_lp(hw, port, offset, val, true);
@@ -683,11 +683,11 @@ ice_phy_port_mem_read_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 *val)
* @val: Pointer to the value to read (out param)
* @lock_sbq: true to lock the sideband queue
*/
-static enum ice_status
+static int
ice_phy_port_mem_write_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset,
u32 val, bool lock_sbq)
{
- enum ice_status status;
+ int status;
u32 mem_addr;
status = ice_phy_port_mem_address_eth56g(port, offset, &mem_addr);
@@ -705,7 +705,7 @@ ice_phy_port_mem_write_eth56g_lp(struct ice_hw *hw, u8 port, u16 offset,
* @offset: Offset from PHY port register base
* @val: Pointer to the value to read (out param)
*/
-static enum ice_status
+static int
ice_phy_port_mem_write_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 val)
{
return ice_phy_port_mem_write_eth56g_lp(hw, port, offset, val, true);
@@ -763,11 +763,11 @@ static bool ice_is_40b_phy_reg_eth56g(u16 low_addr)
* This function checks that the caller has specified a known 40 bit register
* offset
*/
-static enum ice_status
+static int
ice_read_40b_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val)
{
u16 high_addr = low_addr + sizeof(u32);
- enum ice_status status;
+ int status;
u32 lo, hi;
if (!ice_is_40b_phy_reg_eth56g(low_addr))
@@ -804,11 +804,11 @@ ice_read_40b_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val)
* This function checks that the caller has specified a known 64 bit register
* offset
*/
-static enum ice_status
+static int
ice_read_64b_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val)
{
u16 high_addr = low_addr + sizeof(u32);
- enum ice_status status;
+ int status;
u32 lo, hi;
if (!ice_is_64b_phy_reg_eth56g(low_addr))
@@ -845,11 +845,11 @@ ice_read_64b_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val)
* This function checks that the caller has specified a known 40 bit register
* offset
*/
-static enum ice_status
+static int
ice_write_40b_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 low_addr, u64 val)
{
u16 high_addr = low_addr + sizeof(u32);
- enum ice_status status;
+ int status;
u32 lo, hi;
if (!ice_is_40b_phy_reg_eth56g(low_addr))
@@ -886,11 +886,11 @@ ice_write_40b_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 low_addr, u64 val)
* This function checks that the caller has specified a known 64 bit register
* offset
*/
-static enum ice_status
+static int
ice_write_64b_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 low_addr, u64 val)
{
u16 high_addr = low_addr + sizeof(u32);
- enum ice_status status;
+ int status;
u32 lo, hi;
if (!ice_is_64b_phy_reg_eth56g(low_addr))
@@ -926,10 +926,10 @@ ice_write_64b_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 low_addr, u64 val)
* Read a 40bit timestamp value out of the two associated entries in the
* port memory block of the internal PHYs of the 56G devices.
*/
-static enum ice_status
+static int
ice_read_phy_tstamp_eth56g(struct ice_hw *hw, u8 port, u8 idx, u64 *tstamp)
{
- enum ice_status status;
+ int status;
u16 lo_addr, hi_addr;
u32 lo, hi;
@@ -968,10 +968,10 @@ ice_read_phy_tstamp_eth56g(struct ice_hw *hw, u8 port, u8 idx, u64 *tstamp)
* Clear a timestamp, resetting its valid bit, in the PHY port memory of
* internal PHYs of the 56G devices.
*/
-static enum ice_status
+static int
ice_clear_phy_tstamp_eth56g(struct ice_hw *hw, u8 port, u8 idx)
{
- enum ice_status status;
+ int status;
u16 lo_addr;
lo_addr = (u16)PHY_TSTAMP_L(idx);
@@ -994,10 +994,10 @@ ice_clear_phy_tstamp_eth56g(struct ice_hw *hw, u8 port, u8 idx)
*
* Write a new initial time value into registers of a specific PHY port.
*/
-static enum ice_status
+static int
ice_ptp_prep_port_phy_time_eth56g(struct ice_hw *hw, u8 port, u64 phy_time)
{
- enum ice_status status;
+ int status;
/* Tx case */
status = ice_write_64b_phy_reg_eth56g(hw, port,
@@ -1022,10 +1022,10 @@ ice_ptp_prep_port_phy_time_eth56g(struct ice_hw *hw, u8 port, u64 phy_time)
* command. The time value is the upper 32 bits of the PHY timer, usually in
* units of nominal nanoseconds.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_time_eth56g(struct ice_hw *hw, u32 time)
{
- enum ice_status status;
+ int status;
u64 phy_time;
u8 port;
@@ -1067,11 +1067,11 @@ ice_ptp_prep_phy_time_eth56g(struct ice_hw *hw, u32 time)
*
* Negative adjustments are supported using 2s complement arithmetic.
*/
-enum ice_status
+int
ice_ptp_prep_port_adj_eth56g(struct ice_hw *hw, u8 port, s64 time,
bool lock_sbq)
{
- enum ice_status status;
+ int status;
u32 l_time, u_time;
l_time = ICE_LO_DWORD(time);
@@ -1122,10 +1122,10 @@ ice_ptp_prep_port_adj_eth56g(struct ice_hw *hw, u8 port, s64 time,
* Tx and Rx port registers. The actual adjustment is completed by issuing an
* ICE_PTP_ADJ_TIME or ICE_PTP_ADJ_TIME_AT_TIME sync command.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_adj_eth56g(struct ice_hw *hw, s32 adj, bool lock_sbq)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
s64 cycles;
u8 port;
@@ -1157,10 +1157,10 @@ ice_ptp_prep_phy_adj_eth56g(struct ice_hw *hw, s32 adj, bool lock_sbq)
* port's TIMETUS registers. The new increment value will be updated after
* issuing an ICE_PTP_INIT_INCVAL command.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_incval_eth56g(struct ice_hw *hw, u64 incval)
{
- enum ice_status status;
+ int status;
u8 port;
for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) {
@@ -1187,10 +1187,10 @@ ice_ptp_prep_phy_incval_eth56g(struct ice_hw *hw, u64 incval)
*
* Read the time_clk_cyc increment value for a given PHY port.
*/
-enum ice_status
+int
ice_ptp_read_phy_incval_eth56g(struct ice_hw *hw, u8 port, u64 *incval)
{
- enum ice_status status;
+ int status;
status = ice_read_40b_phy_reg_eth56g(hw, port, PHY_REG_TIMETUS_L,
incval);
@@ -1219,10 +1219,10 @@ ice_ptp_read_phy_incval_eth56g(struct ice_hw *hw, u8 port, u64 *incval)
* Note that a target time adjustment is not currently supported on E810
* devices.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_adj_target_eth56g(struct ice_hw *hw, u32 target_time)
{
- enum ice_status status;
+ int status;
u8 port;
for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) {
@@ -1276,11 +1276,11 @@ ice_ptp_prep_phy_adj_target_eth56g(struct ice_hw *hw, u32 target_time)
*
* Read the port's Tx and Rx local time capture values.
*/
-enum ice_status
+int
ice_ptp_read_port_capture_eth56g(struct ice_hw *hw, u8 port, u64 *tx_ts,
u64 *rx_ts)
{
- enum ice_status status;
+ int status;
/* Tx case */
status = ice_read_64b_phy_reg_eth56g(hw, port, PHY_REG_TX_CAPTURE_L,
@@ -1318,11 +1318,11 @@ ice_ptp_read_port_capture_eth56g(struct ice_hw *hw, u8 port, u64 *tx_ts,
*
* Prepare the requested port for an upcoming timer sync command.
*/
-enum ice_status
+int
ice_ptp_one_port_cmd_eth56g(struct ice_hw *hw, u8 port,
enum ice_ptp_tmr_cmd cmd, bool lock_sbq)
{
- enum ice_status status;
+ int status;
u32 cmd_val, val;
u8 tmr_idx;
@@ -1405,11 +1405,11 @@ ice_ptp_one_port_cmd_eth56g(struct ice_hw *hw, u8 port,
* Prepare all ports connected to this device for an upcoming timer sync
* command.
*/
-static enum ice_status
+static int
ice_ptp_port_cmd_eth56g(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
bool lock_sbq)
{
- enum ice_status status;
+ int status;
u8 port;
for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) {
@@ -1452,10 +1452,10 @@ ice_calc_fixed_tx_offset_eth56g(struct ice_hw *hw,
* the TUs per second up front. This avoids overflow while allowing
* calculation of the adjustment using integer arithmetic.
*/
-enum ice_status ice_phy_cfg_tx_offset_eth56g(struct ice_hw *hw, u8 port)
+int ice_phy_cfg_tx_offset_eth56g(struct ice_hw *hw, u8 port)
{
enum ice_ptp_link_spd link_spd = ICE_PTP_LNK_SPD_10G;
- enum ice_status status;
+ int status;
u64 total_offset;
total_offset = ice_calc_fixed_tx_offset_eth56g(hw, link_spd);
@@ -1507,9 +1507,9 @@ ice_calc_fixed_rx_offset_eth56g(struct ice_hw *hw,
* the TUs per second up front. This avoids overflow while allowing
* calculation of the adjustment using integer arithmetic.
*/
-enum ice_status ice_phy_cfg_rx_offset_eth56g(struct ice_hw *hw, u8 port)
+int ice_phy_cfg_rx_offset_eth56g(struct ice_hw *hw, u8 port)
{
- enum ice_status status;
+ int status;
u64 total_offset;
total_offset = ice_calc_fixed_rx_offset_eth56g(hw, 0);
@@ -1537,11 +1537,11 @@ enum ice_status ice_phy_cfg_rx_offset_eth56g(struct ice_hw *hw, u8 port)
* Issue a ICE_PTP_READ_TIME timer command to simultaneously capture the PHY
* and PHC timer values.
*/
-static enum ice_status
+static int
ice_read_phy_and_phc_time_eth56g(struct ice_hw *hw, u8 port, u64 *phy_time,
u64 *phc_time)
{
- enum ice_status status;
+ int status;
u64 tx_time, rx_time;
u32 zo, lo;
u8 tmr_idx;
@@ -1596,10 +1596,10 @@ ice_read_phy_and_phc_time_eth56g(struct ice_hw *hw, u8 port, u64 *phy_time,
* to the PHY timer in order to ensure it reads the same value as the
* primary PHC timer.
*/
-static enum ice_status ice_sync_phy_timer_eth56g(struct ice_hw *hw, u8 port)
+static int ice_sync_phy_timer_eth56g(struct ice_hw *hw, u8 port)
{
u64 phc_time, phy_time, difference;
- enum ice_status status;
+ int status;
if (!ice_ptp_lock(hw)) {
ice_debug(hw, ICE_DBG_PTP, "Failed to acquire PTP semaphore\n");
@@ -1663,10 +1663,10 @@ static enum ice_status ice_sync_phy_timer_eth56g(struct ice_hw *hw, u8 port)
* re-calibrate Tx and Rx timestamping offsets whenever the clock time is
* initialized or when link speed changes.
*/
-enum ice_status
+int
ice_stop_phy_timer_eth56g(struct ice_hw *hw, u8 port, bool soft_reset)
{
- enum ice_status status;
+ int status;
status = ice_write_phy_reg_eth56g(hw, port, PHY_REG_TX_OFFSET_READY, 0);
if (status)
@@ -1692,10 +1692,10 @@ ice_stop_phy_timer_eth56g(struct ice_hw *hw, u8 port, bool soft_reset)
* initialized or when link speed changes.
*
*/
-enum ice_status
+int
ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port, bool bypass)
{
- enum ice_status status;
+ int status;
u32 lo, hi;
u64 incval;
u8 tmr_idx;
@@ -1749,9 +1749,9 @@ ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port, bool bypass)
*
* Perform PHC initialization steps specific to E822 devices.
*/
-static enum ice_status ice_ptp_init_phc_eth56g(struct ice_hw *hw)
+static int ice_ptp_init_phc_eth56g(struct ice_hw *hw)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u32 regval;
/* Enable reading switch and PHY registers over the sideband queue */
@@ -1774,10 +1774,10 @@ static enum ice_status ice_ptp_init_phc_eth56g(struct ice_hw *hw)
* @hw: pointer to the HW struct
* @ts_status: the timestamp mask pointer
*/
-enum ice_status
+int
ice_ptp_read_tx_hwtstamp_status_eth56g(struct ice_hw *hw, u32 *ts_status)
{
- enum ice_status status;
+ int status;
status = ice_read_phy_eth56g_raw_lp(hw, PHY_PTP_INT_STATUS, ts_status,
true);
@@ -1794,10 +1794,10 @@ ice_ptp_read_tx_hwtstamp_status_eth56g(struct ice_hw *hw, u32 *ts_status)
* mask. Returns the mask of ports where TX timestamps are available
* @hw: pointer to the HW struct
*/
-enum ice_status
+int
ice_ptp_init_phy_cfg(struct ice_hw *hw)
{
- enum ice_status status;
+ int status;
u32 phy_rev;
status = ice_read_phy_eth56g_raw_lp(hw, PHY_REG_REVISION, &phy_rev,
@@ -1963,12 +1963,12 @@ static bool ice_is_40b_phy_reg_e822(u16 low_addr, u16 *high_addr)
*
* Read a PHY register for the given port over the device sideband queue.
*/
-static enum ice_status
+static int
ice_read_phy_reg_e822_lp(struct ice_hw *hw, u8 port, u16 offset, u32 *val,
bool lock_sbq)
{
struct ice_sbq_msg_input msg = {0};
- enum ice_status status;
+ int status;
ice_fill_phy_msg_e822(&msg, port, offset);
msg.opcode = ice_sbq_msg_rd;
@@ -1985,7 +1985,7 @@ ice_read_phy_reg_e822_lp(struct ice_hw *hw, u8 port, u16 offset, u32 *val,
return ICE_SUCCESS;
}
-enum ice_status
+int
ice_read_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 *val)
{
return ice_read_phy_reg_e822_lp(hw, port, offset, val, true);
@@ -2003,10 +2003,10 @@ ice_read_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 *val)
* The high offset is looked up. This function only operates on registers
* known to be split into a lower 8 bit chunk and an upper 32 bit chunk.
*/
-static enum ice_status
+static int
ice_read_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val)
{
- enum ice_status status;
+ int status;
u32 low, high;
u16 high_addr;
@@ -2050,10 +2050,10 @@ ice_read_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val)
* The high offset is looked up. This function only operates on registers
* known to be two parts of a 64bit value.
*/
-static enum ice_status
+static int
ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val)
{
- enum ice_status status;
+ int status;
u32 low, high;
u16 high_addr;
@@ -2095,12 +2095,12 @@ ice_read_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 *val)
*
* Write a PHY register for the given port over the device sideband queue.
*/
-static enum ice_status
+static int
ice_write_phy_reg_e822_lp(struct ice_hw *hw, u8 port, u16 offset, u32 val,
bool lock_sbq)
{
struct ice_sbq_msg_input msg = {0};
- enum ice_status status;
+ int status;
ice_fill_phy_msg_e822(&msg, port, offset);
msg.opcode = ice_sbq_msg_wr;
@@ -2116,7 +2116,7 @@ ice_write_phy_reg_e822_lp(struct ice_hw *hw, u8 port, u16 offset, u32 val,
return ICE_SUCCESS;
}
-enum ice_status
+int
ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val)
{
return ice_write_phy_reg_e822_lp(hw, port, offset, val, true);
@@ -2132,10 +2132,10 @@ ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val)
* Write the provided 40b value to the two associated registers by splitting
* it up into two chunks, the lower 8 bits and the upper 32 bits.
*/
-static enum ice_status
+static int
ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val)
{
- enum ice_status status;
+ int status;
u32 low, high;
u16 high_addr;
@@ -2180,10 +2180,10 @@ ice_write_40b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val)
* up. This function only operates on registers known to be two parts of
* a 64bit value.
*/
-static enum ice_status
+static int
ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val)
{
- enum ice_status status;
+ int status;
u32 low, high;
u16 high_addr;
@@ -2225,7 +2225,7 @@ ice_write_64b_phy_reg_e822(struct ice_hw *hw, u8 port, u16 low_addr, u64 val)
* Fill a message buffer for accessing a register in a quad shared between
* multiple PHYs.
*/
-static enum ice_status
+static int
ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset)
{
u32 addr;
@@ -2257,12 +2257,12 @@ ice_fill_quad_msg_e822(struct ice_sbq_msg_input *msg, u8 quad, u16 offset)
* Read a quad register over the device sideband queue. Quad registers are
* shared between multiple PHYs.
*/
-static enum ice_status
+static int
ice_read_quad_reg_e822_lp(struct ice_hw *hw, u8 quad, u16 offset, u32 *val,
bool lock_sbq)
{
struct ice_sbq_msg_input msg = {0};
- enum ice_status status;
+ int status;
status = ice_fill_quad_msg_e822(&msg, quad, offset);
if (status)
@@ -2281,7 +2281,7 @@ ice_read_quad_reg_e822_lp(struct ice_hw *hw, u8 quad, u16 offset, u32 *val,
return status;
}
-enum ice_status
+int
ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val)
{
return ice_read_quad_reg_e822_lp(hw, quad, offset, val, true);
@@ -2298,12 +2298,12 @@ ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val)
* Write a quad register over the device sideband queue. Quad registers are
* shared between multiple PHYs.
*/
-static enum ice_status
+static int
ice_write_quad_reg_e822_lp(struct ice_hw *hw, u8 quad, u16 offset, u32 val,
bool lock_sbq)
{
struct ice_sbq_msg_input msg = {0};
- enum ice_status status;
+ int status;
status = ice_fill_quad_msg_e822(&msg, quad, offset);
if (status)
@@ -2321,7 +2321,7 @@ ice_write_quad_reg_e822_lp(struct ice_hw *hw, u8 quad, u16 offset, u32 val,
return status;
}
-enum ice_status
+int
ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val)
{
return ice_write_quad_reg_e822_lp(hw, quad, offset, val, true);
@@ -2338,10 +2338,10 @@ ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val)
* quad memory block that is shared between the internal PHYs of the E822
* family of devices.
*/
-static enum ice_status
+static int
ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp)
{
- enum ice_status status;
+ int status;
u16 lo_addr, hi_addr;
u32 lo, hi;
@@ -2380,10 +2380,10 @@ ice_read_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp)
* Clear a timestamp, resetting its valid bit, from the PHY quad block that is
* shared between the internal PHYs on the E822 devices.
*/
-static enum ice_status
+static int
ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx)
{
- enum ice_status status;
+ int status;
u16 lo_addr, hi_addr;
lo_addr = (u16)TS_L(Q_REG_TX_MEMORY_BANK_START, idx);
@@ -2412,12 +2412,12 @@ ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx)
*
* Set the window length used for the vernier port calibration process.
*/
-enum ice_status ice_ptp_set_vernier_wl(struct ice_hw *hw)
+int ice_ptp_set_vernier_wl(struct ice_hw *hw)
{
u8 port;
for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) {
- enum ice_status status;
+ int status;
status = ice_write_phy_reg_e822_lp(hw, port, P_REG_WL,
PTP_VERNIER_WL, true);
@@ -2437,9 +2437,9 @@ enum ice_status ice_ptp_set_vernier_wl(struct ice_hw *hw)
*
* Perform PHC initialization steps specific to E822 devices.
*/
-static enum ice_status ice_ptp_init_phc_e822(struct ice_hw *hw)
+static int ice_ptp_init_phc_e822(struct ice_hw *hw)
{
- enum ice_status status;
+ int status;
u32 regval;
/* Enable reading switch and PHY registers over the sideband queue */
@@ -2469,10 +2469,10 @@ static enum ice_status ice_ptp_init_phc_e822(struct ice_hw *hw)
* command. The time value is the upper 32 bits of the PHY timer, usually in
* units of nominal nanoseconds.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time)
{
- enum ice_status status;
+ int status;
u64 phy_time;
u8 port;
@@ -2524,11 +2524,11 @@ ice_ptp_prep_phy_time_e822(struct ice_hw *hw, u32 time)
*
* Negative adjustments are supported using 2s complement arithmetic.
*/
-enum ice_status
+int
ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time,
bool lock_sbq)
{
- enum ice_status status;
+ int status;
u32 l_time, u_time;
l_time = ICE_LO_DWORD(time);
@@ -2575,7 +2575,7 @@ ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time,
* Tx and Rx port registers. The actual adjustment is completed by issuing an
* ICE_PTP_ADJ_TIME or ICE_PTP_ADJ_TIME_AT_TIME sync command.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj, bool lock_sbq)
{
s64 cycles;
@@ -2591,7 +2591,7 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj, bool lock_sbq)
cycles = -(((s64)-adj) << 32);
for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) {
- enum ice_status status;
+ int status;
status = ice_ptp_prep_port_adj_e822(hw, port, cycles,
lock_sbq);
@@ -2611,10 +2611,10 @@ ice_ptp_prep_phy_adj_e822(struct ice_hw *hw, s32 adj, bool lock_sbq)
* port's TIMETUS registers. The new increment value will be updated after
* issuing an ICE_PTP_INIT_INCVAL command.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_incval_e822(struct ice_hw *hw, u64 incval)
{
- enum ice_status status;
+ int status;
u8 port;
for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) {
@@ -2641,10 +2641,10 @@ ice_ptp_prep_phy_incval_e822(struct ice_hw *hw, u64 incval)
*
* Read the time_clk_cyc increment value for a given PHY port.
*/
-enum ice_status
+int
ice_ptp_read_phy_incval_e822(struct ice_hw *hw, u8 port, u64 *incval)
{
- enum ice_status status;
+ int status;
status = ice_read_40b_phy_reg_e822(hw, port, P_REG_TIMETUS_L, incval);
if (status) {
@@ -2672,10 +2672,10 @@ ice_ptp_read_phy_incval_e822(struct ice_hw *hw, u8 port, u64 *incval)
* Note that a target time adjustment is not currently supported on E810
* devices.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_adj_target_e822(struct ice_hw *hw, u32 target_time)
{
- enum ice_status status;
+ int status;
u8 port;
for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) {
@@ -2729,11 +2729,11 @@ ice_ptp_prep_phy_adj_target_e822(struct ice_hw *hw, u32 target_time)
*
* Note this has no equivalent for the E810 devices.
*/
-enum ice_status
+int
ice_ptp_read_port_capture_e822(struct ice_hw *hw, u8 port, u64 *tx_ts,
u64 *rx_ts)
{
- enum ice_status status;
+ int status;
/* Tx case */
status = ice_read_64b_phy_reg_e822(hw, port, P_REG_TX_CAPTURE_L, tx_ts);
@@ -2772,11 +2772,11 @@ ice_ptp_read_port_capture_e822(struct ice_hw *hw, u8 port, u64 *tx_ts,
* Note there is no equivalent of this operation on E810, as that device
* always handles all external PHYs internally.
*/
-enum ice_status
+int
ice_ptp_one_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd,
bool lock_sbq)
{
- enum ice_status status;
+ int status;
u32 cmd_val, val;
u8 tmr_idx;
@@ -2859,14 +2859,14 @@ ice_ptp_one_port_cmd_e822(struct ice_hw *hw, u8 port, enum ice_ptp_tmr_cmd cmd,
* Prepare all ports connected to this device for an upcoming timer sync
* command.
*/
-static enum ice_status
+static int
ice_ptp_port_cmd_e822(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
bool lock_sbq)
{
u8 port;
for (port = 0; port < ICE_NUM_EXTERNAL_PORTS; port++) {
- enum ice_status status;
+ int status;
status = ice_ptp_one_port_cmd_e822(hw, port, cmd, lock_sbq);
if (status)
@@ -2893,14 +2893,14 @@ ice_ptp_port_cmd_e822(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
* Read the serdes data for the PHY port and extract the link speed and FEC
* algorithm.
*/
-enum ice_status
+int
ice_phy_get_speed_and_fec_e822(struct ice_hw *hw, u8 port,
enum ice_ptp_link_spd *link_out,
enum ice_ptp_fec_mode *fec_out)
{
enum ice_ptp_link_spd link;
enum ice_ptp_fec_mode fec;
- enum ice_status status;
+ int status;
u32 serdes;
status = ice_read_phy_reg_e822(hw, port, P_REG_LINK_SPEED, &serdes);
@@ -2967,7 +2967,7 @@ ice_phy_get_speed_and_fec_e822(struct ice_hw *hw, u8 port,
void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port)
{
enum ice_ptp_link_spd link_spd;
- enum ice_status status;
+ int status;
u32 val;
u8 quad;
@@ -3046,10 +3046,10 @@ void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port)
* a divide by 390,625,000. This does lose some precision, but avoids
* miscalculation due to arithmetic overflow.
*/
-static enum ice_status ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port)
+static int ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port)
{
u64 cur_freq, clk_incval, tu_per_sec, uix;
- enum ice_status status;
+ int status;
cur_freq = ice_e822_pll_freq(ice_e822_time_ref(hw));
clk_incval = ice_ptp_read_src_incval(hw);
@@ -3128,12 +3128,12 @@ static enum ice_status ice_phy_cfg_uix_e822(struct ice_hw *hw, u8 port)
* frequency is ~29 bits, so multiplying them together should fit within the
* 64 bit arithmetic.
*/
-static enum ice_status ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port)
+static int ice_phy_cfg_parpcs_e822(struct ice_hw *hw, u8 port)
{
u64 cur_freq, clk_incval, tu_per_sec, phy_tus;
enum ice_ptp_link_spd link_spd;
enum ice_ptp_fec_mode fec_mode;
- enum ice_status status;
+ int status;
status = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode);
if (status)
@@ -3296,11 +3296,11 @@ ice_calc_fixed_tx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd)
* the TUs per second up front. This avoids overflow while allowing
* calculation of the adjustment using integer arithmetic.
*/
-enum ice_status ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port)
+int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port)
{
enum ice_ptp_link_spd link_spd;
enum ice_ptp_fec_mode fec_mode;
- enum ice_status status;
+ int status;
u64 total_offset, val;
status = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode);
@@ -3366,12 +3366,12 @@ enum ice_status ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port)
* Calculate and program the fixed Tx offset, and indicate that the offset is
* ready. This can be used when operating in bypass mode.
*/
-static enum ice_status
+static int
ice_phy_cfg_fixed_tx_offset_e822(struct ice_hw *hw, u8 port)
{
enum ice_ptp_link_spd link_spd;
enum ice_ptp_fec_mode fec_mode;
- enum ice_status status;
+ int status;
u64 total_offset;
status = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode);
@@ -3411,14 +3411,14 @@ ice_phy_cfg_fixed_tx_offset_e822(struct ice_hw *hw, u8 port)
* This varies by link speed and FEC mode. The value calculated accounts for
* various delays caused when receiving a packet.
*/
-static enum ice_status
+static int
ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port,
enum ice_ptp_link_spd link_spd,
enum ice_ptp_fec_mode fec_mode, u64 *pmd_adj)
{
u64 cur_freq, clk_incval, tu_per_sec, mult, adj;
u32 pmd_adj_divisor, val;
- enum ice_status status;
+ int status;
u8 pmd_align;
status = ice_read_phy_reg_e822(hw, port, P_REG_PMD_ALIGNMENT, &val);
@@ -3610,12 +3610,12 @@ ice_calc_fixed_rx_offset_e822(struct ice_hw *hw, enum ice_ptp_link_spd link_spd)
* the TUs per second up front. This avoids overflow while allowing
* calculation of the adjustment using integer arithmetic.
*/
-enum ice_status ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port)
+int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port)
{
enum ice_ptp_link_spd link_spd;
enum ice_ptp_fec_mode fec_mode;
u64 total_offset, pmd, val;
- enum ice_status status;
+ int status;
status = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode);
if (status)
@@ -3687,12 +3687,12 @@ enum ice_status ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port)
* Calculate and program the fixed Rx offset, and indicate that the offset is
* ready. This can be used when operating in bypass mode.
*/
-static enum ice_status
+static int
ice_phy_cfg_fixed_rx_offset_e822(struct ice_hw *hw, u8 port)
{
enum ice_ptp_link_spd link_spd;
enum ice_ptp_fec_mode fec_mode;
- enum ice_status status;
+ int status;
u64 total_offset;
status = ice_phy_get_speed_and_fec_e822(hw, port, &link_spd, &fec_mode);
@@ -3730,11 +3730,11 @@ ice_phy_cfg_fixed_rx_offset_e822(struct ice_hw *hw, u8 port)
* Issue a ICE_PTP_READ_TIME timer command to simultaneously capture the PHY
* and PHC timer values.
*/
-static enum ice_status
+static int
ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,
u64 *phc_time)
{
- enum ice_status status;
+ int status;
u64 tx_time, rx_time;
u32 zo, lo;
u8 tmr_idx;
@@ -3789,10 +3789,10 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,
* to the PHY timer in order to ensure it reads the same value as the
* primary PHC timer.
*/
-static enum ice_status ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port)
+static int ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port)
{
u64 phc_time, phy_time, difference;
- enum ice_status status;
+ int status;
if (!ice_ptp_lock(hw)) {
ice_debug(hw, ICE_DBG_PTP, "Failed to acquire PTP semaphore\n");
@@ -3858,10 +3858,10 @@ static enum ice_status ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port)
* re-calibrate Tx and Rx timestamping offsets whenever the clock time is
* initialized or when link speed changes.
*/
-enum ice_status
+int
ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset)
{
- enum ice_status status;
+ int status;
u32 val;
status = ice_write_phy_reg_e822(hw, port, P_REG_TX_OR, 0);
@@ -3914,10 +3914,10 @@ ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset)
* timestamps. Use ice_phy_exit_bypass_e822 to exit bypass mode once hardware
* has completed offset calculation.
*/
-enum ice_status
+int
ice_start_phy_timer_e822(struct ice_hw *hw, u8 port, bool bypass)
{
- enum ice_status status;
+ int status;
u32 lo, hi, val;
u64 incval;
u8 tmr_idx;
@@ -4034,9 +4034,9 @@ ice_start_phy_timer_e822(struct ice_hw *hw, u8 port, bool bypass)
* This cannot be done until hardware has measured the offsets, which requires
* waiting until at least one packet has been sent and received by the device.
*/
-enum ice_status ice_phy_exit_bypass_e822(struct ice_hw *hw, u8 port)
+int ice_phy_exit_bypass_e822(struct ice_hw *hw, u8 port)
{
- enum ice_status status;
+ int status;
u32 val;
status = ice_read_phy_reg_e822(hw, port, P_REG_TX_OV_STATUS, &val);
@@ -4119,11 +4119,11 @@ enum ice_status ice_phy_exit_bypass_e822(struct ice_hw *hw, u8 port)
*
* Read a register from the external PHY on the E810 device.
*/
-static enum ice_status
+static int
ice_read_phy_reg_e810_lp(struct ice_hw *hw, u32 addr, u32 *val, bool lock_sbq)
{
struct ice_sbq_msg_input msg = {0};
- enum ice_status status;
+ int status;
msg.msg_addr_low = ICE_LO_WORD(addr);
msg.msg_addr_high = ICE_HI_WORD(addr);
@@ -4142,8 +4142,7 @@ ice_read_phy_reg_e810_lp(struct ice_hw *hw, u32 addr, u32 *val, bool lock_sbq)
return ICE_SUCCESS;
}
-static enum ice_status
-ice_read_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 *val)
+static int ice_read_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 *val)
{
return ice_read_phy_reg_e810_lp(hw, addr, val, true);
}
@@ -4157,11 +4156,11 @@ ice_read_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 *val)
*
* Write a value to a register of the external PHY on the E810 device.
*/
-static enum ice_status
+static int
ice_write_phy_reg_e810_lp(struct ice_hw *hw, u32 addr, u32 val, bool lock_sbq)
{
struct ice_sbq_msg_input msg = {0};
- enum ice_status status;
+ int status;
msg.msg_addr_low = ICE_LO_WORD(addr);
msg.msg_addr_high = ICE_HI_WORD(addr);
@@ -4179,8 +4178,7 @@ ice_write_phy_reg_e810_lp(struct ice_hw *hw, u32 addr, u32 val, bool lock_sbq)
return ICE_SUCCESS;
}
-static enum ice_status
-ice_write_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 val)
+static int ice_write_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 val)
{
return ice_write_phy_reg_e810_lp(hw, addr, val, true);
}
@@ -4196,7 +4194,7 @@ ice_write_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 val)
* timestamp block of the external PHY on the E810 device using the low latency
* timestamp read.
*/
-static enum ice_status
+static int
ice_read_phy_tstamp_ll_e810(struct ice_hw *hw, u8 idx, u8 *hi, u32 *lo)
{
u8 i;
@@ -4237,13 +4235,13 @@ ice_read_phy_tstamp_ll_e810(struct ice_hw *hw, u8 idx, u8 *hi, u32 *lo)
* Read a 8bit timestamp high value and 32 bit timestamp low value out of the
* timestamp block of the external PHY on the E810 device using sideband queue.
*/
-static enum ice_status
+static int
ice_read_phy_tstamp_sbq_e810(struct ice_hw *hw, u8 lport, u8 idx, u8 *hi,
u32 *lo)
{
u32 hi_addr = TS_EXT(HIGH_TX_MEMORY_BANK_START, lport, idx);
u32 lo_addr = TS_EXT(LOW_TX_MEMORY_BANK_START, lport, idx);
- enum ice_status status;
+ int status;
u32 lo_val, hi_val;
status = ice_read_phy_reg_e810(hw, lo_addr, &lo_val);
@@ -4276,10 +4274,10 @@ ice_read_phy_tstamp_sbq_e810(struct ice_hw *hw, u8 lport, u8 idx, u8 *hi,
* Read a 40bit timestamp value out of the timestamp block of the external PHY
* on the E810 device.
*/
-static enum ice_status
+static int
ice_read_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp)
{
- enum ice_status status;
+ int status;
u32 lo = 0;
u8 hi = 0;
@@ -4308,10 +4306,10 @@ ice_read_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp)
* Clear a timestamp, resetting its valid bit, from the timestamp block of the
* external PHY on the E810 device.
*/
-static enum ice_status
+static int
ice_clear_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx)
{
- enum ice_status status;
+ int status;
u32 lo_addr, hi_addr;
lo_addr = TS_EXT(LOW_TX_MEMORY_BANK_START, lport, idx);
@@ -4343,9 +4341,9 @@ ice_clear_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx)
*
* Note there is no equivalent function needed on E822 based devices.
*/
-enum ice_status ice_ptp_init_phy_e810(struct ice_hw *hw)
+int ice_ptp_init_phy_e810(struct ice_hw *hw)
{
- enum ice_status status;
+ int status;
u8 tmr_idx;
tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;
@@ -4364,7 +4362,7 @@ enum ice_status ice_ptp_init_phy_e810(struct ice_hw *hw)
*
* Perform E810-specific PTP hardware clock initialization steps.
*/
-static enum ice_status ice_ptp_init_phc_e810(struct ice_hw *hw)
+static int ice_ptp_init_phc_e810(struct ice_hw *hw)
{
/* Ensure synchronization delay is zero */
wr32(hw, GLTSYN_SYNC_DLAY, 0);
@@ -4385,9 +4383,9 @@ static enum ice_status ice_ptp_init_phc_e810(struct ice_hw *hw)
* The time value is the upper 32 bits of the PHY timer, usually in units of
* nominal nanoseconds.
*/
-static enum ice_status ice_ptp_prep_phy_time_e810(struct ice_hw *hw, u32 time)
+static int ice_ptp_prep_phy_time_e810(struct ice_hw *hw, u32 time)
{
- enum ice_status status;
+ int status;
u8 tmr_idx;
tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;
@@ -4422,10 +4420,10 @@ static enum ice_status ice_ptp_prep_phy_time_e810(struct ice_hw *hw, u32 time)
* the PHY timer, usually in units of nominal nanoseconds. Negative
* adjustments are supported using 2s complement arithmetic.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_adj_e810(struct ice_hw *hw, s32 adj, bool lock_sbq)
{
- enum ice_status status;
+ int status;
u8 tmr_idx;
tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;
@@ -4461,10 +4459,10 @@ ice_ptp_prep_phy_adj_e810(struct ice_hw *hw, s32 adj, bool lock_sbq)
* ETH_GLTSYN_SHADJ_L and ETH_GLTSYN_SHADJ_H registers. The actual change is
* completed by issuing an ICE_PTP_INIT_INCVAL command.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_incval_e810(struct ice_hw *hw, u64 incval)
{
- enum ice_status status;
+ int status;
u32 high, low;
u8 tmr_idx;
@@ -4503,10 +4501,10 @@ ice_ptp_prep_phy_incval_e810(struct ice_hw *hw, u64 incval)
* The time value is the upper 32 bits of the PHY timer, usually in units of
* nominal nanoseconds.
*/
-static enum ice_status
+static int
ice_ptp_prep_phy_adj_target_e810(struct ice_hw *hw, u32 target_time)
{
- enum ice_status status;
+ int status;
u8 tmr_idx;
tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;
@@ -4537,11 +4535,11 @@ ice_ptp_prep_phy_adj_target_e810(struct ice_hw *hw, u32 target_time)
* Prepare the external PHYs connected to this device for a timer sync
* command.
*/
-static enum ice_status
+static int
ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
bool lock_sbq)
{
- enum ice_status status;
+ int status;
u32 cmd_val, val;
switch (cmd) {
@@ -4602,12 +4600,12 @@ ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
* When found - the value will be cached in the hw structure and following calls
* will return cached value
*/
-static enum ice_status
+static int
ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)
{
struct ice_aqc_get_link_topo cmd;
u8 node_part_number, idx;
- enum ice_status status;
+ int status;
u16 node_handle;
if (!hw || !pca9575_handle)
@@ -4678,11 +4676,11 @@ bool ice_is_gps_present_e810t(struct ice_hw *hw)
*
* Read the register from the GPIO controller
*/
-enum ice_status
+int
ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data)
{
struct ice_aqc_link_topo_addr link_topo;
- enum ice_status status;
+ int status;
__le16 addr;
u16 handle;
@@ -4710,12 +4708,12 @@ ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data)
*
* Write the data to the GPIO controller register
*/
-enum ice_status
+int
ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data)
{
struct ice_aqc_link_topo_addr link_topo;
- enum ice_status status;
__le16 addr;
+ int status;
u16 handle;
memset(&link_topo, 0, sizeof(link_topo));
@@ -4741,9 +4739,9 @@ ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data)
*
* Read the SMA controller state. Only bits 3-7 in data are valid.
*/
-enum ice_status ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data)
+int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data)
{
- enum ice_status status;
+ int status;
u16 handle;
u8 i;
@@ -4773,9 +4771,9 @@ enum ice_status ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data)
*
* Write the data to the SMA controller. Only bits 3-7 in data are valid.
*/
-enum ice_status ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data)
+int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data)
{
- enum ice_status status;
+ int status;
u16 handle;
u8 i;
@@ -4804,7 +4802,7 @@ enum ice_status ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data)
*/
bool ice_is_pca9575_present(struct ice_hw *hw)
{
- enum ice_status status;
+ int status;
u16 handle = 0;
status = ice_get_pca9575_handle(hw, &handle);
@@ -4881,10 +4879,10 @@ void ice_ptp_unlock(struct ice_hw *hw)
* for the command to be synchronously applied to both the source and PHY
* timers.
*/
-static enum ice_status
-ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd, bool lock_sbq)
+static int ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
+ bool lock_sbq)
{
- enum ice_status status;
+ int status;
/* First, prepare the source timer */
ice_ptp_src_cmd(hw, cmd);
@@ -4931,9 +4929,9 @@ ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd, bool lock_sbq)
* 3) issue an init_time timer command to synchronously switch both the source
* and port timers to the new init time value at the next clock cycle.
*/
-enum ice_status ice_ptp_init_time(struct ice_hw *hw, u64 time)
+int ice_ptp_init_time(struct ice_hw *hw, u64 time)
{
- enum ice_status status;
+ int status;
u8 tmr_idx;
tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;
@@ -4979,9 +4977,9 @@ enum ice_status ice_ptp_init_time(struct ice_hw *hw, u64 time)
* the source and port timers to the new increment value at the next clock
* cycle.
*/
-enum ice_status ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
+int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
{
- enum ice_status status;
+ int status;
u8 tmr_idx;
tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;
@@ -5017,9 +5015,9 @@ enum ice_status ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
*
* Program a new PHC incval while holding the PTP semaphore.
*/
-enum ice_status ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval)
+int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval)
{
- enum ice_status status;
+ int status;
if (!ice_ptp_lock(hw))
return ICE_ERR_NOT_READY;
@@ -5046,9 +5044,9 @@ enum ice_status ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval)
* 3) Issue an ICE_PTP_ADJ_TIME timer command to synchronously apply the
* adjustment to both the source and port timers at the next clock cycle.
*/
-enum ice_status ice_ptp_adj_clock(struct ice_hw *hw, s32 adj, bool lock_sbq)
+int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj, bool lock_sbq)
{
- enum ice_status status;
+ int status;
u8 tmr_idx;
tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned;
@@ -5097,10 +5095,10 @@ enum ice_status ice_ptp_adj_clock(struct ice_hw *hw, s32 adj, bool lock_sbq)
* 5) Issue an ICE_PTP_ADJ_TIME_AT_TIME command to initiate the atomic
* adjustment.
*/
-enum ice_status
+int
ice_ptp_adj_clock_at_time(struct ice_hw *hw, u64 at_time, s32 adj)
{
- enum ice_status status;
+ int status;
u32 time_lo, time_hi;
u8 tmr_idx;
@@ -5171,10 +5169,10 @@ ice_ptp_adj_clock_at_time(struct ice_hw *hw, u64 at_time, s32 adj)
* the block is the quad to read from. For E810 devices, the block is the
* logical port to read from.
*/
-enum ice_status
+int
ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)
{
- enum ice_status status;
+ int status;
switch (hw->phy_cfg) {
case ICE_PHY_ETH56G:
@@ -5203,10 +5201,10 @@ ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)
* E822 devices, the block is the quad to clear from. For E810 devices, the
* block is the logical port to clear from.
*/
-enum ice_status
+int
ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx)
{
- enum ice_status status;
+ int status;
switch (hw->phy_cfg) {
case ICE_PHY_ETH56G:
@@ -5231,9 +5229,9 @@ ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx)
*
* Perform the steps required to initialize the PTP hardware clock.
*/
-enum ice_status ice_ptp_init_phc(struct ice_hw *hw)
+int ice_ptp_init_phc(struct ice_hw *hw)
{
- enum ice_status status;
+ int status;
u8 src_idx = hw->func_caps.ts_func_info.tmr_index_owned;
/* Enable source clocks */
diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h
index 3667c9882d..35ab9bb3e8 100644
--- a/drivers/net/ice/base/ice_ptp_hw.h
+++ b/drivers/net/ice/base/ice_ptp_hw.h
@@ -131,39 +131,39 @@ u64 ice_ptp_read_src_incval(struct ice_hw *hw);
bool ice_ptp_lock(struct ice_hw *hw);
void ice_ptp_unlock(struct ice_hw *hw);
void ice_ptp_src_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd);
-enum ice_status ice_ptp_init_time(struct ice_hw *hw, u64 time);
-enum ice_status ice_ptp_write_incval(struct ice_hw *hw, u64 incval);
-enum ice_status ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval);
-enum ice_status ice_ptp_adj_clock(struct ice_hw *hw, s32 adj, bool lock_sbq);
-enum ice_status
+int ice_ptp_init_time(struct ice_hw *hw, u64 time);
+int ice_ptp_write_incval(struct ice_hw *hw, u64 incval);
+int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval);
+int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj, bool lock_sbq);
+int
ice_ptp_adj_clock_at_time(struct ice_hw *hw, u64 at_time, s32 adj);
-enum ice_status
+int
ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp);
-enum ice_status
+int
ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx);
-enum ice_status ice_ptp_init_phc(struct ice_hw *hw);
+int ice_ptp_init_phc(struct ice_hw *hw);
/* E822 family functions */
-enum ice_status
+int
ice_read_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 *val);
-enum ice_status
+int
ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val);
-enum ice_status
+int
ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val);
-enum ice_status
+int
ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val);
-enum ice_status
+int
ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time,
bool lock_sbq);
-enum ice_status
+int
ice_ptp_read_phy_incval_e822(struct ice_hw *hw, u8 port, u64 *incval);
-enum ice_status
+int
ice_ptp_read_port_capture_e822(struct ice_hw *hw, u8 port,
u64 *tx_ts, u64 *rx_ts);
-enum ice_status
+int
ice_ptp_one_port_cmd_e822(struct ice_hw *hw, u8 port,
enum ice_ptp_tmr_cmd cmd, bool lock_sbq);
-enum ice_status
+int
ice_cfg_cgu_pll_e822(struct ice_hw *hw, enum ice_time_ref_freq clk_freq,
enum ice_clk_src clk_src);
@@ -208,65 +208,65 @@ static inline u64 ice_e822_pps_delay(enum ice_time_ref_freq time_ref)
}
/* E822 Vernier calibration functions */
-enum ice_status ice_ptp_set_vernier_wl(struct ice_hw *hw);
-enum ice_status
+int ice_ptp_set_vernier_wl(struct ice_hw *hw);
+int
ice_phy_get_speed_and_fec_e822(struct ice_hw *hw, u8 port,
enum ice_ptp_link_spd *link_out,
enum ice_ptp_fec_mode *fec_out);
void ice_phy_cfg_lane_e822(struct ice_hw *hw, u8 port);
-enum ice_status
+int
ice_stop_phy_timer_e822(struct ice_hw *hw, u8 port, bool soft_reset);
-enum ice_status
+int
ice_start_phy_timer_e822(struct ice_hw *hw, u8 port, bool bypass);
-enum ice_status ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port);
-enum ice_status ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port);
-enum ice_status ice_phy_exit_bypass_e822(struct ice_hw *hw, u8 port);
+int ice_phy_cfg_tx_offset_e822(struct ice_hw *hw, u8 port);
+int ice_phy_cfg_rx_offset_e822(struct ice_hw *hw, u8 port);
+int ice_phy_exit_bypass_e822(struct ice_hw *hw, u8 port);
/* E810 family functions */
bool ice_is_gps_present_e810t(struct ice_hw *hw);
-enum ice_status ice_ptp_init_phy_e810(struct ice_hw *hw);
-enum ice_status
+int ice_ptp_init_phy_e810(struct ice_hw *hw);
+int
ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data);
-enum ice_status
+int
ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data);
-enum ice_status ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data);
-enum ice_status ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data);
+int ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data);
+int ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data);
bool ice_is_pca9575_present(struct ice_hw *hw);
void
ice_ptp_process_cgu_err(struct ice_hw *hw, struct ice_rq_event_info *event);
/* ETH56G family functions */
-enum ice_status
+int
ice_read_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 *val);
-enum ice_status
+int
ice_write_phy_reg_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 val);
-enum ice_status
+int
ice_read_phy_mem_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 *val);
-enum ice_status
+int
ice_write_phy_mem_eth56g(struct ice_hw *hw, u8 port, u16 offset, u32 val);
-enum ice_status
+int
ice_ptp_prep_port_adj_eth56g(struct ice_hw *hw, u8 port, s64 time,
bool lock_sbq);
-enum ice_status
+int
ice_ptp_read_phy_incval_eth56g(struct ice_hw *hw, u8 port, u64 *incval);
-enum ice_status
+int
ice_ptp_read_port_capture_eth56g(struct ice_hw *hw, u8 port,
u64 *tx_ts, u64 *rx_ts);
-enum ice_status
+int
ice_ptp_one_port_cmd_eth56g(struct ice_hw *hw, u8 port,
enum ice_ptp_tmr_cmd cmd, bool lock_sbq);
-enum ice_status
+int
ice_ptp_read_tx_hwtstamp_status_eth56g(struct ice_hw *hw, u32 *ts_status);
-enum ice_status
+int
ice_stop_phy_timer_eth56g(struct ice_hw *hw, u8 port, bool soft_reset);
-enum ice_status
+int
ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port, bool bypass);
-enum ice_status ice_phy_cfg_tx_offset_eth56g(struct ice_hw *hw, u8 port);
-enum ice_status ice_phy_cfg_rx_offset_eth56g(struct ice_hw *hw, u8 port);
+int ice_phy_cfg_tx_offset_eth56g(struct ice_hw *hw, u8 port);
+int ice_phy_cfg_rx_offset_eth56g(struct ice_hw *hw, u8 port);
-enum ice_status ice_ptp_init_phy_cfg(struct ice_hw *hw);
+int ice_ptp_init_phy_cfg(struct ice_hw *hw);
#define PFTSYN_SEM_BYTES 4
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index a1dd0c6ace..80cd057462 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -12,7 +12,7 @@
* This function inserts the root node of the scheduling tree topology
* to the SW DB.
*/
-static enum ice_status
+static int
ice_sched_add_root_node(struct ice_port_info *pi,
struct ice_aqc_txsched_elem_data *info)
{
@@ -97,14 +97,14 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
*
* This function sends a scheduling elements cmd (cmd_opc)
*/
-static enum ice_status
+static int
ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
u16 elems_req, void *buf, u16 buf_size,
u16 *elems_resp, struct ice_sq_cd *cd)
{
struct ice_aqc_sched_elem_cmd *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.sched_elem_cmd;
ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
@@ -128,7 +128,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
*
* Query scheduling elements (0x0404)
*/
-enum ice_status
+int
ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
u16 *elems_ret, struct ice_sq_cd *cd)
@@ -147,7 +147,7 @@ ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
*
* This function inserts a scheduler node to the SW DB.
*/
-enum ice_status
+int
ice_sched_add_node(struct ice_port_info *pi, u8 layer,
struct ice_aqc_txsched_elem_data *info,
struct ice_sched_node *prealloc_node)
@@ -155,8 +155,8 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
struct ice_aqc_txsched_elem_data elem;
struct ice_sched_node *parent;
struct ice_sched_node *node;
- enum ice_status status;
struct ice_hw *hw;
+ int status;
if (!pi)
return ICE_ERR_PARAM;
@@ -214,7 +214,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
*
* Delete scheduling elements (0x040F)
*/
-static enum ice_status
+static int
ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_delete_elem *buf, u16 buf_size,
u16 *grps_del, struct ice_sq_cd *cd)
@@ -233,14 +233,14 @@ ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
*
* This function remove nodes from HW
*/
-static enum ice_status
+static int
ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
u16 num_nodes, u32 *node_teids)
{
struct ice_aqc_delete_elem *buf;
u16 i, num_groups_removed = 0;
- enum ice_status status;
u16 buf_size;
+ int status;
buf_size = ice_struct_size(buf, teid, num_nodes);
buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
@@ -374,14 +374,14 @@ void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
*
* Get default scheduler topology (0x400)
*/
-static enum ice_status
+static int
ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
struct ice_aqc_get_topo_elem *buf, u16 buf_size,
u8 *num_branches, struct ice_sq_cd *cd)
{
struct ice_aqc_get_topo *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.get_topo;
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
@@ -404,7 +404,7 @@ ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
*
* Add scheduling elements (0x0401)
*/
-static enum ice_status
+static int
ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_add_elem *buf, u16 buf_size,
u16 *grps_added, struct ice_sq_cd *cd)
@@ -425,7 +425,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
*
* Configure scheduling elements (0x0403)
*/
-static enum ice_status
+static int
ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
u16 *elems_cfgd, struct ice_sq_cd *cd)
@@ -446,7 +446,7 @@ ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
*
* Move scheduling elements (0x0408)
*/
-enum ice_status
+int
ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_move_elem *buf, u16 buf_size,
u16 *grps_movd, struct ice_sq_cd *cd)
@@ -467,7 +467,7 @@ ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
*
* Suspend scheduling elements (0x0409)
*/
-static enum ice_status
+static int
ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
{
@@ -487,7 +487,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
*
* resume scheduling elements (0x040A)
*/
-static enum ice_status
+static int
ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
{
@@ -505,7 +505,7 @@ ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
*
* Query scheduler resource allocation (0x0412)
*/
-static enum ice_status
+static int
ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
struct ice_aqc_query_txsched_res_resp *buf,
struct ice_sq_cd *cd)
@@ -525,13 +525,13 @@ ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
*
* This function suspends or resumes HW nodes
*/
-static enum ice_status
+static int
ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
bool suspend)
{
u16 i, buf_size, num_elem_ret = 0;
- enum ice_status status;
__le32 *buf;
+ int status;
buf_size = sizeof(*buf) * num_nodes;
buf = (__le32 *)ice_malloc(hw, buf_size);
@@ -563,7 +563,7 @@ ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
* @tc: TC number
* @new_numqs: number of queues
*/
-static enum ice_status
+static int
ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
{
struct ice_vsi_ctx *vsi_ctx;
@@ -610,14 +610,14 @@ ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
*
* RL profile function to add, query, or remove profile(s)
*/
-static enum ice_status
+static int
ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
{
struct ice_aqc_rl_profile *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.rl_profile;
@@ -641,7 +641,7 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
*
* Add RL profile (0x0410)
*/
-static enum ice_status
+static int
ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
u16 *num_profiles_added, struct ice_sq_cd *cd)
@@ -660,7 +660,7 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
*
* Query RL profile (0x0411)
*/
-enum ice_status
+int
ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
struct ice_sq_cd *cd)
@@ -680,7 +680,7 @@ ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
*
* Remove RL profile (0x0415)
*/
-static enum ice_status
+static int
ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
u16 *num_profiles_removed, struct ice_sq_cd *cd)
@@ -699,14 +699,14 @@ ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
* its associated parameters from HW DB,and locally. The caller needs to
* hold scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_del_rl_profile(struct ice_hw *hw,
struct ice_aqc_rl_profile_info *rl_info)
{
struct ice_aqc_rl_profile_elem *buf;
u16 num_profiles_removed;
- enum ice_status status;
u16 num_profiles = 1;
+ int status;
if (rl_info->prof_id_ref != 0)
return ICE_ERR_IN_USE;
@@ -742,7 +742,7 @@ static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
&hw->rl_prof_list[ln],
ice_aqc_rl_profile_info, list_entry) {
- enum ice_status status;
+ int status;
rl_prof_elem->prof_id_ref = 0;
status = ice_sched_del_rl_profile(hw, rl_prof_elem);
@@ -855,7 +855,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw)
*
* Configure Node Attributes (0x0417)
*/
-enum ice_status
+int
ice_aq_cfg_node_attr(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_node_attr_elem *buf, u16 buf_size,
struct ice_sq_cd *cd)
@@ -882,7 +882,7 @@ ice_aq_cfg_node_attr(struct ice_hw *hw, u16 num_nodes,
*
* Configure L2 Node CGD (0x0414)
*/
-enum ice_status
+int
ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
struct ice_aqc_cfg_l2_node_cgd_elem *buf,
u16 buf_size, struct ice_sq_cd *cd)
@@ -911,7 +911,7 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
*
* This function add nodes to HW as well as to SW DB for a given layer
*/
-static enum ice_status
+static int
ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
struct ice_sched_node *parent, u8 layer, u16 num_nodes,
u16 *num_nodes_added, u32 *first_node_teid,
@@ -920,7 +920,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
struct ice_sched_node *prev, *new_node;
struct ice_aqc_add_elem *buf;
u16 i, num_groups_added = 0;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_hw *hw = pi->hw;
u16 buf_size;
u32 teid;
@@ -1015,7 +1015,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
*
* Add nodes into specific hw layer.
*/
-static enum ice_status
+static int
ice_sched_add_nodes_to_hw_layer(struct ice_port_info *pi,
struct ice_sched_node *tc_node,
struct ice_sched_node *parent, u8 layer,
@@ -1059,7 +1059,7 @@ ice_sched_add_nodes_to_hw_layer(struct ice_port_info *pi,
*
* This function add nodes to a given layer.
*/
-static enum ice_status
+static int
ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
struct ice_sched_node *tc_node,
struct ice_sched_node *parent, u8 layer,
@@ -1068,7 +1068,7 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
{
u32 *first_teid_ptr = first_node_teid;
u16 new_num_nodes = num_nodes;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
*num_nodes_added = 0;
while (*num_nodes_added < num_nodes) {
@@ -1187,7 +1187,7 @@ static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
}
if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
u32 teid = LE32_TO_CPU(node->info.node_teid);
- enum ice_status status;
+ int status;
/* remove the default leaf node */
status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
@@ -1233,13 +1233,13 @@ static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
* resources, default topology created by firmware and storing the information
* in SW DB.
*/
-enum ice_status ice_sched_init_port(struct ice_port_info *pi)
+int ice_sched_init_port(struct ice_port_info *pi)
{
struct ice_aqc_get_topo_elem *buf;
- enum ice_status status;
struct ice_hw *hw;
u8 num_branches;
u16 num_elems;
+ int status;
u8 i, j;
if (!pi)
@@ -1362,10 +1362,10 @@ struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
*
* query FW for allocated scheduler resources and store in HW struct
*/
-enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
+int ice_sched_query_res_alloc(struct ice_hw *hw)
{
struct ice_aqc_query_txsched_res_resp *buf;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
__le16 max_sibl;
u8 i;
@@ -1653,8 +1653,8 @@ ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
{
struct ice_aqc_txsched_elem_data buf;
- enum ice_status status;
u32 node_teid;
+ int status;
node_teid = LE32_TO_CPU(node->info.node_teid);
status = ice_sched_query_elem(hw, node_teid, &buf);
@@ -1709,7 +1709,7 @@ ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
* This function adds the VSI child nodes to tree. It gets called for
* LAN and RDMA separately.
*/
-static enum ice_status
+static int
ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
struct ice_sched_node *tc_node, u16 *num_nodes,
u8 owner)
@@ -1724,7 +1724,7 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
vsil = ice_sched_get_vsi_layer(hw);
parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
for (i = vsil + 1; i <= qgl; i++) {
- enum ice_status status;
+ int status;
if (!parent)
return ICE_ERR_CFG;
@@ -1814,7 +1814,7 @@ ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
* This function adds the VSI supported nodes into Tx tree including the
* VSI, its parent and intermediate nodes in below layers
*/
-static enum ice_status
+static int
ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
struct ice_sched_node *tc_node, u16 *num_nodes)
{
@@ -1828,7 +1828,7 @@ ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
vsil = ice_sched_get_vsi_layer(pi->hw);
for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
- enum ice_status status;
+ int status;
status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
i, num_nodes[i],
@@ -1864,7 +1864,7 @@ ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
*
* This function adds a new VSI into scheduler tree
*/
-static enum ice_status
+static int
ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
{
u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
@@ -1892,7 +1892,7 @@ ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
*
* This function updates the VSI child nodes based on the number of queues
*/
-static enum ice_status
+static int
ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
u8 tc, u16 new_numqs, u8 owner)
{
@@ -1900,7 +1900,7 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
struct ice_sched_node *vsi_node;
struct ice_sched_node *tc_node;
struct ice_vsi_ctx *vsi_ctx;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_hw *hw = pi->hw;
u16 prev_numqs;
@@ -1955,13 +1955,13 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
* enabled and VSI is in suspended state then resume the VSI back. If TC is
* disabled then suspend the VSI if it is not already.
*/
-enum ice_status
+int
ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
u8 owner, bool enable)
{
struct ice_sched_node *vsi_node, *tc_node;
struct ice_vsi_ctx *vsi_ctx;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_hw *hw = pi->hw;
ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
@@ -2079,11 +2079,11 @@ static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
* This function removes the VSI and its LAN or RDMA children nodes from the
* scheduler tree.
*/
-static enum ice_status
+static int
ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
{
- enum ice_status status = ICE_ERR_PARAM;
struct ice_vsi_ctx *vsi_ctx;
+ int status = ICE_ERR_PARAM;
u8 i;
ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
@@ -2149,7 +2149,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
* This function clears the VSI and its LAN children nodes from scheduler tree
* for all TCs.
*/
-enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
+int ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
{
return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
}
@@ -2189,7 +2189,7 @@ bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
* This function retrieves the tree topology from the firmware for a given
* node TEID to the root node.
*/
-enum ice_status
+int
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
struct ice_sq_cd *cd)
@@ -2309,11 +2309,11 @@ ice_sched_update_parent(struct ice_sched_node *new_parent,
*
* This function move the child nodes to a given parent.
*/
-static enum ice_status
+static int
ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
u16 num_items, u32 *list)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_aqc_move_elem *buf;
struct ice_sched_node *node;
u16 i, grps_movd = 0;
@@ -2372,16 +2372,16 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
* This function moves a VSI to an aggregator node or its subtree.
* Intermediate nodes may be created if required.
*/
-static enum ice_status
+static int
ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
u8 tc)
{
struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
u32 first_node_teid, vsi_teid;
- enum ice_status status;
u16 num_nodes_added;
u8 aggl, vsil, i;
+ int status;
tc_node = ice_sched_get_tc_node(pi, tc);
if (!tc_node)
@@ -2454,14 +2454,14 @@ ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
* aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
* caller holds the scheduler lock.
*/
-static enum ice_status
+static int
ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
struct ice_sched_agg_info *agg_info, u8 tc,
bool rm_vsi_info)
{
struct ice_sched_agg_vsi_info *agg_vsi_info;
struct ice_sched_agg_vsi_info *tmp;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
ice_sched_agg_vsi_info, list_entry) {
@@ -2518,7 +2518,7 @@ ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
* This function removes the aggregator node and intermediate nodes if any
* from the given TC
*/
-static enum ice_status
+static int
ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
{
struct ice_sched_node *tc_node, *agg_node;
@@ -2566,11 +2566,11 @@ ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
* the aggregator configuration completely for requested TC. The caller needs
* to hold the scheduler lock.
*/
-static enum ice_status
+static int
ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
u8 tc, bool rm_vsi_info)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
/* If nothing to remove - return success */
if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
@@ -2599,7 +2599,7 @@ ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
* Save aggregator TC bitmap. This function needs to be called with scheduler
* lock held.
*/
-static enum ice_status
+static int
ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
ice_bitmap_t *tc_bitmap)
{
@@ -2622,12 +2622,12 @@ ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
* This function creates an aggregator node and intermediate nodes if required
* for the given TC
*/
-static enum ice_status
+static int
ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
{
struct ice_sched_node *parent, *agg_node, *tc_node;
u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_hw *hw = pi->hw;
u32 first_node_teid;
u16 num_nodes_added;
@@ -2712,12 +2712,12 @@ ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
* resources and remove aggregator ID.
* This function needs to be called with scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
{
struct ice_sched_agg_info *agg_info;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_hw *hw = pi->hw;
u8 tc;
@@ -2774,12 +2774,12 @@ ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
*
* This function configures aggregator node(s).
*/
-enum ice_status
+int
ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
u8 tc_bitmap)
{
ice_bitmap_t bitmap = tc_bitmap;
- enum ice_status status;
+ int status;
ice_acquire_lock(&pi->sched_lock);
status = ice_sched_cfg_agg(pi, agg_id, agg_type,
@@ -2847,7 +2847,7 @@ ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
* Save VSI to aggregator TC bitmap. This function needs to call with scheduler
* lock held.
*/
-static enum ice_status
+static int
ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
ice_bitmap_t *tc_bitmap)
{
@@ -2877,13 +2877,13 @@ ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
* already associated to the aggregator node then no operation is performed on
* the tree. This function needs to be called with scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
u16 vsi_handle, ice_bitmap_t *tc_bitmap)
{
struct ice_sched_agg_vsi_info *agg_vsi_info, *old_agg_vsi_info = NULL;
struct ice_sched_agg_info *agg_info, *old_agg_info;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_hw *hw = pi->hw;
u8 tc;
@@ -2975,12 +2975,12 @@ static void ice_sched_rm_unused_rl_prof(struct ice_hw *hw)
* returns success or error on config sched element failure. The caller
* needs to hold scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
struct ice_aqc_txsched_elem_data *info)
{
struct ice_aqc_txsched_elem_data buf;
- enum ice_status status;
+ int status;
u16 elem_cfgd = 0;
u16 num_elems = 1;
@@ -3020,13 +3020,13 @@ ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
*
* This function configures node element's BW allocation.
*/
-enum ice_status
+int
ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
enum ice_rl_type rl_type, u16 bw_alloc)
{
struct ice_aqc_txsched_elem_data buf;
struct ice_aqc_txsched_elem *data;
- enum ice_status status;
+ int status;
buf = node->info;
data = &buf.data;
@@ -3054,12 +3054,12 @@ ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
*
* Move or associate VSI to a new or default aggregator node.
*/
-enum ice_status
+int
ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
u8 tc_bitmap)
{
ice_bitmap_t bitmap = tc_bitmap;
- enum ice_status status;
+ int status;
ice_acquire_lock(&pi->sched_lock);
status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
@@ -3079,10 +3079,10 @@ ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
* This function removes aggregator reference to VSI and delete aggregator ID
* info. It removes the aggregator configuration completely.
*/
-enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
+int ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
{
struct ice_sched_agg_info *agg_info;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 tc;
ice_acquire_lock(&pi->sched_lock);
@@ -3161,7 +3161,7 @@ ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
*
* Save BW alloc information of VSI type node for post replay use.
*/
-static enum ice_status
+static int
ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
enum ice_rl_type rl_type, u16 bw_alloc)
{
@@ -3254,7 +3254,7 @@ static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
*
* Save BW information of VSI type node for post replay use.
*/
-static enum ice_status
+static int
ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
enum ice_rl_type rl_type, u32 bw)
{
@@ -3306,7 +3306,7 @@ static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
*
* Save priority information of VSI type node for post replay use.
*/
-static enum ice_status
+static int
ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u8 prio)
{
@@ -3333,7 +3333,7 @@ ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
*
* Save BW alloc information of AGG type node for post replay use.
*/
-static enum ice_status
+static int
ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
enum ice_rl_type rl_type, u16 bw_alloc)
{
@@ -3367,7 +3367,7 @@ ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
*
* Save BW information of AGG type node for post replay use.
*/
-static enum ice_status
+static int
ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
enum ice_rl_type rl_type, u32 bw)
{
@@ -3405,11 +3405,11 @@ ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
* This function configures BW limit of VSI scheduling node based on TC
* information.
*/
-enum ice_status
+int
ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
enum ice_rl_type rl_type, u32 bw)
{
- enum ice_status status;
+ int status;
status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
ICE_AGG_TYPE_VSI,
@@ -3432,11 +3432,11 @@ ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
* This function configures default BW limit of VSI scheduling node based on TC
* information.
*/
-enum ice_status
+int
ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
enum ice_rl_type rl_type)
{
- enum ice_status status;
+ int status;
status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
ICE_AGG_TYPE_VSI,
@@ -3462,11 +3462,11 @@ ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
* This function applies BW limit to aggregator scheduling node based on TC
* information.
*/
-enum ice_status
+int
ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
enum ice_rl_type rl_type, u32 bw)
{
- enum ice_status status;
+ int status;
status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
tc, rl_type, bw);
@@ -3488,11 +3488,11 @@ ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
* This function applies default BW limit to aggregator scheduling node based
* on TC information.
*/
-enum ice_status
+int
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
enum ice_rl_type rl_type)
{
- enum ice_status status;
+ int status;
status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
tc, rl_type,
@@ -3517,7 +3517,7 @@ ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
* Configure shared rate limiter(SRL) of all VSI type nodes across all traffic
* classes for VSI matching handle.
*/
-enum ice_status
+int
ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw,
u32 max_bw, u32 shared_bw)
{
@@ -3533,7 +3533,7 @@ ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw,
* This function removes the shared rate limiter(SRL) of all VSI type nodes
* across all traffic classes for VSI matching handle.
*/
-enum ice_status
+int
ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
{
return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
@@ -3553,7 +3553,7 @@ ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
* This function configures the shared rate limiter(SRL) of all aggregator type
* nodes across all traffic classes for aggregator matching agg_id.
*/
-enum ice_status
+int
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
u32 max_bw, u32 shared_bw)
{
@@ -3569,7 +3569,7 @@ ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
* This function removes the shared rate limiter(SRL) of all aggregator type
* nodes across all traffic classes for aggregator matching agg_id.
*/
-enum ice_status
+int
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
{
return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW,
@@ -3589,7 +3589,7 @@ ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
* This function configures the shared rate limiter(SRL) of all aggregator type
* nodes across all traffic classes for aggregator matching agg_id.
*/
-enum ice_status
+int
ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
u32 min_bw, u32 max_bw, u32 shared_bw)
{
@@ -3606,7 +3606,7 @@ ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
* This function configures the shared rate limiter(SRL) of all aggregator type
* nodes across all traffic classes for aggregator matching agg_id.
*/
-enum ice_status
+int
ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc)
{
return ice_sched_set_agg_bw_shared_lmt_per_tc(pi, agg_id, tc,
@@ -3625,11 +3625,11 @@ ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc)
* This function configures the queue node priority (Sibling Priority) of the
* passed in VSI's queue(s) for a given traffic class (TC).
*/
-enum ice_status
+int
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
u8 *q_prio)
{
- enum ice_status status = ICE_ERR_PARAM;
+ int status = ICE_ERR_PARAM;
u16 i;
ice_acquire_lock(&pi->sched_lock);
@@ -3661,12 +3661,12 @@ ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
*
* This function configures node element's sibling priority only.
*/
-enum ice_status
+int
ice_sched_cfg_sibl_node_prio_lock(struct ice_port_info *pi,
struct ice_sched_node *node,
u8 priority)
{
- enum ice_status status;
+ int status;
ice_acquire_lock(&pi->sched_lock);
status = ice_sched_cfg_sibl_node_prio(pi, node, priority);
@@ -3683,7 +3683,7 @@ ice_sched_cfg_sibl_node_prio_lock(struct ice_port_info *pi,
*
* Save BW information of queue type node for post replay use.
*/
-static enum ice_status
+static int
ice_sched_save_q_bw_alloc(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type,
u32 bw_alloc)
{
@@ -3711,11 +3711,11 @@ ice_sched_save_q_bw_alloc(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type,
*
* This function configures BW allocation of queue scheduling node.
*/
-enum ice_status
+int
ice_cfg_q_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 q_handle, enum ice_rl_type rl_type, u32 bw_alloc)
{
- enum ice_status status = ICE_ERR_PARAM;
+ int status = ICE_ERR_PARAM;
struct ice_sched_node *node;
struct ice_q_ctx *q_ctx;
@@ -3751,17 +3751,17 @@ ice_cfg_q_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
* This function configures the node priority (Sibling Priority) of the
* passed in VSI's for a given traffic class (TC) of an Aggregator ID.
*/
-enum ice_status
+int
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
u16 num_vsis, u16 *vsi_handle_arr,
u8 *node_prio, u8 tc)
{
struct ice_sched_agg_vsi_info *agg_vsi_info;
struct ice_sched_node *tc_node, *agg_node;
- enum ice_status status = ICE_ERR_PARAM;
struct ice_sched_agg_info *agg_info;
bool agg_id_present = false;
struct ice_hw *hw = pi->hw;
+ int status = ICE_ERR_PARAM;
u16 i;
ice_acquire_lock(&pi->sched_lock);
@@ -3838,11 +3838,11 @@ ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
* This function configures the BW allocation of the passed in VSI's
* node(s) for enabled traffic class.
*/
-enum ice_status
+int
ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
enum ice_rl_type rl_type, u8 *bw_alloc)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 tc;
if (!ice_is_vsi_valid(pi->hw, vsi_handle))
@@ -3890,13 +3890,13 @@ ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
* This function configures the BW allocation of passed in aggregator for
* enabled traffic class(s).
*/
-enum ice_status
+int
ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
enum ice_rl_type rl_type, u8 *bw_alloc)
{
struct ice_sched_agg_info *agg_info;
bool agg_id_present = false;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_hw *hw = pi->hw;
u8 tc;
@@ -3992,12 +3992,12 @@ static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
*
* This function converts the BW to profile structure format.
*/
-static enum ice_status
+static int
ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
struct ice_aqc_rl_profile_elem *profile)
{
- enum ice_status status = ICE_ERR_PARAM;
s64 bytes_per_sec, ts_rate, mv_tmp;
+ int status = ICE_ERR_PARAM;
bool found = false;
s32 encode = 0;
s64 mv = 0;
@@ -4070,8 +4070,8 @@ ice_sched_add_rl_profile(struct ice_hw *hw, enum ice_rl_type rl_type,
struct ice_aqc_rl_profile_info *rl_prof_elem;
u16 profiles_added = 0, num_profiles = 1;
struct ice_aqc_rl_profile_elem *buf;
- enum ice_status status;
u8 profile_type;
+ int status;
if (!hw || layer_num >= hw->num_tx_sched_layers)
return NULL;
@@ -4139,7 +4139,7 @@ ice_sched_add_rl_profile(struct ice_hw *hw, enum ice_rl_type rl_type,
*
* This function configures node element's BW limit.
*/
-static enum ice_status
+static int
ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
enum ice_rl_type rl_type, u16 rl_prof_id)
{
@@ -4283,12 +4283,12 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
* 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
* scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_rm_rl_profile(struct ice_hw *hw, u8 layer_num, u8 profile_type,
u16 profile_id)
{
struct ice_aqc_rl_profile_info *rl_prof_elem;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (!hw || layer_num >= hw->num_tx_sched_layers)
return ICE_ERR_PARAM;
@@ -4324,12 +4324,12 @@ ice_sched_rm_rl_profile(struct ice_hw *hw, u8 layer_num, u8 profile_type,
* type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
struct ice_sched_node *node,
enum ice_rl_type rl_type, u8 layer_num)
{
- enum ice_status status;
+ int status;
struct ice_hw *hw;
u8 profile_type;
u16 rl_prof_id;
@@ -4380,14 +4380,14 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
* node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
* ID from local database. The caller needs to hold scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw, u8 layer_num)
{
struct ice_aqc_rl_profile_info *rl_prof_info;
- enum ice_status status = ICE_ERR_PARAM;
struct ice_hw *hw = pi->hw;
u16 old_id, rl_prof_id;
+ int status = ICE_ERR_PARAM;
rl_prof_info = ice_sched_add_rl_profile(hw, rl_type, bw, layer_num);
if (!rl_prof_info)
@@ -4429,7 +4429,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
* NOTE: Caller provides the correct SRL node in case of shared profile
* settings.
*/
-enum ice_status
+int
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw)
{
@@ -4462,7 +4462,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
* type CIR, EIR, or SRL to default. This function needs to be called
* with the scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
struct ice_sched_node *node,
enum ice_rl_type rl_type)
@@ -4480,7 +4480,7 @@ ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
* behalf of the requested node (first argument). This function needs to be
* called with scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
{
/* SRL profiles are not available on all layers. Check if the
@@ -4506,7 +4506,7 @@ ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
*
* Save BW information of queue type node for post replay use.
*/
-static enum ice_status
+static int
ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
{
switch (rl_type) {
@@ -4536,13 +4536,13 @@ ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
*
* This function sets BW limit of queue scheduling node.
*/
-static enum ice_status
+static int
ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 q_handle, enum ice_rl_type rl_type, u32 bw)
{
- enum ice_status status = ICE_ERR_PARAM;
struct ice_sched_node *node;
struct ice_q_ctx *q_ctx;
+ int status = ICE_ERR_PARAM;
if (!ice_is_vsi_valid(pi->hw, vsi_handle))
return ICE_ERR_PARAM;
@@ -4599,7 +4599,7 @@ ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
*
* This function configures BW limit of queue scheduling node.
*/
-enum ice_status
+int
ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 q_handle, enum ice_rl_type rl_type, u32 bw)
{
@@ -4617,7 +4617,7 @@ ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
*
* This function configures BW default limit of queue scheduling node.
*/
-enum ice_status
+int
ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 q_handle, enum ice_rl_type rl_type)
{
@@ -4635,7 +4635,7 @@ ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
* This function saves the modified values of bandwidth settings for later
* replay purpose (restore) after reset.
*/
-static enum ice_status
+static int
ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u32 bw)
{
@@ -4666,12 +4666,14 @@ ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
*
* This function configures bandwidth limit of TC node.
*/
-static enum ice_status
+static int
ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u32 bw)
{
- enum ice_status status = ICE_ERR_PARAM;
+ struct ice_aqc_txsched_elem_data buf;
+ struct ice_aqc_txsched_elem *data;
struct ice_sched_node *tc_node;
+ int status = ICE_ERR_PARAM;
if (tc >= ICE_MAX_TRAFFIC_CLASS)
return status;
@@ -4701,7 +4703,7 @@ ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
* This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
-enum ice_status
+int
ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u32 bw)
{
@@ -4716,7 +4718,7 @@ ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
*
* This function configures BW default limit of TC node.
*/
-enum ice_status
+int
ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type)
{
@@ -4732,7 +4734,7 @@ ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
*
* Save BW alloc information of VSI type node for post replay use.
*/
-static enum ice_status
+static int
ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u16 bw_alloc)
{
@@ -4764,12 +4766,12 @@ ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
* changed settings for replay purpose, and return success if it succeeds
* in modifying bandwidth alloc setting.
*/
-static enum ice_status
+static int
ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u8 bw_alloc)
{
- enum ice_status status = ICE_ERR_PARAM;
struct ice_sched_node *tc_node;
+ int status = ICE_ERR_PARAM;
if (tc >= ICE_MAX_TRAFFIC_CLASS)
return status;
@@ -4798,7 +4800,7 @@ ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
* This function configures BW limit of TC node.
* Note: The minimum guaranteed reservation is done via DCBX.
*/
-enum ice_status
+int
ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u8 bw_alloc)
{
@@ -4814,11 +4816,11 @@ ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
* and sets node's BW limit to default. This function needs to be
* called with the scheduler lock held.
*/
-enum ice_status
+int
ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
{
struct ice_vsi_ctx *vsi_ctx;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 tc;
if (!ice_is_vsi_valid(pi->hw, vsi_handle))
@@ -4930,13 +4932,13 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
* This function sets BW limit of VSI or Aggregator scheduling node
* based on TC information from passed in argument BW.
*/
-enum ice_status
+int
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
enum ice_agg_type agg_type, u8 tc,
enum ice_rl_type rl_type, u32 bw)
{
- enum ice_status status = ICE_ERR_PARAM;
struct ice_sched_node *node;
+ int status = ICE_ERR_PARAM;
if (!pi)
return status;
@@ -4969,7 +4971,7 @@ ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
* different than the VSI node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
{
u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
@@ -4982,7 +4984,7 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
ice_for_each_traffic_class(tc) {
struct ice_sched_node *tc_node, *vsi_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
- enum ice_status status;
+ int status;
tc_node = ice_sched_get_tc_node(pi, tc);
if (!tc_node)
@@ -5024,12 +5026,12 @@ ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
* class, and saves those value for later use for replaying purposes. The
* caller holds the scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_set_save_vsi_srl_node_bw(struct ice_port_info *pi, u16 vsi_handle,
u8 tc, struct ice_sched_node *srl_node,
enum ice_rl_type rl_type, u32 bw)
{
- enum ice_status status;
+ int status;
if (bw == ICE_SCHED_DFLT_BW) {
status = ice_sched_set_node_bw_dflt_lmt(pi, srl_node, rl_type);
@@ -5056,13 +5058,13 @@ ice_sched_set_save_vsi_srl_node_bw(struct ice_port_info *pi, u16 vsi_handle,
* is passed, it removes the corresponding bw from the node. The caller
* holds scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_set_vsi_node_srl_per_tc(struct ice_port_info *pi, u16 vsi_handle,
u8 tc, u32 min_bw, u32 max_bw, u32 shared_bw)
{
struct ice_sched_node *tc_node, *vsi_node, *cfg_node;
- enum ice_status status;
u8 layer_num;
+ int status;
tc_node = ice_sched_get_tc_node(pi, tc);
if (!tc_node)
@@ -5110,11 +5112,11 @@ ice_sched_set_vsi_node_srl_per_tc(struct ice_port_info *pi, u16 vsi_handle,
* classes for VSI matching handle. When BW value of ICE_SCHED_DFLT_BW is
* passed, it removes those value(s) from the node.
*/
-enum ice_status
+int
ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
u32 min_bw, u32 max_bw, u32 shared_bw)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 tc;
if (!pi)
@@ -5160,13 +5162,13 @@ ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
* different than the AGG node layer on all TC(s).This function needs to be
* called with scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
{
u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
struct ice_sched_agg_info *agg_info;
bool agg_id_present = false;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 tc;
LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
@@ -5215,13 +5217,13 @@ ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
*
* This function validates aggregator id. Caller holds the scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_validate_agg_id(struct ice_port_info *pi, u32 agg_id)
{
struct ice_sched_agg_info *agg_info;
struct ice_sched_agg_info *tmp;
bool agg_id_present = false;
- enum ice_status status;
+ int status;
status = ice_sched_validate_agg_srl_node(pi, agg_id);
if (status)
@@ -5253,12 +5255,12 @@ ice_sched_validate_agg_id(struct ice_port_info *pi, u32 agg_id)
* requested traffic class, and saves those value for later use for
* replaying purposes. The caller holds the scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_set_save_agg_srl_node_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
struct ice_sched_node *srl_node,
enum ice_rl_type rl_type, u32 bw)
{
- enum ice_status status;
+ int status;
if (bw == ICE_SCHED_DFLT_BW) {
status = ice_sched_set_node_bw_dflt_lmt(pi, srl_node, rl_type);
@@ -5285,13 +5287,13 @@ ice_sched_set_save_agg_srl_node_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
* value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the node. Caller
* holds the scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_set_agg_node_srl_per_tc(struct ice_port_info *pi, u32 agg_id,
u8 tc, u32 min_bw, u32 max_bw, u32 shared_bw)
{
struct ice_sched_node *tc_node, *agg_node, *cfg_node;
enum ice_rl_type rl_type = ICE_SHARED_BW;
- enum ice_status status = ICE_ERR_CFG;
+ int status = ICE_ERR_CFG;
u8 layer_num;
tc_node = ice_sched_get_tc_node(pi, tc);
@@ -5340,11 +5342,11 @@ ice_sched_set_agg_node_srl_per_tc(struct ice_port_info *pi, u32 agg_id,
* BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
* node(s).
*/
-enum ice_status
+int
ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id,
u32 min_bw, u32 max_bw, u32 shared_bw)
{
- enum ice_status status;
+ int status;
u8 tc;
if (!pi)
@@ -5392,12 +5394,12 @@ ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id,
* node for a given traffic class for aggregator matching agg_id. When BW
* value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the node.
*/
-enum ice_status
+int
ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
u8 tc, u32 min_bw, u32 max_bw,
u32 shared_bw)
{
- enum ice_status status;
+ int status;
if (!pi)
return ICE_ERR_PARAM;
@@ -5423,14 +5425,14 @@ ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
* This function configures node element's sibling priority only. This
* function needs to be called with scheduler lock held.
*/
-enum ice_status
+int
ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
struct ice_sched_node *node, u8 priority)
{
struct ice_aqc_txsched_elem_data buf;
struct ice_aqc_txsched_elem *data;
struct ice_hw *hw = pi->hw;
- enum ice_status status;
+ int status;
if (!hw)
return ICE_ERR_PARAM;
@@ -5456,7 +5458,7 @@ ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
* burst size value is used for future rate limit calls. It doesn't change the
* existing or previously created RL profiles.
*/
-enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
+int ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
{
u16 burst_size_to_prog;
@@ -5497,13 +5499,13 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
* This function configures node element's priority value. It
* needs to be called with scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
u8 priority)
{
struct ice_aqc_txsched_elem_data buf;
struct ice_aqc_txsched_elem *data;
- enum ice_status status;
+ int status;
buf = node->info;
data = &buf.data;
@@ -5524,12 +5526,12 @@ ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
* This function restores node's BW from bw_t_info. The caller needs
* to hold the scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
struct ice_bw_type_info *bw_t_info)
{
struct ice_port_info *pi = hw->port_info;
- enum ice_status status = ICE_ERR_PARAM;
+ int status = ICE_ERR_PARAM;
u16 bw_alloc;
if (!node)
@@ -5582,11 +5584,11 @@ ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
* This function re-creates aggregator type nodes. The caller needs to hold
* the scheduler lock.
*/
-static enum ice_status
+static int
ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
{
struct ice_sched_node *tc_node, *agg_node;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 tc;
if (!agg_info)
@@ -5659,7 +5661,7 @@ void ice_sched_replay_agg(struct ice_hw *hw)
ICE_MAX_TRAFFIC_CLASS)) {
ice_declare_bitmap(replay_bitmap,
ICE_MAX_TRAFFIC_CLASS);
- enum ice_status status;
+ int status;
ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
ice_sched_get_ena_tc_bitmap(pi,
@@ -5715,9 +5717,9 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
*
* Replay root node BW settings.
*/
-enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi)
+int ice_sched_replay_root_node_bw(struct ice_port_info *pi)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (!pi->hw)
return ICE_ERR_PARAM;
@@ -5735,9 +5737,9 @@ enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi)
*
* This function replay TC nodes.
*/
-enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
+int ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 tc;
if (!pi->hw)
@@ -5767,7 +5769,7 @@ enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
* This function replays VSI type nodes bandwidth. This function needs to be
* called with scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
ice_bitmap_t *tc_bitmap)
{
@@ -5775,7 +5777,7 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
struct ice_port_info *pi = hw->port_info;
struct ice_bw_type_info *bw_t_info;
struct ice_vsi_ctx *vsi_ctx;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 tc;
vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
@@ -5807,14 +5809,14 @@ ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
* their node bandwidth information. This function needs to be called with
* scheduler lock held.
*/
-static enum ice_status
+static int
ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
{
ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
struct ice_sched_agg_vsi_info *agg_vsi_info;
struct ice_port_info *pi = hw->port_info;
struct ice_sched_agg_info *agg_info;
- enum ice_status status;
+ int status;
ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
if (!ice_is_vsi_valid(hw, vsi_handle))
@@ -5858,10 +5860,10 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
* This function replays association of VSI to aggregator type nodes, and
* node bandwidth information.
*/
-enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
+int ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
{
struct ice_port_info *pi = hw->port_info;
- enum ice_status status;
+ int status;
ice_acquire_lock(&pi->sched_lock);
status = ice_sched_replay_vsi_agg(hw, vsi_handle);
@@ -5877,7 +5879,7 @@ enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
* This function replays queue type node bandwidth. This function needs to be
* called with scheduler lock held.
*/
-enum ice_status
+int
ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
{
struct ice_sched_node *q_node;
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 5b35fd564e..92c3811c7e 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -81,28 +81,28 @@ struct ice_sched_agg_info {
};
/* FW AQ command calls */
-enum ice_status
+int
ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_cfg_node_attr(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_node_attr_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
struct ice_aqc_cfg_l2_node_cgd_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
struct ice_aqc_move_elem *buf, u16 buf_size,
u16 *grps_movd, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
u16 *elems_ret, struct ice_sq_cd *cd);
-enum ice_status ice_sched_init_port(struct ice_port_info *pi);
-enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw);
+int ice_sched_init_port(struct ice_port_info *pi);
+int ice_sched_query_res_alloc(struct ice_hw *hw);
void ice_sched_get_psm_clk_freq(struct ice_hw *hw);
/* Functions to cleanup scheduler SW DB */
@@ -115,7 +115,7 @@ struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid);
struct ice_sched_node *
ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid);
/* Add a scheduling node into SW DB for given info */
-enum ice_status
+int
ice_sched_add_node(struct ice_port_info *pi, u8 layer,
struct ice_aqc_txsched_elem_data *info,
struct ice_sched_node *prealloc_node);
@@ -124,123 +124,123 @@ struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc);
struct ice_sched_node *
ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u8 owner);
-enum ice_status
+int
ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
u8 owner, bool enable);
-enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
+int ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle);
struct ice_sched_node *
ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
u16 vsi_handle);
bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
-enum ice_status
+int
ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
struct ice_sq_cd *cd);
/* Tx scheduler rate limiter functions */
-enum ice_status
+int
ice_cfg_agg(struct ice_port_info *pi, u32 agg_id,
enum ice_agg_type agg_type, u8 tc_bitmap);
-enum ice_status
+int
ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
u8 tc_bitmap);
-enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id);
-enum ice_status
+int ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id);
+int
ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 q_handle, enum ice_rl_type rl_type, u32 bw);
-enum ice_status
+int
ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 q_handle, enum ice_rl_type rl_type);
-enum ice_status
+int
ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u32 bw);
-enum ice_status
+int
ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type);
-enum ice_status
+int
ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
enum ice_rl_type rl_type, u32 bw);
-enum ice_status
+int
ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
enum ice_rl_type rl_type);
-enum ice_status
+int
ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
enum ice_rl_type rl_type, u32 bw);
-enum ice_status
+int
ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
enum ice_rl_type rl_type);
-enum ice_status
+int
ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 min_bw,
u32 max_bw, u32 shared_bw);
-enum ice_status
+int
ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle);
-enum ice_status
+int
ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
u32 max_bw, u32 shared_bw);
-enum ice_status
+int
ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id);
-enum ice_status
+int
ice_cfg_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
u32 min_bw, u32 max_bw, u32 shared_bw);
-enum ice_status
+int
ice_cfg_agg_bw_no_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
u8 tc);
-enum ice_status
+int
ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
u8 *q_prio);
-enum ice_status
+int
ice_sched_cfg_sibl_node_prio_lock(struct ice_port_info *pi,
struct ice_sched_node *node, u8 priority);
-enum ice_status
+int
ice_cfg_q_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
u16 q_handle, enum ice_rl_type rl_type, u32 bw_alloc);
-enum ice_status
+int
ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
enum ice_rl_type rl_type, u8 *bw_alloc);
-enum ice_status
+int
ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
u16 num_vsis, u16 *vsi_handle_arr,
u8 *node_prio, u8 tc);
-enum ice_status
+int
ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
enum ice_rl_type rl_type, u8 *bw_alloc);
bool
ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
struct ice_sched_node *node);
-enum ice_status
+int
ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle);
-enum ice_status
+int
ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
enum ice_agg_type agg_type, u8 tc,
enum ice_rl_type rl_type, u32 bw);
-enum ice_status
+int
ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
u32 min_bw, u32 max_bw, u32 shared_bw);
-enum ice_status
+int
ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 min_bw,
u32 max_bw, u32 shared_bw);
-enum ice_status
+int
ice_sched_set_agg_bw_shared_lmt_per_tc(struct ice_port_info *pi, u32 agg_id,
u8 tc, u32 min_bw, u32 max_bw,
u32 shared_bw);
-enum ice_status
+int
ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
struct ice_sched_node *node, u8 priority);
-enum ice_status
+int
ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
enum ice_rl_type rl_type, u8 bw_alloc);
-enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);
+int ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);
void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);
void ice_sched_replay_agg(struct ice_hw *hw);
-enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi);
-enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
-enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi);
-enum ice_status
+int ice_sched_replay_tc_node_bw(struct ice_port_info *pi);
+int ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
+int ice_sched_replay_root_node_bw(struct ice_port_info *pi);
+int
ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx);
-enum ice_status
+int
ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
enum ice_rl_type rl_type, u32 bw);
-enum ice_status
+int
ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
enum ice_rl_type rl_type, u16 bw_alloc);
#endif /* _ICE_SCHED_H_ */
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index f7fcc3a8d4..ad823edb7e 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2430,7 +2430,7 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid, bool vlan)
* bookkeeping so that we have a current list of all the recipes that are
* programmed in the firmware.
*/
-static enum ice_status
+static int
ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
bool *refresh_required)
{
@@ -2438,7 +2438,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
struct ice_aqc_recipe_data_elem *tmp;
u16 num_recps = ICE_MAX_NUM_RECIPES;
struct ice_prot_lkup_ext *lkup_exts;
- enum ice_status status;
+ int status;
u8 fv_word_idx = 0;
bool vlan = false;
u16 sub_recps;
@@ -2620,7 +2620,7 @@ ice_vsi_uses_fltr(struct ice_fltr_mgmt_list_entry *fm_entry, u16 vsi_handle);
* Allocate memory for the entire recipe table and initialize the structures/
* entries corresponding to basic recipes.
*/
-enum ice_status
+int
ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list)
{
struct ice_sw_recipe *recps;
@@ -2669,14 +2669,14 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list)
* in response buffer. The caller of this function to use *num_elems while
* parsing the response buffer.
*/
-static enum ice_status
+static int
ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp_elem *buf,
u16 buf_size, u16 *req_desc, u16 *num_elems,
struct ice_sq_cd *cd)
{
struct ice_aqc_get_sw_cfg *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_sw_cfg);
cmd = &desc.params.get_sw_conf;
@@ -2697,10 +2697,10 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp_elem *buf,
* @shared_res: true to allocate as a shared resource and false to allocate as a dedicated resource
* @global_lut_id: output parameter for the RSS global LUT's ID
*/
-enum ice_status ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id)
+int ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id)
{
struct ice_aqc_alloc_free_res_elem *sw_buf;
- enum ice_status status;
+ int status;
u16 buf_len;
buf_len = ice_struct_size(sw_buf, elem, 1);
@@ -2733,12 +2733,12 @@ enum ice_status ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16
* @marker_lg_id: ID of the marker large action to free
* @sw_marker: sw marker to tag the Rx descriptor with
*/
-static enum ice_status
+static int
ice_free_sw_marker_lg(struct ice_hw *hw, u16 marker_lg_id, u32 sw_marker)
{
struct ice_aqc_alloc_free_res_elem *sw_buf;
u16 buf_len, num_elems = 1;
- enum ice_status status;
+ int status;
buf_len = ice_struct_size(sw_buf, elem, num_elems);
sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
@@ -2768,11 +2768,11 @@ ice_free_sw_marker_lg(struct ice_hw *hw, u16 marker_lg_id, u32 sw_marker)
* @hw: pointer to the HW struct
* @global_lut_id: ID of the RSS global LUT to free
*/
-enum ice_status ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id)
+int ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id)
{
struct ice_aqc_alloc_free_res_elem *sw_buf;
u16 buf_len, num_elems = 1;
- enum ice_status status;
+ int status;
buf_len = ice_struct_size(sw_buf, elem, num_elems);
sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
@@ -2802,13 +2802,13 @@ enum ice_status ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id)
*
* allocates switch resources (SWID and VEB counter) (0x0208)
*/
-enum ice_status
+int
ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
u16 *counter_id)
{
struct ice_aqc_alloc_free_res_elem *sw_buf;
struct ice_aqc_res_elem *sw_ele;
- enum ice_status status;
+ int status;
u16 buf_len;
buf_len = ice_struct_size(sw_buf, elem, 1);
@@ -2886,10 +2886,10 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
* releasing other resources even after it encounters error.
* The error code returned is the last error it encountered.
*/
-enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
+int ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
{
struct ice_aqc_alloc_free_res_elem *sw_buf, *counter_buf;
- enum ice_status status, ret_status;
+ int status, ret_status;
u16 buf_len;
buf_len = ice_struct_size(sw_buf, elem, 1);
@@ -2948,14 +2948,14 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
*
* Add a VSI context to the hardware (0x0210)
*/
-enum ice_status
+int
ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
struct ice_aqc_add_update_free_vsi_resp *res;
struct ice_aqc_add_get_update_free_vsi *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.vsi_cmd;
res = &desc.params.add_update_free_vsi_res;
@@ -2991,14 +2991,14 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Free VSI context info from hardware (0x0213)
*/
-enum ice_status
+int
ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd)
{
struct ice_aqc_add_update_free_vsi_resp *resp;
struct ice_aqc_add_get_update_free_vsi *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.vsi_cmd;
resp = &desc.params.add_update_free_vsi_res;
@@ -3026,14 +3026,14 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Update VSI context in the hardware (0x0211)
*/
-enum ice_status
+int
ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
struct ice_aqc_add_update_free_vsi_resp *resp;
struct ice_aqc_add_get_update_free_vsi *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.vsi_cmd;
resp = &desc.params.add_update_free_vsi_res;
@@ -3169,12 +3169,12 @@ void ice_clear_all_vsi_ctx(struct ice_hw *hw)
* If this function gets called after reset for existing VSIs then update
* with the new HW VSI number in the corresponding VSI handle list entry.
*/
-enum ice_status
+int
ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
struct ice_vsi_ctx *tmp_vsi_ctx;
- enum ice_status status;
+ int status;
if (vsi_handle >= ICE_MAX_VSI)
return ICE_ERR_PARAM;
@@ -3211,11 +3211,11 @@ ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
*
* Free VSI context info from hardware as well as from VSI handle list
*/
-enum ice_status
+int
ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd)
{
- enum ice_status status;
+ int status;
if (!ice_is_vsi_valid(hw, vsi_handle))
return ICE_ERR_PARAM;
@@ -3235,7 +3235,7 @@ ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
*
* Update VSI context in the hardware
*/
-enum ice_status
+int
ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
@@ -3253,14 +3253,14 @@ ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
*
* Get VSI context info from hardware (0x0212)
*/
-enum ice_status
+int
ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd)
{
struct ice_aqc_add_get_update_free_vsi *cmd;
struct ice_aqc_get_vsi_resp *resp;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
cmd = &desc.params.vsi_cmd;
resp = &desc.params.get_vsi_resp;
@@ -3293,14 +3293,14 @@ ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
*
* Add/Update Mirror Rule (0x260).
*/
-enum ice_status
+int
ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
u16 count, struct ice_mir_rule_buf *mr_buf,
struct ice_sq_cd *cd, u16 *rule_id)
{
struct ice_aqc_add_update_mir_rule *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
__le16 *mr_list = NULL;
u16 buf_size = 0;
@@ -3391,7 +3391,7 @@ ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
*
* Delete Mirror Rule (0x261).
*/
-enum ice_status
+int
ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
struct ice_sq_cd *cd)
{
@@ -3423,14 +3423,14 @@ ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
*
* allocates or free a VSI list resource
*/
-static enum ice_status
+static int
ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
enum ice_sw_lkup_type lkup_type,
enum ice_adminq_opc opc)
{
struct ice_aqc_alloc_free_res_elem *sw_buf;
struct ice_aqc_res_elem *vsi_ele;
- enum ice_status status;
+ int status;
u16 buf_len;
buf_len = ice_struct_size(sw_buf, elem, 1);
@@ -3482,7 +3482,7 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
*
* Sets the storm control configuration (0x0280)
*/
-enum ice_status
+int
ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
u32 ctl_bitmask)
{
@@ -3509,11 +3509,11 @@ ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
*
* Gets the storm control configuration (0x0281)
*/
-enum ice_status
+int
ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
u32 *ctl_bitmask)
{
- enum ice_status status;
+ int status;
struct ice_aq_desc desc;
ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_storm_cfg);
@@ -3546,12 +3546,12 @@ ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
*
* Add(0x02a0)/Update(0x02a1)/Remove(0x02a2) switch rules commands to firmware
*/
-static enum ice_status
+static int
ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,
u8 num_rules, enum ice_adminq_opc opc, struct ice_sq_cd *cd)
{
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -3582,7 +3582,7 @@ ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,
*
* Add(0x0290)
*/
-enum ice_status
+int
ice_aq_add_recipe(struct ice_hw *hw,
struct ice_aqc_recipe_data_elem *s_recipe_list,
u16 num_recipes, struct ice_sq_cd *cd)
@@ -3620,14 +3620,14 @@ ice_aq_add_recipe(struct ice_hw *hw,
* The caller must supply enough space in s_recipe_list to hold all possible
* recipes and *num_recipes must equal ICE_MAX_NUM_RECIPES.
*/
-enum ice_status
+int
ice_aq_get_recipe(struct ice_hw *hw,
struct ice_aqc_recipe_data_elem *s_recipe_list,
u16 *num_recipes, u16 recipe_root, struct ice_sq_cd *cd)
{
struct ice_aqc_add_get_recipe *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
u16 buf_size;
if (*num_recipes != ICE_MAX_NUM_RECIPES)
@@ -3661,13 +3661,13 @@ ice_aq_get_recipe(struct ice_hw *hw,
* mask if it's valid at the lkup_idx. Finally, use the add recipe AQ to update
* the pre-existing recipe with the modifications.
*/
-enum ice_status
+int
ice_update_recipe_lkup_idx(struct ice_hw *hw,
struct ice_update_recipe_lkup_idx_params *params)
{
struct ice_aqc_recipe_data_elem *rcp_list;
u16 num_recps = ICE_MAX_NUM_RECIPES;
- enum ice_status status;
+ int status;
rcp_list = (struct ice_aqc_recipe_data_elem *)ice_malloc(hw, num_recps * sizeof(*rcp_list));
if (!rcp_list)
@@ -3714,7 +3714,7 @@ ice_update_recipe_lkup_idx(struct ice_hw *hw,
* @cd: pointer to command details structure or NULL
* Recipe to profile association (0x0291)
*/
-enum ice_status
+int
ice_aq_map_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u8 *r_bitmap,
struct ice_sq_cd *cd)
{
@@ -3742,13 +3742,13 @@ ice_aq_map_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u8 *r_bitmap,
* @cd: pointer to command details structure or NULL
* Associate profile ID with given recipe (0x0293)
*/
-enum ice_status
+int
ice_aq_get_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u8 *r_bitmap,
struct ice_sq_cd *cd)
{
struct ice_aqc_recipe_to_profile *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
cmd = &desc.params.recipe_to_profile;
@@ -3768,10 +3768,10 @@ ice_aq_get_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u8 *r_bitmap,
* @hw: pointer to the hardware structure
* @rid: recipe ID returned as response to AQ call
*/
-enum ice_status ice_alloc_recipe(struct ice_hw *hw, u16 *rid)
+int ice_alloc_recipe(struct ice_hw *hw, u16 *rid)
{
struct ice_aqc_alloc_free_res_elem *sw_buf;
- enum ice_status status;
+ int status;
u16 buf_len;
buf_len = ice_struct_size(sw_buf, elem, 1);
@@ -3820,10 +3820,10 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type,
/* ice_get_initial_sw_cfg - Get initial port and default VSI data
* @hw: pointer to the hardware structure
*/
-enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
+int ice_get_initial_sw_cfg(struct ice_hw *hw)
{
struct ice_aqc_get_sw_cfg_resp_elem *rbuf;
- enum ice_status status;
+ int status;
u8 num_total_ports;
u16 req_desc = 0;
u16 num_elems;
@@ -4112,7 +4112,7 @@ ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,
* Create a large action to hold software marker and update the switch rule
* entry pointed by m_ent with newly created large action
*/
-static enum ice_status
+static int
ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
u16 sw_marker, u16 l_id)
{
@@ -4123,7 +4123,7 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
* 3. GENERIC VALUE action to hold the software marker ID
*/
const u16 num_lg_acts = 3;
- enum ice_status status;
+ int status;
u16 lg_act_size;
u16 rules_size;
u32 act;
@@ -4213,13 +4213,13 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
* @counter_id: VLAN counter ID returned as part of allocate resource
* @l_id: large action resource ID
*/
-static enum ice_status
+static int
ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
u16 counter_id, u16 l_id)
{
struct ice_aqc_sw_rules_elem *lg_act;
struct ice_aqc_sw_rules_elem *rx_tx;
- enum ice_status status;
+ int status;
/* 2 actions will be added while adding a large action counter */
const int num_acts = 2;
u16 lg_act_size;
@@ -4338,13 +4338,13 @@ ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
* Call AQ command to add a new switch rule or update existing switch rule
* using the given VSI list ID
*/
-static enum ice_status
+static int
ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
u16 vsi_list_id, bool remove, enum ice_adminq_opc opc,
enum ice_sw_lkup_type lkup_type)
{
struct ice_aqc_sw_rules_elem *s_rule;
- enum ice_status status;
+ int status;
u16 s_rule_size;
u16 rule_type;
int i;
@@ -4401,11 +4401,11 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
* @vsi_list_id: stores the ID of the VSI list to be created
* @lkup_type: switch rule filter's lookup type
*/
-static enum ice_status
+static int
ice_create_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
u16 *vsi_list_id, enum ice_sw_lkup_type lkup_type)
{
- enum ice_status status;
+ int status;
status = ice_aq_alloc_free_vsi_list(hw, vsi_list_id, lkup_type,
ice_aqc_opc_alloc_res);
@@ -4428,13 +4428,13 @@ ice_create_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,
* to the corresponding filter management list to track this switch rule
* and VSI mapping
*/
-static enum ice_status
+static int
ice_create_pkt_fwd_rule(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
struct ice_fltr_list_entry *f_entry)
{
struct ice_fltr_mgmt_list_entry *fm_entry;
struct ice_aqc_sw_rules_elem *s_rule;
- enum ice_status status;
+ int status;
s_rule = (struct ice_aqc_sw_rules_elem *)
ice_malloc(hw, ICE_SW_RULE_RX_TX_ETH_HDR_SIZE);
@@ -4488,11 +4488,11 @@ ice_create_pkt_fwd_rule(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
* Call AQ command to update a previously created switch rule with a
* VSI list ID
*/
-static enum ice_status
+static int
ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
{
struct ice_aqc_sw_rules_elem *s_rule;
- enum ice_status status;
+ int status;
s_rule = (struct ice_aqc_sw_rules_elem *)
ice_malloc(hw, ICE_SW_RULE_RX_TX_ETH_HDR_SIZE);
@@ -4517,10 +4517,10 @@ ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
*
* Updates unicast switch filter rules based on VEB/VEPA mode
*/
-enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw)
+int ice_update_sw_rule_bridge_mode(struct ice_hw *hw)
{
struct ice_fltr_mgmt_list_entry *fm_entry;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct LIST_HEAD_TYPE *rule_head;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
struct ice_switch_info *sw;
@@ -4575,13 +4575,13 @@ enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw)
* Add the new VSI to the previously created VSI list set
* using the update switch rule command
*/
-static enum ice_status
+static int
ice_add_update_vsi_list(struct ice_hw *hw,
struct ice_fltr_mgmt_list_entry *m_entry,
struct ice_fltr_info *cur_fltr,
struct ice_fltr_info *new_fltr)
{
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u16 vsi_list_id = 0;
if ((cur_fltr->fltr_act == ICE_FWD_TO_Q ||
@@ -4760,14 +4760,14 @@ ice_find_vsi_list_entry(struct ice_sw_recipe *recp_list, u16 vsi_handle,
*
* Adds or updates the rule lists for a given recipe
*/
-static enum ice_status
+static int
ice_add_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
u8 lport, struct ice_fltr_list_entry *f_entry)
{
struct ice_fltr_info *new_fltr, *cur_fltr;
struct ice_fltr_mgmt_list_entry *m_entry;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (!ice_is_vsi_valid(hw, f_entry->fltr_info.vsi_handle))
return ICE_ERR_PARAM;
@@ -4810,7 +4810,7 @@ ice_add_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
* The VSI list should be emptied before this function is called to remove the
* VSI list.
*/
-static enum ice_status
+static int
ice_remove_vsi_list_rule(struct ice_hw *hw, u16 vsi_list_id,
enum ice_sw_lkup_type lkup_type)
{
@@ -4828,12 +4828,12 @@ ice_remove_vsi_list_rule(struct ice_hw *hw, u16 vsi_list_id,
* @fm_list: filter management entry for which the VSI list management needs to
* be done
*/
-static enum ice_status
+static int
ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
struct ice_fltr_mgmt_list_entry *fm_list)
{
enum ice_sw_lkup_type lkup_type;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u16 vsi_list_id;
if (fm_list->fltr_info.fltr_act != ICE_FWD_TO_VSI_LIST ||
@@ -4916,13 +4916,13 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
* @recp_list: recipe list for which the rule needs to removed
* @f_entry: rule entry containing filter information
*/
-static enum ice_status
+static int
ice_remove_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
struct ice_fltr_list_entry *f_entry)
{
struct ice_fltr_mgmt_list_entry *list_elem;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
bool remove_rule = false;
u16 vsi_handle;
@@ -5012,14 +5012,14 @@ ice_remove_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
* information for all resource types. Each resource type is an
* ice_aqc_get_res_resp_elem structure.
*/
-enum ice_status
+int
ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,
struct ice_sq_cd *cd)
{
struct ice_aqc_get_res_alloc *resp;
- enum ice_status status;
struct ice_aq_desc desc;
+ int status;
if (!buf)
return ICE_ERR_BAD_PTR;
@@ -5049,14 +5049,14 @@ ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
* @desc_id: input - first desc ID to start; output - next desc ID
* @cd: pointer to command details structure or NULL
*/
-enum ice_status
+int
ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,
bool res_shared, u16 *desc_id, struct ice_sq_cd *cd)
{
struct ice_aqc_get_allocd_res_desc *cmd;
struct ice_aq_desc desc;
- enum ice_status status;
+ int status;
ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -5095,7 +5095,7 @@ ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
* check for duplicates in this case, removing duplicates from a given
* list should be taken care of in the caller of this function.
*/
-static enum ice_status
+static int
ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
struct ice_switch_info *sw, u8 lport)
{
@@ -5105,7 +5105,7 @@ ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
struct LIST_HEAD_TYPE *rule_head;
u16 total_elem_left, s_rule_size;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u16 num_unicast = 0;
u8 elem_sent;
@@ -5246,7 +5246,7 @@ ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
*
* Function add MAC rule for logical port from HW struct
*/
-enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
+int ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
{
if (!m_list || !hw)
return ICE_ERR_PARAM;
@@ -5261,7 +5261,7 @@ enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
* @recp_list: recipe list for which rule has to be added
* @f_entry: filter entry containing one VLAN information
*/
-static enum ice_status
+static int
ice_add_vlan_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
struct ice_fltr_list_entry *f_entry)
{
@@ -5270,7 +5270,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
enum ice_sw_lkup_type lkup_type;
u16 vsi_list_id = 0, vsi_handle;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (!ice_is_vsi_valid(hw, f_entry->fltr_info.vsi_handle))
return ICE_ERR_PARAM;
@@ -5415,7 +5415,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
* @v_list: list of VLAN entries and forwarding information
* @sw: pointer to switch info struct for which function add rule
*/
-static enum ice_status
+static int
ice_add_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,
struct ice_switch_info *sw)
{
@@ -5443,7 +5443,7 @@ ice_add_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,
*
* Function add VLAN rule for logical port from HW struct
*/
-enum ice_status ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
+int ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
{
if (!v_list || !hw)
return ICE_ERR_PARAM;
@@ -5463,7 +5463,7 @@ enum ice_status ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
* sure to add a VLAN only filter on the same VSI. Packets belonging to that
* VLAN won't be received on that VSI otherwise.
*/
-static enum ice_status
+static int
ice_add_mac_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list,
struct ice_switch_info *sw, u8 lport)
{
@@ -5498,7 +5498,7 @@ ice_add_mac_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list,
*
* Function add MAC VLAN rule for logical port from HW struct
*/
-enum ice_status
+int
ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list)
{
if (!mv_list || !hw)
@@ -5519,7 +5519,7 @@ ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list)
* the filter list with the necessary fields (including flags to
* indicate Tx or Rx rules).
*/
-static enum ice_status
+static int
ice_add_eth_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list,
struct ice_switch_info *sw, u8 lport)
{
@@ -5553,7 +5553,7 @@ ice_add_eth_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list,
*
* Function add ethertype rule for logical port from HW struct
*/
-enum ice_status
+int
ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
{
if (!em_list || !hw)
@@ -5569,7 +5569,7 @@ ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
* @em_list: list of ethertype or ethertype MAC entries
* @sw: pointer to switch info struct for which function add rule
*/
-static enum ice_status
+static int
ice_remove_eth_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list,
struct ice_switch_info *sw)
{
@@ -5601,7 +5601,7 @@ ice_remove_eth_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list,
* @em_list: list of ethertype and forwarding information
*
*/
-enum ice_status
+int
ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
{
if (!em_list || !hw)
@@ -5618,7 +5618,7 @@ ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
* Get resource type for a large action depending on the number
* of single actions that it contains.
*/
-static enum ice_status
+static int
ice_get_lg_act_aqc_res_type(u16 *res_type, int num_acts)
{
if (!res_type)
@@ -5654,11 +5654,11 @@ ice_get_lg_act_aqc_res_type(u16 *res_type, int num_acts)
* @l_id: large action ID to fill it in
* @num_acts: number of actions to hold with a large action entry
*/
-static enum ice_status
+static int
ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)
{
struct ice_aqc_alloc_free_res_elem *sw_buf;
- enum ice_status status;
+ int status;
u16 buf_len, res_type;
if (!l_id)
@@ -5762,7 +5762,7 @@ void ice_rem_all_sw_rules_info(struct ice_hw *hw)
* add filter rule to set/unset given VSI as default VSI for the switch
* (represented by swid)
*/
-enum ice_status
+int
ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,
u8 direction)
{
@@ -5770,9 +5770,10 @@ ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,
struct ice_sw_recipe *recp_list;
struct ice_fltr_info f_info;
struct ice_hw *hw = pi->hw;
- enum ice_status status;
u8 lport = pi->lport;
u16 hw_vsi_id;
+ int status;
+
recp_list = &pi->hw->switch_info->recp_list[ICE_SW_LKUP_DFLT];
if (!ice_is_vsi_valid(hw, vsi_handle))
@@ -5888,7 +5889,7 @@ ice_find_ucast_rule_entry(struct LIST_HEAD_TYPE *list_head,
* the entries passed into m_list were added previously. It will not attempt to
* do a partial remove of entries that were found.
*/
-static enum ice_status
+static int
ice_remove_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
struct ice_sw_recipe *recp_list)
{
@@ -5941,7 +5942,7 @@ ice_remove_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
* @m_list: list of MAC addresses and forwarding information
*
*/
-enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
+int ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
{
struct ice_sw_recipe *recp_list;
@@ -5955,7 +5956,7 @@ enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
* @v_list: list of VLAN entries and forwarding information
* @recp_list: list from which function remove VLAN
*/
-static enum ice_status
+static int
ice_remove_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,
struct ice_sw_recipe *recp_list)
{
@@ -5981,7 +5982,7 @@ ice_remove_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,
* @v_list: list of VLAN and forwarding information
*
*/
-enum ice_status
+int
ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
{
struct ice_sw_recipe *recp_list;
@@ -5999,7 +6000,7 @@ ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
* @v_list: list of MAC VLAN entries and forwarding information
* @recp_list: list from which function remove MAC VLAN
*/
-static enum ice_status
+static int
ice_remove_mac_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,
struct ice_sw_recipe *recp_list)
{
@@ -6026,7 +6027,7 @@ ice_remove_mac_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,
* @hw: pointer to the hardware structure
* @mv_list: list of MAC VLAN and forwarding information
*/
-enum ice_status
+int
ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *mv_list)
{
struct ice_sw_recipe *recp_list;
@@ -6067,7 +6068,7 @@ ice_vsi_uses_fltr(struct ice_fltr_mgmt_list_entry *fm_entry, u16 vsi_handle)
* fltr_info.fwd_id fields. These are set such that later logic can
* extract which VSI to remove the fltr from, and pass on that information.
*/
-static enum ice_status
+static int
ice_add_entry_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,
struct LIST_HEAD_TYPE *vsi_list_head,
struct ice_fltr_info *fi)
@@ -6110,13 +6111,13 @@ ice_add_entry_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,
* Note that this means all entries in vsi_list_head must be explicitly
* deallocated by the caller when done with list.
*/
-static enum ice_status
+static int
ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,
struct LIST_HEAD_TYPE *lkup_list_head,
struct LIST_HEAD_TYPE *vsi_list_head)
{
struct ice_fltr_mgmt_list_entry *fm_entry;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
/* check to make sure VSI ID is valid and within boundary */
if (!ice_is_vsi_valid(hw, vsi_handle))
@@ -6178,7 +6179,7 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
* @sw: pointer to switch info struct for which function add rule
* @lkup: switch rule filter lookup type
*/
-static enum ice_status
+static int
_ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
u16 *vid, struct ice_switch_info *sw,
enum ice_sw_lkup_type lkup)
@@ -6219,7 +6220,7 @@ _ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
* @promisc_mask: pointer to mask to be filled in
* @vid: VLAN ID of promisc VLAN VSI
*/
-enum ice_status
+int
ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
u16 *vid)
{
@@ -6234,7 +6235,7 @@ ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
* @promisc_mask: pointer to mask to be filled in
* @vid: VLAN ID of promisc VLAN VSI
*/
-enum ice_status
+int
ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
u16 *vid)
{
@@ -6249,7 +6250,7 @@ ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
* @recp_id: recipe ID for which the rule needs to removed
* @v_list: list of promisc entries
*/
-static enum ice_status
+static int
ice_remove_promisc(struct ice_hw *hw, u8 recp_id,
struct LIST_HEAD_TYPE *v_list)
{
@@ -6275,7 +6276,7 @@ ice_remove_promisc(struct ice_hw *hw, u8 recp_id,
* @vid: VLAN ID to clear VLAN promiscuous
* @sw: pointer to switch info struct for which function add rule
*/
-static enum ice_status
+static int
_ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
u16 vid, struct ice_switch_info *sw)
{
@@ -6284,7 +6285,7 @@ _ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
struct ice_fltr_mgmt_list_entry *itr;
struct LIST_HEAD_TYPE *rule_head;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 recipe_id;
if (!ice_is_vsi_valid(hw, vsi_handle))
@@ -6349,7 +6350,7 @@ _ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
* @promisc_mask: mask of promiscuous config bits to clear
* @vid: VLAN ID to clear VLAN promiscuous
*/
-enum ice_status
+int
ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,
u8 promisc_mask, u16 vid)
{
@@ -6366,14 +6367,14 @@ ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,
* @lport: logical port number to configure promisc mode
* @sw: pointer to switch info struct for which function add rule
*/
-static enum ice_status
+static int
_ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
u16 vid, u8 lport, struct ice_switch_info *sw)
{
enum { UCAST_FLTR = 1, MCAST_FLTR, BCAST_FLTR };
struct ice_fltr_list_entry f_list_entry;
struct ice_fltr_info new_fltr;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
bool is_tx_fltr;
u16 hw_vsi_id;
int pkt_type;
@@ -6485,7 +6486,7 @@ _ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
* @promisc_mask: mask of promiscuous config bits
* @vid: VLAN ID to set VLAN promiscuous
*/
-enum ice_status
+int
ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
u16 vid)
{
@@ -6505,7 +6506,7 @@ ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
*
* Configure VSI with all associated VLANs to given promiscuous mode(s)
*/
-static enum ice_status
+static int
_ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
bool rm_vlan_promisc, u8 lport,
struct ice_switch_info *sw)
@@ -6514,7 +6515,7 @@ _ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
struct LIST_HEAD_TYPE vsi_list_head;
struct LIST_HEAD_TYPE *vlan_head;
struct ice_lock *vlan_lock; /* Lock to protect filter rule list */
- enum ice_status status;
+ int status;
u16 vlan_id;
INIT_LIST_HEAD(&vsi_list_head);
@@ -6567,7 +6568,7 @@ _ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
*
* Configure VSI with all associated VLANs to given promiscuous mode(s)
*/
-enum ice_status
+int
ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
bool rm_vlan_promisc)
{
@@ -6593,7 +6594,7 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,
struct LIST_HEAD_TYPE *rule_head;
struct ice_fltr_list_entry *tmp;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
- enum ice_status status;
+ int status;
INIT_LIST_HEAD(&remove_list_head);
rule_lock = &recp_list[lkup].filt_rule_lock;
@@ -6687,12 +6688,12 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)
* @num_items: number of entries requested for FD resource type
* @counter_id: counter index returned by AQ call
*/
-enum ice_status
+int
ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
u16 *counter_id)
{
struct ice_aqc_alloc_free_res_elem *buf;
- enum ice_status status;
+ int status;
u16 buf_len;
/* Allocate resource */
@@ -6725,12 +6726,12 @@ ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
* @num_items: number of entries to be freed for FD resource type
* @counter_id: counter ID resource which needs to be freed
*/
-enum ice_status
+int
ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
u16 counter_id)
{
struct ice_aqc_alloc_free_res_elem *buf;
- enum ice_status status;
+ int status;
u16 buf_len;
/* Free resource */
@@ -6758,7 +6759,7 @@ ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
* @hw: pointer to the hardware structure
* @counter_id: returns counter index
*/
-enum ice_status ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id)
+int ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id)
{
return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
@@ -6770,7 +6771,7 @@ enum ice_status ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id)
* @hw: pointer to the hardware structure
* @counter_id: counter index to be freed
*/
-enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
+int ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
{
return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,
ICE_AQC_RES_TYPE_FLAG_DEDICATED, 1,
@@ -6783,7 +6784,7 @@ enum ice_status ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)
* @f_info: filter info structure containing the MAC filter information
* @sw_marker: sw marker to tag the Rx descriptor with
*/
-enum ice_status
+int
ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
u16 sw_marker)
{
@@ -6792,9 +6793,9 @@ ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
struct ice_sw_recipe *recp_list;
struct LIST_HEAD_TYPE l_head;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
- enum ice_status ret;
bool entry_exists;
u16 lg_act_id;
+ int ret;
if (f_info->fltr_act != ICE_FWD_TO_VSI)
return ICE_ERR_PARAM;
@@ -6879,7 +6880,7 @@ ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
* @f_info: pointer to filter info structure containing the MAC filter
* information
*/
-enum ice_status
+int
ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
{
struct ice_fltr_mgmt_list_entry *m_entry;
@@ -6887,10 +6888,10 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)
struct ice_sw_recipe *recp_list;
struct LIST_HEAD_TYPE l_head;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
- enum ice_status ret;
bool entry_exist;
u16 counter_id;
u16 lg_act_id;
+ int ret;
if (f_info->fltr_act != ICE_FWD_TO_VSI)
return ICE_ERR_PARAM;
@@ -7214,7 +7215,7 @@ ice_fill_valid_words(struct ice_adv_lkup_elem *rule,
* and start grouping them in 4-word groups. Each group makes up one
* recipe.
*/
-static enum ice_status
+static int
ice_create_first_fit_recp_def(struct ice_hw *hw,
struct ice_prot_lkup_ext *lkup_exts,
struct LIST_HEAD_TYPE *rg_list,
@@ -7276,7 +7277,7 @@ ice_create_first_fit_recp_def(struct ice_hw *hw,
* Helper function to fill in the field vector indices for protocol-offset
* pairs. These indexes are then ultimately programmed into a recipe.
*/
-static enum ice_status
+static int
ice_fill_fv_word_index(struct ice_hw *hw, struct LIST_HEAD_TYPE *fv_list,
struct LIST_HEAD_TYPE *rg_list)
{
@@ -7410,7 +7411,7 @@ static void ice_set_recipe_index(unsigned long idx, u8 *bitmap)
* @rm: recipe management list entry
* @profiles: bitmap of profiles that will be associated.
*/
-static enum ice_status
+static int
ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
ice_bitmap_t *profiles)
{
@@ -7418,11 +7419,11 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
struct ice_aqc_recipe_data_elem *tmp;
struct ice_aqc_recipe_data_elem *buf;
struct ice_recp_grp_entry *entry;
- enum ice_status status;
u16 free_res_idx;
u16 recipe_count;
u8 chain_idx;
u8 recps = 0;
+ int status;
/* When more than one recipe are required, another recipe is needed to
* chain them together. Matching a tunnel metadata ID takes up one of
@@ -7709,12 +7710,12 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
* @rm: recipe management list entry
* @lkup_exts: lookup elements
*/
-static enum ice_status
+static int
ice_create_recipe_group(struct ice_hw *hw, struct ice_sw_recipe *rm,
struct ice_prot_lkup_ext *lkup_exts)
{
- enum ice_status status;
u8 recp_count = 0;
+ int status;
rm->n_grp_count = 0;
@@ -7791,7 +7792,7 @@ ice_tun_type_match_word(struct ice_adv_rule_info *rinfo, u16 *off, u16 *mask)
* @lkup_exts: lookup word structure
* @dvm_ena: is double VLAN mode enabled
*/
-static enum ice_status
+static int
ice_add_special_words(struct ice_adv_rule_info *rinfo,
struct ice_prot_lkup_ext *lkup_exts, bool dvm_ena)
{
@@ -8087,7 +8088,7 @@ bool ice_is_prof_rule(enum ice_sw_tunnel_type type)
* @rinfo: other information regarding the rule e.g. priority and action info
* @rid: return the recipe ID of the recipe created
*/
-static enum ice_status
+static int
ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
u16 lkups_cnt, struct ice_adv_rule_info *rinfo, u16 *rid)
{
@@ -8098,9 +8099,9 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
struct ice_sw_fv_list_entry *fvit;
struct ice_recp_grp_entry *r_tmp;
struct ice_sw_fv_list_entry *tmp;
- enum ice_status status = ICE_SUCCESS;
struct ice_sw_recipe *rm;
u8 i;
+ int status = ICE_SUCCESS;
if (!ice_is_prof_rule(rinfo->tun_type) && !lkups_cnt)
return ICE_ERR_PARAM;
@@ -8819,7 +8820,7 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
* @pkt_len: packet length of dummy packet
* @offsets: offset info for the dummy packet
*/
-static enum ice_status
+static int
ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
struct ice_aqc_sw_rules_elem *s_rule,
const u8 *dummy_pkt, u16 pkt_len,
@@ -8949,7 +8950,7 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
* @pkt: dummy packet to fill in
* @offsets: offset info for the dummy packet
*/
-static enum ice_status
+static int
ice_fill_adv_packet_tun(struct ice_hw *hw, enum ice_sw_tunnel_type tun_type,
u8 *pkt, const struct ice_dummy_pkt_offsets *offsets)
{
@@ -8999,7 +9000,7 @@ ice_fill_adv_packet_tun(struct ice_hw *hw, enum ice_sw_tunnel_type tun_type,
* @pkt: dummy packet to fill in
* @offsets: offset info for the dummy packet
*/
-static enum ice_status
+static int
ice_fill_adv_packet_vlan(u16 vlan_type, u8 *pkt,
const struct ice_dummy_pkt_offsets *offsets)
{
@@ -9086,13 +9087,13 @@ ice_find_adv_rule_entry(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
* Add the new VSI to the previously created VSI list set
* using the update switch rule command
*/
-static enum ice_status
+static int
ice_adv_add_update_vsi_list(struct ice_hw *hw,
struct ice_adv_fltr_mgmt_list_entry *m_entry,
struct ice_adv_rule_info *cur_fltr,
struct ice_adv_rule_info *new_fltr)
{
- enum ice_status status;
+ int status;
u16 vsi_list_id = 0;
if (cur_fltr->sw_act.fltr_act == ICE_FWD_TO_Q ||
@@ -9262,7 +9263,7 @@ ice_fill_sw_marker_lg_act(struct ice_hw *hw, u32 sw_marker, u16 l_id,
struct ice_aqc_sw_rules_elem *rx_tx, *lg_act;
const u16 offset_generic_md_word_0 = 0;
const u16 offset_generic_md_word_1 = 1;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
union lg_act_entry lg_e_lo;
union lg_act_entry lg_e_hi;
const u8 priority = 0x3;
@@ -9326,7 +9327,7 @@ ice_fill_sw_marker_lg_act(struct ice_hw *hw, u32 sw_marker, u16 l_id,
* rinfo describes other information related to this rule such as forwarding
* IDs, priority of this rule, etc.
*/
-enum ice_status
+int
ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
u16 lkups_cnt, struct ice_adv_rule_info *rinfo,
struct ice_rule_query_data *added_entry)
@@ -9340,12 +9341,12 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
struct LIST_HEAD_TYPE *rule_head;
struct ice_switch_info *sw;
u16 nb_lg_acts_mark = 1;
- enum ice_status status;
const u8 *pkt = NULL;
u16 num_rules = 1;
bool prof_rule;
u16 word_cnt;
u32 act = 0;
+ int status;
u8 q_rgn;
/* Initialize profile to result index bitmap */
@@ -9598,14 +9599,14 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
* @fm_list: filter management entry for which the VSI list management needs to
* be done
*/
-static enum ice_status
+static int
ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
struct ice_adv_fltr_mgmt_list_entry *fm_list)
{
struct ice_vsi_list_map_info *vsi_list_info;
enum ice_sw_lkup_type lkup_type;
- enum ice_status status;
u16 vsi_list_id;
+ int status;
if (fm_list->rule_info.sw_act.fltr_act != ICE_FWD_TO_VSI_LIST ||
fm_list->vsi_count == 0)
@@ -9697,14 +9698,14 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
* header. rinfo describes other information related to this rule such as
* forwarding IDs, priority of this rule, etc.
*/
-enum ice_status
+int
ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
u16 lkups_cnt, struct ice_adv_rule_info *rinfo)
{
struct ice_adv_fltr_mgmt_list_entry *list_elem;
struct ice_prot_lkup_ext lkup_exts;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
bool remove_rule = false;
u16 i, rid, vsi_handle;
@@ -9799,7 +9800,7 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
* the remove_entry parameter. This function will remove rule for a given
* vsi_handle with a given rule_id which is passed as parameter in remove_entry
*/
-enum ice_status
+int
ice_rem_adv_rule_by_id(struct ice_hw *hw,
struct ice_rule_query_data *remove_entry)
{
@@ -9836,14 +9837,14 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw,
* as removing a rule fails, it will return immediately with the error code,
* else it will return ICE_SUCCESS
*/
-enum ice_status ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
+int ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
{
struct ice_adv_fltr_mgmt_list_entry *list_itr, *tmp_entry;
struct ice_vsi_list_map_info *map_info;
struct LIST_HEAD_TYPE *list_head;
struct ice_adv_rule_info rinfo;
struct ice_switch_info *sw;
- enum ice_status status;
+ int status;
u8 rid;
sw = hw->switch_info;
@@ -9888,11 +9889,11 @@ enum ice_status ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
* @list_head: list for which filters needs to be replayed
* @recp_id: Recipe ID for which rules need to be replayed
*/
-static enum ice_status
+static int
ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
{
struct ice_fltr_mgmt_list_entry *itr;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_sw_recipe *recp_list;
u8 lport = hw->port_info->lport;
struct LIST_HEAD_TYPE l_head;
@@ -9959,10 +9960,10 @@ ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
* NOTE: This function does not clean up partially added filters on error.
* It is up to caller of the function to issue a reset or fail early.
*/
-enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
+int ice_replay_all_fltr(struct ice_hw *hw)
{
struct ice_switch_info *sw = hw->switch_info;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
u8 i;
for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
@@ -9987,13 +9988,13 @@ enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
* Replays the filter of recipe recp_id for a VSI represented via vsi_handle.
* It is required to pass valid VSI handle.
*/
-static enum ice_status
+static int
ice_replay_vsi_fltr(struct ice_hw *hw, struct ice_port_info *pi,
struct ice_switch_info *sw, u16 vsi_handle, u8 recp_id,
struct LIST_HEAD_TYPE *list_head)
{
struct ice_fltr_mgmt_list_entry *itr;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
struct ice_sw_recipe *recp_list;
u16 hw_vsi_id;
@@ -10050,13 +10051,13 @@ ice_replay_vsi_fltr(struct ice_hw *hw, struct ice_port_info *pi,
*
* Replay the advanced rule for the given VSI.
*/
-static enum ice_status
+static int
ice_replay_vsi_adv_rule(struct ice_hw *hw, u16 vsi_handle,
struct LIST_HEAD_TYPE *list_head)
{
struct ice_rule_query_data added_entry = { 0 };
struct ice_adv_fltr_mgmt_list_entry *adv_fltr;
- enum ice_status status = ICE_SUCCESS;
+ int status = ICE_SUCCESS;
if (LIST_EMPTY(list_head))
return status;
@@ -10083,12 +10084,12 @@ ice_replay_vsi_adv_rule(struct ice_hw *hw, u16 vsi_handle,
*
* Replays filters for requested VSI via vsi_handle.
*/
-enum ice_status
+int
ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
u16 vsi_handle)
{
struct ice_switch_info *sw;
- enum ice_status status;
+ int status;
u8 i;
sw = hw->switch_info;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 7a6944893d..e3ba837467 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -395,7 +395,7 @@ struct ice_vsi_list_map_info {
struct ice_fltr_list_entry {
struct LIST_ENTRY_TYPE list_entry;
- enum ice_status status;
+ int status;
struct ice_fltr_info fltr_info;
};
@@ -441,165 +441,165 @@ enum ice_promisc_flags {
};
/* VSI related commands */
-enum ice_status
+int
ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
bool keep_vsi_alloc, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle);
void ice_clear_all_vsi_ctx(struct ice_hw *hw);
-enum ice_status
+int
ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
u16 count, struct ice_mir_rule_buf *mr_buf,
struct ice_sq_cd *cd, u16 *rule_id);
-enum ice_status
+int
ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
u32 *ctl_bitmask);
-enum ice_status
+int
ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
u32 ctl_bitmask);
/* Switch config */
-enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw);
+int ice_get_initial_sw_cfg(struct ice_hw *hw);
-enum ice_status
+int
ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id);
-enum ice_status
+int
ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
-enum ice_status
+int
ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
u16 *counter_id);
-enum ice_status
+int
ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
u16 counter_id);
/* Switch/bridge related commands */
-enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
-enum ice_status ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id);
-enum ice_status ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id);
-enum ice_status
+int ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
+int ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id);
+int ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id);
+int
ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
u16 *counter_id);
-enum ice_status
+int
ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
-enum ice_status
+int
ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,
bool res_shared, u16 *desc_id, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
-enum ice_status
+int
ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
void ice_rem_all_sw_rules_info(struct ice_hw *hw);
-enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
-enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
-enum ice_status
+int ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
+int ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
+int
ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
-enum ice_status
+int
ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
-enum ice_status
+int
ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
-enum ice_status
+int
ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
-enum ice_status
+int
ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
u16 sw_marker);
-enum ice_status
+int
ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);
void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);
/* Promisc/defport setup for VSIs */
-enum ice_status
+int
ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,
u8 direction);
bool ice_check_if_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle,
bool *rule_exists);
-enum ice_status
+int
ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
u16 vid);
-enum ice_status
+int
ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
u16 vid);
-enum ice_status
+int
ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
bool rm_vlan_promisc);
/* Get VSIs Promisc/defport settings */
-enum ice_status
+int
ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
u16 *vid);
-enum ice_status
+int
ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
u16 *vid);
-enum ice_status
+int
ice_aq_add_recipe(struct ice_hw *hw,
struct ice_aqc_recipe_data_elem *s_recipe_list,
u16 num_recipes, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_recipe(struct ice_hw *hw,
struct ice_aqc_recipe_data_elem *s_recipe_list,
u16 *num_recipes, u16 recipe_root, struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_map_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u8 *r_bitmap,
struct ice_sq_cd *cd);
-enum ice_status
+int
ice_aq_get_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u8 *r_bitmap,
struct ice_sq_cd *cd);
-enum ice_status ice_alloc_recipe(struct ice_hw *hw, u16 *recipe_id);
-enum ice_status
+int ice_alloc_recipe(struct ice_hw *hw, u16 *recipe_id);
+int
ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
u16 lkups_cnt, struct ice_adv_rule_info *rinfo,
struct ice_rule_query_data *added_entry);
-enum ice_status
+int
ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle);
-enum ice_status
+int
ice_rem_adv_rule_by_id(struct ice_hw *hw,
struct ice_rule_query_data *remove_entry);
-enum ice_status
+int
ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
u16 lkups_cnt, struct ice_adv_rule_info *rinfo);
-enum ice_status ice_replay_all_fltr(struct ice_hw *hw);
+int ice_replay_all_fltr(struct ice_hw *hw);
-enum ice_status
+int
ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list);
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle);
-enum ice_status
+int
ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
u16 vsi_handle);
void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);
void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);
bool ice_is_prof_rule(enum ice_sw_tunnel_type type);
-enum ice_status
+int
ice_update_recipe_lkup_idx(struct ice_hw *hw,
struct ice_update_recipe_lkup_idx_params *params);
void ice_change_proto_id_to_dvm(void);
diff --git a/drivers/net/ice/base/ice_vlan_mode.c b/drivers/net/ice/base/ice_vlan_mode.c
index 33759e4b8a..2e1e922d00 100644
--- a/drivers/net/ice/base/ice_vlan_mode.c
+++ b/drivers/net/ice/base/ice_vlan_mode.c
@@ -10,13 +10,13 @@
* @hw: pointer to the HW struct
* @dvm: output variable to determine if DDP supports DVM(true) or SVM(false)
*/
-static enum ice_status
+static int
ice_pkg_get_supported_vlan_mode(struct ice_hw *hw, bool *dvm)
{
u16 meta_init_size = sizeof(struct ice_meta_init_section);
struct ice_meta_init_section *sect;
struct ice_buf_build *bld;
- enum ice_status status;
+ int status;
/* if anything fails, we assume there is no DVM support */
*dvm = false;
@@ -61,7 +61,7 @@ ice_pkg_get_supported_vlan_mode(struct ice_hw *hw, bool *dvm)
*
* Get VLAN Mode Parameters (0x020D)
*/
-static enum ice_status
+static int
ice_aq_get_vlan_mode(struct ice_hw *hw,
struct ice_aqc_get_vlan_mode *get_params)
{
@@ -91,7 +91,7 @@ ice_aq_get_vlan_mode(struct ice_hw *hw,
static bool ice_aq_is_dvm_ena(struct ice_hw *hw)
{
struct ice_aqc_get_vlan_mode get_params = { 0 };
- enum ice_status status;
+ int status;
status = ice_aq_get_vlan_mode(hw, &get_params);
if (status) {
@@ -136,7 +136,7 @@ static void ice_cache_vlan_mode(struct ice_hw *hw)
*/
static bool ice_pkg_supports_dvm(struct ice_hw *hw)
{
- enum ice_status status;
+ int status;
bool pkg_supports_dvm;
status = ice_pkg_get_supported_vlan_mode(hw, &pkg_supports_dvm);
@@ -156,7 +156,7 @@ static bool ice_pkg_supports_dvm(struct ice_hw *hw)
static bool ice_fw_supports_dvm(struct ice_hw *hw)
{
struct ice_aqc_get_vlan_mode get_vlan_mode = { 0 };
- enum ice_status status;
+ int status;
/* If firmware returns success, then it supports DVM, else it only
* supports SVM
@@ -242,13 +242,13 @@ static struct ice_update_recipe_lkup_idx_params ice_dvm_dflt_recipes[] = {
* ice_dvm_update_dflt_recipes - update default switch recipes in DVM
* @hw: hardware structure used to update the recipes
*/
-static enum ice_status ice_dvm_update_dflt_recipes(struct ice_hw *hw)
+static int ice_dvm_update_dflt_recipes(struct ice_hw *hw)
{
unsigned long i;
for (i = 0; i < ARRAY_SIZE(ice_dvm_dflt_recipes); i++) {
struct ice_update_recipe_lkup_idx_params *params;
- enum ice_status status;
+ int status;
params = &ice_dvm_dflt_recipes[i];
@@ -272,7 +272,7 @@ static enum ice_status ice_dvm_update_dflt_recipes(struct ice_hw *hw)
*
* Set VLAN Mode Parameters (0x020C)
*/
-static enum ice_status
+static int
ice_aq_set_vlan_mode(struct ice_hw *hw,
struct ice_aqc_set_vlan_mode *set_params)
{
@@ -307,10 +307,10 @@ ice_aq_set_vlan_mode(struct ice_hw *hw,
* ice_set_dvm - sets up software and hardware for double VLAN mode
* @hw: pointer to the hardware structure
*/
-static enum ice_status ice_set_dvm(struct ice_hw *hw)
+static int ice_set_dvm(struct ice_hw *hw)
{
struct ice_aqc_set_vlan_mode params = { 0 };
- enum ice_status status;
+ int status;
params.l2tag_prio_tagging = ICE_AQ_VLAN_PRIO_TAG_OUTER_CTAG;
params.rdma_packet = ICE_AQ_DVM_VLAN_RDMA_PKT_FLAG_SETTING;
@@ -352,10 +352,10 @@ static enum ice_status ice_set_dvm(struct ice_hw *hw)
* ice_set_svm - set single VLAN mode
* @hw: pointer to the HW structure
*/
-static enum ice_status ice_set_svm(struct ice_hw *hw)
+static int ice_set_svm(struct ice_hw *hw)
{
struct ice_aqc_set_vlan_mode *set_params;
- enum ice_status status;
+ int status;
status = ice_aq_set_port_params(hw->port_info, 0, false, false, false, NULL);
if (status) {
@@ -385,7 +385,7 @@ static enum ice_status ice_set_svm(struct ice_hw *hw)
* ice_set_vlan_mode
* @hw: pointer to the HW structure
*/
-enum ice_status ice_set_vlan_mode(struct ice_hw *hw)
+int ice_set_vlan_mode(struct ice_hw *hw)
{
/* DCF only has the ability to query the VLAN mode. Setting the VLAN
* mode is done by the PF.
diff --git a/drivers/net/ice/base/ice_vlan_mode.h b/drivers/net/ice/base/ice_vlan_mode.h
index d2380eb94b..bcb591b308 100644
--- a/drivers/net/ice/base/ice_vlan_mode.h
+++ b/drivers/net/ice/base/ice_vlan_mode.h
@@ -10,7 +10,7 @@
struct ice_hw;
bool ice_is_dvm_ena(struct ice_hw *hw);
-enum ice_status ice_set_vlan_mode(struct ice_hw *hw);
+int ice_set_vlan_mode(struct ice_hw *hw);
void ice_post_pkg_dwnld_vlan_mode_cfg(struct ice_hw *hw);
#endif /* _ICE_VLAN_MODE_H */
--
2.43.0
next prev parent reply other threads:[~2024-06-12 15:03 UTC|newest]
Thread overview: 428+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-30 15:40 [RFC] net/ice: Update base code with latest snapshot Ian Stokes
2024-05-01 8:19 ` Thomas Monjalon
2024-05-01 9:06 ` Bruce Richardson
2024-05-01 12:08 ` Thomas Monjalon
2024-06-12 14:59 ` [PATCH v2 000/148] Update net/ice base driver to latest upstream snapshot Anatoly Burakov
2024-06-12 14:59 ` Anatoly Burakov [this message]
2024-06-12 14:59 ` [PATCH v2 002/148] net/ice/base: replace ICE_SUCCESS with int Anatoly Burakov
2024-06-12 14:59 ` [PATCH v2 003/148] net/ice/base: update E830 headers Anatoly Burakov
2024-06-12 14:59 ` [PATCH v2 004/148] net/ice/base: update phy config during link restart Anatoly Burakov
2024-06-19 14:42 ` Bruce Richardson
2024-06-12 14:59 ` [PATCH v2 005/148] net/ice/base: fix for pointer to variable outside scope Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 006/148] net/ice/base: add missing include for flow Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 007/148] net/ice/base: add ability to set markid via switch filter Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 008/148] net/ice/base: improve ice_debug_cq messages Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 009/148] net/ice/base: add mgmt netlist auth support command Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 010/148] net/ice/base: fix undefined variables Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 011/148] net/ice/base: fix get media type Anatoly Burakov
2024-06-19 14:53 ` Bruce Richardson
2024-06-12 15:00 ` [PATCH v2 012/148] net/ice/base: clean up __ice_aq_get_set_rss_lut() Anatoly Burakov
2024-06-13 6:17 ` Przemek Kitszel
2024-06-21 12:31 ` Burakov, Anatoly
2024-06-19 14:55 ` Bruce Richardson
2024-06-12 15:00 ` [PATCH v2 013/148] net/ice/base: update flow seg fields to declared bitmaps Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 014/148] net/ice/base: update interface in ice_parse_common_caps Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 015/148] net/ice/base: refactor (non) bitmap declarations Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 016/148] net/ice/base: remove unnecessary control queue cmd_buf arrays Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 017/148] net/ice/base: alloc port_info only once Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 018/148] net/ice/base: update code with flex array safe allocations Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 019/148] net/ice/base: bring back ability to use 128 as size of PF type RSS LUT Anatoly Burakov
2024-06-19 15:51 ` Przemek Kitszel
2024-06-12 15:00 ` [PATCH v2 020/148] net/ice/base: support for OROM update in recovery mode Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 021/148] net/ice/base: code adjustments for E830 Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 022/148] net/ice/base: improve find recipe routine Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 023/148] net/ice/base: fix memory leak when checking firmware version Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 024/148] net/ice/base: add LL Tx timestamp interrupt read Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 025/148] net/ice/base: use model-dependent number of PHY ports Anatoly Burakov
2024-06-19 15:32 ` Bruce Richardson
2024-06-12 15:00 ` [PATCH v2 026/148] net/ice/base: use ice_bitmap_t in promisc functions Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 027/148] net/ice/base: fix rx-only unicast promiscuous mode Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 028/148] net/ice/base: add support for E825-C TX clock changing Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 029/148] net/ice/base: fix for applying multiple cloud filters Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 030/148] net/ice/base: limit PF RSS LUT to one VSI at time Anatoly Burakov
2024-06-19 15:41 ` Bruce Richardson
2024-06-19 15:53 ` Przemek Kitszel
2024-06-12 15:00 ` [PATCH v2 031/148] net/ice/base: prevent potential integer overflow Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 032/148] net/ice/base: cosmetic changes Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 033/148] net/ice/base: implement initial PTP support for E830 Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 034/148] net/ice/base: fix resource leak Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 035/148] net/ice/base: move lock outside of if-else Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 036/148] net/ice/base: refactor control queue send delay Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 037/148] net/ice/base: fix NVM feature check Anatoly Burakov
2024-06-20 10:28 ` Bruce Richardson
2024-06-12 15:00 ` [PATCH v2 038/148] net/ice/base: allow for dumping all clusters Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 039/148] net/ice/base: remove PTP aqc_driver_params Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 040/148] net/ice/base: add FW load status mask Anatoly Burakov
2024-06-20 10:29 ` Bruce Richardson
2024-06-12 15:00 ` [PATCH v2 041/148] net/ice/base: add direction metadata Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 042/148] net/ice/base: change data buffer in i2c write to be const Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 043/148] net/ice/base: remove unused code from upstream build Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 044/148] net/ice/base: fix sign-extension Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 045/148] net/ice/base: implement switch recipe reuse feature Anatoly Burakov
2024-06-18 14:53 ` Bruce Richardson
2024-06-12 15:00 ` [PATCH v2 046/148] net/ice/base: add helper function for refsync Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 047/148] net/ice/base: added informational message for NAC topology Anatoly Burakov
2024-06-20 12:02 ` Bruce Richardson
2024-06-12 15:00 ` [PATCH v2 048/148] net/ice/base: add Cage Max Power override NVM module Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 049/148] net/ice/base: adapt No FEC in Auto support check to add E82X devices Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 050/148] net/ice/base: move (read|write)_sma_ctrl functions to match upstream Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 051/148] net/ice/base: fix incorrect size when allocating children arrays Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 052/148] net/ice/base: fix GCS descriptor field offsets Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 053/148] net/ice/base: add VSI type for subfunctions Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 054/148] net/ice/base: correct the return type of ice_bitmap_hweight Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 055/148] net/ice/base: fix ice_ptp_one_port_cmd to avoid stale PHY commands Anatoly Burakov
2024-06-18 15:10 ` Bruce Richardson
2024-06-12 15:00 ` [PATCH v2 056/148] net/ice/base: remove dead code from ice_get_ddp_pkg_state Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 057/148] net/ice/base: get rid of enum ice_status Anatoly Burakov
2024-06-18 15:19 ` Bruce Richardson
2024-06-12 15:00 ` [PATCH v2 058/148] net/ice/base: use ICE_PTP_NOP to better indicate no action Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 059/148] net/ice/base: add fw log file Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 060/148] net/ice/base: update comments regarding clearing timestamps Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 061/148] net/ice/base: use "err" instead of "status" in ice_ptp_hw.c Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 062/148] net/ice/base: re-number E810-T subdevice IDs to match upstream Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 063/148] net/ice/base: enable RDMA Act-Act unload paths Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 064/148] net/ice/base: parse 1PPS GPIO in 1588 function caps Anatoly Burakov
2024-06-12 15:00 ` [PATCH v2 065/148] net/ice/base: rename netlist check functions to match upstream Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 066/148] net/ice/base: fix check for existing switch rule Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 067/148] net/ice/base: fall back to safe CGU params Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 068/148] net/ice/base: change tmr_idx to u32 Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 069/148] net/ice/base: be more verbose when preparing timer sync Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 070/148] net/ice/base: be more verbose in configuring Rx timestamp offset Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 071/148] net/ice/base: match code style to upstream Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 072/148] net/ice/base: update strict status when assigning BW limits Anatoly Burakov
2024-06-20 13:32 ` Bruce Richardson
2024-06-12 15:01 ` [PATCH v2 073/148] net/ice/base: remove unused define Anatoly Burakov
2024-06-20 13:38 ` Bruce Richardson
2024-06-12 15:01 ` [PATCH v2 074/148] net/ice/base: improve read retry value calculation Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 075/148] net/ice/base: check if recipe buffer was already allocated Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 076/148] net/ice/base: fix handling recipes when reusing is not supported Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 077/148] net/ice/base: use correct type Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 078/148] net/ice/base: read OROM in a loop Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 079/148] net/ice/base: ignore snprintf return value Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 080/148] net/ice/base: check array bounds Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 081/148] net/ice/base: copy output IO params from command descriptor Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 082/148] net/ice/base: enable Next Cluster ID capability Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 083/148] net/ice/base: fix potential TLV length overflow Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 084/148] net/ice/base: add function to read SDP section from NVM Anatoly Burakov
2024-06-20 14:44 ` Bruce Richardson
2024-06-12 15:01 ` [PATCH v2 085/148] net/ice/base: add Floating VEB support Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 086/148] net/ice/base: add defines for loopback mode Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 087/148] net/ice/base: allow skipping PF clear Anatoly Burakov
2024-06-20 14:56 ` Bruce Richardson
2024-06-12 15:01 ` [PATCH v2 088/148] net/ice/base: fix in the definition of the Board Type Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 089/148] net/ice/base : make ice_clear_vsi_q_ctx() non-static Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 090/148] net/ice/base: fix package download algorithm Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 091/148] net/ice/base: allows packages with mixed signature presence Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 092/148] net/ice/base: fix ice_memcpy type specifiers Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 093/148] net/ice/base: allow different FW API versions based on MAC type Anatoly Burakov
2024-06-20 15:41 ` Bruce Richardson
2024-06-12 15:01 ` [PATCH v2 094/148] net/ice/base: add 32 GT bus speed enumerated value Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 095/148] net/ice/base: add E830 debug dump cluster ID values Anatoly Burakov
2024-06-20 15:43 ` Bruce Richardson
2024-06-12 15:01 ` [PATCH v2 096/148] net/ice/base: fix for preparing PHY for timesync command Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 097/148] net/ice/base: support for firmware sanitization Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 098/148] net/ice/base: add 200G speeds to PHY types decoding Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 099/148] net/ice/base: temporary workaround for E830 signed package support Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 100/148] net/ice/base: add PHY OFFSET_READY register clearing Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 101/148] net/ice/base: rename PHY model designator fields and functions Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 102/148] net/ice/base: enable SB access explicitly before 1st PHY access Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 103/148] net/ice/base: refactor ETH56G PHY initialization Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 104/148] net/ice/base: refactor ETH56G support for miltiple PHYs per MAC Anatoly Burakov
2024-06-18 16:19 ` Bruce Richardson
2024-06-12 15:01 ` [PATCH v2 105/148] net/ice/base: implement interface to reset timestamp memory Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 106/148] net/ice/base: fix iterations over PTP ports Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 107/148] net/ice/base: return high address for multi-read eth56g registers Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 108/148] net/ice/base: add function to read Tx timestamp status register Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 109/148] net/ice/base: implement upper-level PHY control functions Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 110/148] net/ice/base: squash multiple fixes for e56g device Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 111/148] net/ice/base: add PHY statistics dump Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 112/148] net/ice/base: move ice_ptp_init_phy_model to align with upstream Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 113/148] net/ice/base: add Get Link Status Data version 2 Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 114/148] net/ice/base: add port option commands Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 115/148] net/ice/base: merge unified E830 headers Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 116/148] net/ice/base: replace array initialization with macros Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 117/148] net/ice/base: switch speed conversions to static lookups Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 118/148] net/ice/base: support E830 in DDP pkg handling Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 119/148] net/ice/base: support E830 in Topology AQ command Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 120/148] net/ice/base: add E830 PTP init Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 121/148] net/ice/base: allow skipping main timer programming Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 122/148] net/ice/base: add missing files for shared code update Anatoly Burakov
2024-06-21 13:47 ` Bruce Richardson
2024-06-12 15:01 ` [PATCH v2 123/148] net/ice/base: align code to upstream Anatoly Burakov
2024-06-12 15:01 ` [PATCH v2 124/148] net/ice/base: use const char* array for storing link modes Anatoly Burakov
2024-06-21 14:00 ` Bruce Richardson
2024-06-12 15:01 ` [PATCH v2 125/148] net/ice/base: fix compile issues on some targets Anatoly Burakov
2024-06-18 17:05 ` Bruce Richardson
2024-06-12 15:02 ` [PATCH v2 126/148] net/ice/base: move code to common headers Anatoly Burakov
2024-06-21 14:02 ` Bruce Richardson
2024-06-12 15:02 ` [PATCH v2 127/148] net/ice/base: make some switch-related functions static Anatoly Burakov
2024-06-21 14:03 ` Bruce Richardson
2024-06-12 15:02 ` [PATCH v2 128/148] net/ice/base: add support for L2TP on switch Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 129/148] net/ice/base: add L2TPv3 support for adv rules Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 130/148] net/ice/base: detect and store device sensor reading capability Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 131/148] net/ice/base: add missing defines and misc cleanup Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 132/148] net/ice/base: increase PF reset wait timeout to 500 milliseconds Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 133/148] net/ice/base: fix memcpy type Anatoly Burakov
2024-06-21 14:40 ` Bruce Richardson
2024-06-12 15:02 ` [PATCH v2 134/148] net/ice/base: too big a timeout for QV diagnostic tests Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 135/148] net/ice/base: fix ice_get_ctx() issue Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 136/148] net/ice/base: add AQ function to configure SyncE error reporting Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 137/148] net/ice/base: support DCF query port ETS adminq Anatoly Burakov
2024-06-21 14:49 ` Bruce Richardson
2024-06-12 15:02 ` [PATCH v2 138/148] net/ice/base: update boost struct for traffic types Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 139/148] net/ice/base: clean up ice_lan_tx_rx Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 140/148] net/ice/base: enable CGU error reporting Anatoly Burakov
2024-06-21 15:08 ` Bruce Richardson
2024-06-12 15:02 ` [PATCH v2 141/148] net/ice/base: cleanup timestamp registers correctly Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 142/148] net/ice/base: rework multiple functions Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 143/148] net/ice/base: change a method to get pca9575 handle Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 144/148] net/ice/base: rename SMA register macros to match Linux upstream Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 145/148] net/ice/base: introduce new functions in ice_sched_node Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 146/148] net/ice/base: misc header file clean up Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 147/148] net/ice: update rss lut value for RSS init Anatoly Burakov
2024-06-12 15:02 ` [PATCH v2 148/148] net/ice: add new device ids Anatoly Burakov
2024-06-12 15:08 ` [PATCH v2 000/148] Update net/ice base driver to latest upstream snapshot Burakov, Anatoly
2024-06-12 15:51 ` Ferruh Yigit
2024-06-12 18:29 ` Burakov, Anatoly
2024-06-25 11:12 ` [PATCH v3 000/129] " Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 001/129] net/ice/base: convert enum ice_status to int Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 002/129] net/ice/base: replace ICE_SUCCESS with int Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 003/129] net/ice/base: add E830 definitions Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 004/129] net/ice/base: update phy config during link restart Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 005/129] net/ice/base: fix for pointer to variable outside scope Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 006/129] net/ice/base: add missing include Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 007/129] net/ice/base: add ability to set markid via switch filter Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 008/129] net/ice/base: improve ice_debug_cq messages Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 009/129] net/ice/base: add mgmt netlist auth support command Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 010/129] net/ice/base: avoid undefined variables Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 011/129] net/ice/base: improve media type handling for phy caps Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 012/129] net/ice/base: update flow seg fields to declared bitmaps Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 013/129] net/ice/base: update interface in ice_parse_common_caps Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 014/129] net/ice/base: refactor (non) bitmap declarations Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 015/129] net/ice/base: remove unnecessary control queue cmd_buf arrays Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 016/129] net/ice/base: alloc port_info only once Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 017/129] net/ice/base: update code with flex array safe allocations Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 018/129] net/ice/base: support for OROM update in recovery mode Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 019/129] net/ice/base: improve find recipe routine Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 020/129] net/ice/base: fix memory leak when checking firmware version Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 021/129] net/ice/base: add LL Tx timestamp interrupt read Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 022/129] net/ice/base: use model-dependent number of PHY ports Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 023/129] net/ice/base: use ice_bitmap_t in promisc functions Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 024/129] net/ice/base: fix rx-only unicast promiscuous mode Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 025/129] net/ice/base: add support for E825-C TX clock changing Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 026/129] net/ice/base: fix for applying multiple cloud filters Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 027/129] net/ice/base: prevent potential integer overflow Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 028/129] net/ice/base: implement initial PTP support for E830 Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 029/129] net/ice/base: fix resource leak Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 030/129] net/ice/base: move lock outside of if-else Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 031/129] net/ice/base: refactor control queue send delay Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 032/129] net/ice/base: allow for dumping all clusters Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 033/129] net/ice/base: remove PTP aqc_driver_params Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 034/129] net/ice/base: change data buffer in i2c write to be const Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 035/129] net/ice/base: fix sign-extension Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 036/129] net/ice/base: add helper function for refsync Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 037/129] net/ice/base: added informational message for NAC topology Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 038/129] net/ice/base: add Cage Max Power override NVM module Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 039/129] net/ice/base: adapt No FEC in Auto support check to add E82X devices Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 040/129] net/ice/base: fix incorrect size when allocating children arrays Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 041/129] net/ice/base: fix GCS descriptor field offsets Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 042/129] net/ice/base: add VSI type for subfunctions Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 043/129] net/ice/base: correct the return type of ice_bitmap_hweight Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 044/129] net/ice/base: fix ice_ptp_one_port_cmd to avoid stale PHY commands Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 045/129] net/ice/base: remove dead code from ice_get_ddp_pkg_state Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 046/129] net/ice/base: use ICE_PTP_NOP to better indicate no action Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 047/129] net/ice/base: add fw log file Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 048/129] net/ice/base: use "err" instead of "status" in ice_ptp_hw.c Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 049/129] net/ice/base: re-number E810-T subdevice IDs to match upstream Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 050/129] net/ice/base: enable RDMA Act-Act unload paths Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 051/129] net/ice/base: parse 1PPS GPIO in 1588 function caps Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 052/129] net/ice/base: fix check for existing switch rule Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 053/129] net/ice/base: fall back to safe CGU params Anatoly Burakov
2024-06-25 11:12 ` [PATCH v3 054/129] net/ice/base: change tmr_idx to u32 Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 055/129] net/ice/base: be more verbose when preparing timer sync Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 056/129] net/ice/base: update strict status when assigning BW limits Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 057/129] net/ice/base: improve read retry value calculation Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 058/129] net/ice/base: check if recipe buffer was already allocated Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 059/129] net/ice/base: use correct type Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 060/129] net/ice/base: read OROM in a loop Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 061/129] net/ice/base: ignore snprintf return value Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 062/129] net/ice/base: check array bounds Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 063/129] net/ice/base: copy output IO params from command descriptor Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 064/129] net/ice/base: enable Next Cluster ID capability Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 065/129] net/ice/base: fix potential TLV length overflow Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 066/129] net/ice/base: add function to read SDP section from NVM Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 067/129] net/ice/base: add Floating VEB support Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 068/129] net/ice/base: add defines for loopback mode Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 069/129] net/ice/base: allow skipping PF clear Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 070/129] net/ice/base: fix in the definition of the Board Type Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 071/129] net/ice/base: make ice_clear_vsi_q_ctx() non-static Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 072/129] net/ice/base: fix package download algorithm Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 073/129] net/ice/base: allows packages with mixed signature presence Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 074/129] net/ice/base: fix ice_memcpy type specifiers Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 075/129] net/ice/base: allow different FW API versions based on MAC type Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 076/129] net/ice/base: add 32 GT bus speed enumerated value Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 077/129] net/ice/base: add E830 debug dump cluster ID values Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 078/129] net/ice/base: fix for preparing PHY for timesync command Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 079/129] net/ice/base: support for firmware sanitization Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 080/129] net/ice/base: add 200G speeds to PHY types decoding Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 081/129] net/ice/base: add PHY OFFSET_READY register clearing Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 082/129] net/ice/base: rename PHY model designator fields and functions Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 083/129] net/ice/base: enable SB access explicitly before 1st PHY access Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 084/129] net/ice/base: refactor ETH56G PHY initialization Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 085/129] net/ice/base: refactor ETH56G support for multiple PHYs per MAC Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 086/129] net/ice/base: implement interface to reset timestamp memory Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 087/129] net/ice/base: return high address for multi-read eth56g registers Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 088/129] net/ice/base: add function to read Tx timestamp status register Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 089/129] net/ice/base: implement upper-level PHY control functions Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 090/129] net/ice/base: squash multiple fixes for e56g device Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 091/129] net/ice/base: allow passing flags to sbq command Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 092/129] net/ice/base: move ice_ptp_init_phy_model to align with upstream Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 093/129] net/ice/base: add Get Link Status Data version 2 Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 094/129] net/ice/base: add port option commands Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 095/129] net/ice/base: merge unified E830 headers Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 096/129] net/ice/base: replace array initialization with macros Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 097/129] net/ice/base: switch speed conversions to static lookups Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 098/129] net/ice/base: support E830 in DDP pkg handling Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 099/129] net/ice/base: support E830 in Topology AQ command Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 100/129] net/ice/base: add E830 PTP init Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 101/129] net/ice/base: allow skipping main timer programming Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 102/129] net/ice/base: add missing files for shared code update Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 103/129] net/ice/base: rename netlist check functions to match upstream Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 104/129] net/ice/base: align code to base driver Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 105/129] net/ice/base: use const char* array for storing link modes Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 106/129] net/ice/base: fix compile issues on some targets Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 107/129] net/ice/base: move code to common headers Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 108/129] net/ice/base: make some switch-related functions static Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 109/129] net/ice/base: add L2TPv3 support for adv rules Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 110/129] net/ice/base: detect and store device sensor reading capability Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 111/129] net/ice/base: add missing defines and misc cleanup Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 112/129] net/ice/base: increase PF reset wait timeout to 500 milliseconds Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 113/129] net/ice/base: adjust memcpy type Anatoly Burakov
2024-06-25 11:13 ` [PATCH v3 114/129] net/ice/base: use a variable to store reset count Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 115/129] net/ice/base: fix ice_get_ctx() issue Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 116/129] net/ice/base: add AQ function to configure SyncE error reporting Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 117/129] net/ice/base: support DCF query port ETS adminq Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 118/129] net/ice/base: update boost struct for traffic types Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 119/129] net/ice/base: clean up ice_lan_tx_rx Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 120/129] net/ice/base: enable CGU error reporting Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 121/129] net/ice/base: cleanup timestamp registers correctly Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 122/129] net/ice/base: remove PHY port timer bypass mode Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 123/129] net/ice/base: implement TX interrupt enablement functions Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 124/129] net/ice/base: make Tx and Rx vernier offset calibration independent Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 125/129] net/ice/base: change a method to get pca9575 handle Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 126/129] net/ice/base: rename SMA register macros to match Linux upstream Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 127/129] net/ice/base: introduce new functions in ice_sched_node Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 128/129] net/ice/base: misc header file clean up Anatoly Burakov
2024-06-25 11:14 ` [PATCH v3 129/129] net/ice: add new device ids Anatoly Burakov
2024-06-25 17:20 ` [PATCH v3 000/129] Update net/ice base driver to latest upstream snapshot Bruce Richardson
2024-06-26 11:40 ` [PATCH v4 000/103] " Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 001/103] net/ice/base: add LL Tx timestamp interrupt read Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 002/103] net/ice/base: use model-dependent number of PHY ports Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 003/103] net/ice/base: use ice_bitmap_t in promisc functions Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 004/103] net/ice/base: fix rx-only unicast promiscuous mode Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 005/103] net/ice/base: add support for E825-C TX clock changing Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 006/103] net/ice/base: fix for applying multiple cloud filters Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 007/103] net/ice/base: prevent potential integer overflow Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 008/103] net/ice/base: implement initial PTP support for E830 Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 009/103] net/ice/base: fix resource leak Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 010/103] net/ice/base: move lock outside of if-else Anatoly Burakov
2024-06-26 11:40 ` [PATCH v4 011/103] net/ice/base: refactor control queue send delay Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 012/103] net/ice/base: allow for dumping all clusters Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 013/103] net/ice/base: remove PTP aqc_driver_params Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 014/103] net/ice/base: change data buffer in i2c write to be const Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 015/103] net/ice/base: fix sign-extension Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 016/103] net/ice/base: add helper function for refsync Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 017/103] net/ice/base: added informational message for NAC topology Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 018/103] net/ice/base: add Cage Max Power override NVM module Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 019/103] net/ice/base: adapt No FEC in Auto support check to add E82X devices Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 020/103] net/ice/base: fix incorrect size when allocating children arrays Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 021/103] net/ice/base: fix GCS descriptor field offsets Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 022/103] net/ice/base: add VSI type for subfunctions Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 023/103] net/ice/base: correct the return type of ice_bitmap_hweight Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 024/103] net/ice/base: add helper to get timer command reg values Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 025/103] net/ice/base: avoid stale PHY commands in ice_ptp_one_port_cmd Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 026/103] net/ice/base: remove dead code from ice_get_ddp_pkg_state Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 027/103] net/ice/base: use ICE_PTP_NOP to better indicate no action Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 028/103] net/ice/base: use "err" instead of "status" in ice_ptp_hw.c Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 029/103] net/ice/base: re-number E810-T subdevice IDs to match upstream Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 030/103] net/ice/base: enable RDMA Act-Act unload paths Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 031/103] net/ice/base: parse 1PPS GPIO in 1588 function caps Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 032/103] net/ice/base: fix check for existing switch rule Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 033/103] net/ice/base: fall back to safe CGU params Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 034/103] net/ice/base: change tmr_idx to u32 Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 035/103] net/ice/base: be more verbose when preparing timer sync Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 036/103] net/ice/base: update strict status when assigning BW limits Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 037/103] net/ice/base: improve read retry value calculation Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 038/103] net/ice/base: check if recipe buffer was already allocated Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 039/103] net/ice/base: use correct type Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 040/103] net/ice/base: read OROM in a loop Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 041/103] net/ice/base: ignore snprintf return value Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 042/103] net/ice/base: check array bounds Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 043/103] net/ice/base: copy output IO params from command descriptor Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 044/103] net/ice/base: enable Next Cluster ID capability Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 045/103] net/ice/base: fix potential TLV length overflow Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 046/103] net/ice/base: add function to read SDP section from NVM Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 047/103] net/ice/base: add Floating VEB support Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 048/103] net/ice/base: add defines for loopback mode Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 049/103] net/ice/base: allow skipping PF clear Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 050/103] net/ice/base: fix wrong definition of board type Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 051/103] net/ice/base: make ice_clear_vsi_q_ctx() non-static Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 052/103] net/ice/base: fix package download algorithm Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 053/103] net/ice/base: allows packages with mixed signature presence Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 054/103] net/ice/base: adjust ice_memcpy type specifiers Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 055/103] net/ice/base: allow different FW API versions based on MAC type Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 056/103] net/ice/base: add 32 GT bus speed enumerated value Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 057/103] net/ice/base: add E830 debug dump cluster ID values Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 058/103] net/ice/base: fix for preparing PHY for timesync command Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 059/103] net/ice/base: support for firmware sanitization Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 060/103] net/ice/base: add 200G speeds to PHY types decoding Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 061/103] net/ice/base: add PHY OFFSET_READY register clearing Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 062/103] net/ice/base: rename PHY model designator fields and functions Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 063/103] net/ice/base: enable SB access explicitly before 1st PHY access Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 064/103] net/ice/base: refactor ETH56G PHY initialization Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 065/103] net/ice/base: refactor ETH56G support for multiple PHYs per MAC Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 066/103] net/ice/base: implement interface to reset timestamp memory Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 067/103] net/ice/base: return high address for multi-read eth56g registers Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 068/103] net/ice/base: add function to read Tx timestamp status register Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 069/103] net/ice/base: implement upper-level PHY control functions Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 070/103] net/ice/base: remove switch-related code Anatoly Burakov
2024-06-26 11:41 ` [PATCH v4 071/103] net/ice/base: allow passing flags to sbq command Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 072/103] net/ice/base: add Get Link Status Data version 2 Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 073/103] net/ice/base: add port option commands Anatoly Burakov
2024-06-26 12:13 ` Burakov, Anatoly
2024-06-26 11:42 ` [PATCH v4 074/103] net/ice/base: replace array initialization with macros Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 075/103] net/ice/base: switch speed conversions to static lookups Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 076/103] net/ice/base: merge unified E830 headers Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 077/103] net/ice/base: support E830 in DDP pkg handling Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 078/103] net/ice/base: support E830 in Topology AQ command Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 079/103] net/ice/base: add E830 PTP init Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 080/103] net/ice/base: allow skipping main timer programming Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 081/103] net/ice/base: fix compile issues on some targets Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 082/103] net/ice/base: add L2TPv3 support for adv rules Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 083/103] net/ice/base: detect and store device sensor reading capability Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 084/103] net/ice/base: increase PF reset wait timeout to 500 milliseconds Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 085/103] net/ice/base: use a variable to store reset count Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 086/103] net/ice/base: fix masking in ice_get_ctx() Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 087/103] net/ice/base: add AQ function to configure SyncE error reporting Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 088/103] net/ice/base: update boost struct for traffic types Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 089/103] net/ice/base: enable CGU error reporting Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 090/103] net/ice/base: cleanup timestamp registers correctly Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 091/103] net/ice/base: remove PHY port timer bypass mode Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 092/103] net/ice/base: implement TX interrupt enablement functions Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 093/103] net/ice/base: make Tx and Rx vernier offset calibration independent Anatoly Burakov
2024-06-26 12:11 ` Burakov, Anatoly
2024-06-26 12:13 ` Bruce Richardson
2024-06-26 11:42 ` [PATCH v4 094/103] net/ice/base: change a method to get pca9575 handle Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 095/103] net/ice/base: rename SMA register macros Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 096/103] net/ice/base: make is_gps_present more generic Anatoly Burakov
2024-06-26 12:08 ` Burakov, Anatoly
2024-06-26 11:42 ` [PATCH v4 097/103] net/ice/base: add missing defines and misc cleanup Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 098/103] net/ice/base: align code to base driver Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 099/103] net/ice/base: make some functions non-static Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 100/103] net/ice/base: make some functions static Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 101/103] net/ice/base: introduce new functions in ice_sched_node Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 102/103] net/ice/base: add missing files for shared code update Anatoly Burakov
2024-06-26 11:42 ` [PATCH v4 103/103] net/ice: add new device ids Anatoly Burakov
2024-06-26 17:33 ` [PATCH v4 000/103] Update net/ice base driver to latest upstream snapshot Bruce Richardson
2024-06-27 17:43 ` Bruce Richardson
2024-06-28 11:23 ` Bruce Richardson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=9b86f60a2aad0ecf53f55a0bd56e74d22e123415.1718204528.git.anatoly.burakov@intel.com \
--to=anatoly.burakov@intel.com \
--cc=bruce.richardson@intel.com \
--cc=dev@dpdk.org \
--cc=ian.stokes@intel.com \
--cc=przemyslaw.kitszel@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).