From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 280664404F; Wed, 12 Jun 2024 17:16:08 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4177942EAF; Wed, 12 Jun 2024 17:05:31 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by mails.dpdk.org (Postfix) with ESMTP id 93A0742E8D for ; Wed, 12 Jun 2024 17:05:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718204721; x=1749740721; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aG1bDp4CRgd8Bxplg/CHWSRxLCAHJpumPJJAaBaVCik=; b=fu/6ZZpvI+r7SrFveHW4Pz8rM8fUp8CmpGcGtAf/kZgymffDu9wx4ara T0JAxM7nSEAbmWN65nFSEPJBMtYW15AQw7ueqxFdrIdt75PZqjXu2jGSM YG+eQ+lvVQ8/OpVNb9B/MI/lEqyjHXF8hnThXi9xLlbP/nJR4ZGwVd7qv yM6tJ8dXB99vqAJKnk0vQkJd6jyDPtp5/eTKYn+MkG0FamGBhAQPWVb/6 X6aPLAfvJLSZGH6RHf/UZbfJHM8dlgDjz/NsiIytt53BocXm9g5vUs97b 6IbcajDfh7oKCerB5uOwtUv2Rf3FLdhFR15aRAaMDYr7+MhQTAChZ0TNu w==; X-CSE-ConnectionGUID: kwApZ3ttRnC394NR2ooGXg== X-CSE-MsgGUID: QPIieIT7SO2d5knEpgQ1WQ== X-IronPort-AV: E=McAfee;i="6700,10204,11101"; a="32459645" X-IronPort-AV: E=Sophos;i="6.08,233,1712646000"; d="scan'208";a="32459645" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jun 2024 08:05:20 -0700 X-CSE-ConnectionGUID: Bch5LDdEQI2q4gNLO9Oy6Q== X-CSE-MsgGUID: W0nymYs1SOeX3yilZRQiAg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,233,1712646000"; d="scan'208";a="39925511" Received: from silpixa00401119.ir.intel.com ([10.55.129.167]) by orviesa009.jf.intel.com with ESMTP; 12 Jun 2024 08:05:19 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Ian Stokes , bruce.richardson@intel.com, Bartosz Staszewski Subject: [PATCH v2 074/148] net/ice/base: improve read retry value calculation Date: Wed, 12 Jun 2024 16:01:08 +0100 Message-ID: <9e6d6ac32d98d3371f474662f6d594611d38dd51.1718204528.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: <20240430154014.1026-1-ian.stokes@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Ian Stokes Previous implementation of PHY timestamp retry value was set to a static value that had no meaning. Change it to calculate it based on a set of meaningfully named macros, as well as adjust data type to avoid overflows. Signed-off-by: Bartosz Staszewski Signed-off-by: Ian Stokes --- drivers/net/ice/base/ice_ptp_hw.c | 2 +- drivers/net/ice/base/ice_ptp_hw.h | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c index ddcadf603c..cc840a8a4b 100644 --- a/drivers/net/ice/base/ice_ptp_hw.c +++ b/drivers/net/ice/base/ice_ptp_hw.c @@ -4583,7 +4583,7 @@ static int ice_write_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 val) static int ice_read_phy_tstamp_ll_e810(struct ice_hw *hw, u8 idx, u8 *hi, u32 *lo) { - u8 i; + unsigned int i; /* Write TS index to read to the PF register so the FW can read it */ wr32(hw, PF_SB_ATQBAL, TS_LL_READ_TS_IDX(idx)); diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h index 50716e7b25..8a1f5c6163 100644 --- a/drivers/net/ice/base/ice_ptp_hw.h +++ b/drivers/net/ice/base/ice_ptp_hw.h @@ -521,7 +521,11 @@ int ice_ptp_init_phy_cfg(struct ice_hw *hw); #define BYTES_PER_IDX_ADDR_L 4 /* Tx timestamp low latency read definitions */ -#define TS_LL_READ_RETRIES 200 +#define TS_LL_MAX_TIME_READ_PER_PORT 80 +#define TS_LL_MAX_PORT 8 +#define TS_LL_DELTA_TIME 360 +#define TS_LL_READ_RETRIES (TS_LL_MAX_TIME_READ_PER_PORT * \ + TS_LL_MAX_PORT) + TS_LL_DELTA_TIME #define TS_LL_READ_TS_INTR BIT(30) #define TS_LL_READ_TS BIT(31) #define TS_LL_READ_TS_IDX_S 24 -- 2.43.0