From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id C27418D8B for ; Fri, 13 May 2016 10:24:47 +0200 (CEST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP; 13 May 2016 01:24:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,613,1455004800"; d="scan'208";a="805422377" Received: from irsmsx151.ger.corp.intel.com ([163.33.192.59]) by orsmga003.jf.intel.com with ESMTP; 13 May 2016 01:24:46 -0700 Received: from irsmsx107.ger.corp.intel.com ([169.254.10.133]) by IRSMSX151.ger.corp.intel.com ([169.254.4.7]) with mapi id 14.03.0248.002; Fri, 13 May 2016 09:24:45 +0100 From: "Jain, Deepak K" To: Thomas Monjalon , "Kusztal, ArkadiuszX" CC: "dev@dpdk.org" , "Trahe, Fiona" , "Griffin, John" Thread-Topic: [dpdk-dev] [PATCH] qat: change optimization flag for Intel QuickAssist Technology Thread-Index: AQHRqp3ecXZsoevcc0anyzTNmBU22Z+2edmAgAARscA= Date: Fri, 13 May 2016 08:24:44 +0000 Deferred-Delivery: Fri, 13 May 2016 08:23:59 +0000 Message-ID: References: <1462872255-13100-1-git-send-email-arkadiuszx.kusztal@intel.com> <1802357.As1ss59lSu@xps13> In-Reply-To: <1802357.As1ss59lSu@xps13> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_IC x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMGQyYzQzMmQtZDlhZC00ODFmLWE5ZTUtZjg2MjgxMjA4MDZlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6InZaT3hQb0Z4YzNvU3JlOXl3RkZNR29WeUgycDZ4S2J6NTVrZ2J0RGNGaXM9In0= x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] qat: change optimization flag for Intel QuickAssist Technology X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 May 2016 08:24:48 -0000 Hi Thomas, This change was made to fix the compilation issues arising when optimizatio= n flag was changed. Hence its related to same optimization flag patch. Do you want us to separate the Makefile and .c file change? Regards, Deepak -----Original Message----- From: Thomas Monjalon [mailto:thomas.monjalon@6wind.com]=20 Sent: Friday, May 13, 2016 9:18 AM To: Kusztal, ArkadiuszX Cc: dev@dpdk.org; Trahe, Fiona ; Griffin, John ; Jain, Deepak K Subject: Re: [dpdk-dev] [PATCH] qat: change optimization flag for Intel Qui= ckAssist Technology 2016-05-10 10:24, Arek Kusztal: > From: Arkadiusz Kusztal >=20 > Changed to -O3 optimization flag in Intel QuickAssist Technology Makefile There is another change below. Should it be a separate patch? > --- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c > +++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c > @@ -616,10 +616,12 @@ int qat_alg_aead_session_create_content_desc_auth(s= truct qat_session *cdesc, > * Write (the length of AAD) into bytes 16-19 of state2 > * in big-endian format. This field is 8 bytes > */ > - *(uint32_t *)&(hash->sha.state1[ > + uint32_t *aad_len =3D (uint32_t *)&hash->sha.state1[ > ICP_QAT_HW_GALOIS_128_STATE1_SZ + > - ICP_QAT_HW_GALOIS_H_SZ]) =3D > - rte_bswap32(add_auth_data_length); > + ICP_QAT_HW_GALOIS_H_SZ]; > + > + *aad_len =3D rte_bswap32(add_auth_data_length); > + > proto =3D ICP_QAT_FW_LA_GCM_PROTO; > } else if (cdesc->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2= ) { > proto =3D ICP_QAT_FW_LA_SNOW_3G_PROTO; >=20