[dpdk-dev] [PATCH 0/4] add kasumi in Intel(R) QuickAssist driver

[dpdk-dev] [PATCH 0/4] add kasumi in Intel(R) QuickAssist driver

[Deepak Kumar Jain]

This patchset contains patches to enable kasumi cipher only
and hash only functionality in Intel(R) QuickAsisst
Technology Driver.

This patchset depends on following patch:
"crypto/qat: add NULL capability to Intel QAT driver"
(http://dpdk.org/dev/patchwork/patch/15230/)

Deepak Kumar Jain (4):
  crypto/qat: enable Kasumi F9 support in QAT driver
  app/test: add Kasumi f9 tests in QAT test suite
  crypto/qat: enable support of Kasumi F8 in QAT cryptodev
  app/test: add kasumi f8 test into QAT testsuite

 app/test/test_cryptodev.c                          | 16 +++++
 app/test/test_cryptodev_kasumi_hash_test_vectors.h | 43 +++++++++++++
 drivers/crypto/qat/qat_adf/qat_algs.h              | 10 ++-
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c   | 74 ++++++++++++++++++++--
 drivers/crypto/qat/qat_crypto.c                    | 69 ++++++++++++++++++--
 5 files changed, 201 insertions(+), 11 deletions(-)

-- 
2.5.5

[dpdk-dev] [PATCH 1/4] crypto/qat: enable Kasumi F9 support in QAT driver

[Deepak Kumar Jain]

The changes in this patch enables the Kasumi F9 functionality
for Intel Quick Assist Technology

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 drivers/crypto/qat/qat_adf/qat_algs.h            |  7 ++++++
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 30 ++++++++++++++++++++++--
 drivers/crypto/qat/qat_crypto.c                  | 30 +++++++++++++++++++++++-
 3 files changed, 64 insertions(+), 3 deletions(-)

diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h b/drivers/crypto/qat/qat_adf/qat_algs.h
index 6a86053..0cc176f 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -51,6 +51,13 @@
 #include "icp_qat_fw.h"
 #include "icp_qat_fw_la.h"
 
+/*
+ * Key Modifier (KM) value used in Kasumi algorithm in F9 mode to XOR
+ * Integrity Key (IK)
+ */
+#define KASUMI_F9_KEY_MODIFIER_4_BYTES   0xAAAAAAAA
+
+
 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
 	ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
 					ICP_QAT_HW_CIPHER_NO_CONVERT, \
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index d9437bc..085a652 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -96,6 +96,9 @@ static int qat_hash_get_state1_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 	case ICP_QAT_HW_AUTH_ALGO_MD5:
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_MD5_STATE1_SZ,
 						QAT_HW_DEFAULT_ALIGNMENT);
+	case ICP_QAT_HW_AUTH_ALGO_KASUMI_F9:
+		return QAT_HW_ROUND_UP(ICP_QAT_HW_KASUMI_F9_STATE1_SZ,
+						QAT_HW_DEFAULT_ALIGNMENT);
 	case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
 		/* return maximum state1 size in this case */
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA512_STATE1_SZ,
@@ -559,6 +562,8 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 	uint16_t state1_size = 0, state2_size = 0;
 	uint16_t hash_offset, cd_size;
 	uint32_t *aad_len = NULL;
+	uint32_t wordIndex  = 0;
+	uint32_t *pTempKey;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -605,7 +610,8 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 			ICP_QAT_HW_AUTH_CONFIG_BUILD(ICP_QAT_HW_AUTH_MODE1,
 				cdesc->qat_hash_alg, digestsize);
 
-	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2)
+	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2
+		|| cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9)
 		hash->auth_counter.counter = 0;
 	else
 		hash->auth_counter.counter = rte_bswap32(
@@ -722,12 +728,32 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 		break;
 	case ICP_QAT_HW_AUTH_ALGO_NULL:
 		break;
+	case ICP_QAT_HW_AUTH_ALGO_KASUMI_F9:
+		state1_size = qat_hash_get_state1_size(
+				ICP_QAT_HW_AUTH_ALGO_KASUMI_F9);
+		state2_size = ICP_QAT_HW_KASUMI_F9_STATE2_SZ;
+		memset(cdesc->cd_cur_ptr, 0, state1_size + state2_size);
+		pTempKey = (uint32_t *)(cdesc->cd_cur_ptr + state1_size
+								+ authkeylen);
+		/*
+		** The Inner Hash Initial State2 block must contain IK
+		** (Initialisation Key), followed by IK XOR-ed with KM
+		** (Key Modifier): IK||(IK^KM).
+		**/
+		/* write the auth key */
+		memcpy(cdesc->cd_cur_ptr + state1_size, authkey, authkeylen);
+		/* initialise temp key with auth key */
+		memcpy(pTempKey, authkey, authkeylen);
+		/* XOR Key with KASUMI F9 key modifier at 4 bytes level */
+		for (wordIndex = 0; wordIndex < (authkeylen >> 2); wordIndex++)
+			pTempKey[wordIndex] ^= KASUMI_F9_KEY_MODIFIER_4_BYTES;
+		break;
 	default:
 		PMD_DRV_LOG(ERR, "Invalid HASH alg %u", cdesc->qat_hash_alg);
 		return -EFAULT;
 	}
 
-	/* Request template setup */
+	/* Request templat setup */
 	qat_alg_init_common_hdr(header, proto);
 	header->service_cmd_id = cdesc->qat_cmd;
 
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index 434ff81..1de95f1 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -304,6 +304,26 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* SNOW3G (UEA2) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.iv_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
@@ -562,6 +582,9 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_NULL:
 		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
 		break;
+	case RTE_CRYPTO_AUTH_KASUMI_F9:
+		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_KASUMI_F9;
+		break;
 	case RTE_CRYPTO_AUTH_SHA1:
 	case RTE_CRYPTO_AUTH_SHA256:
 	case RTE_CRYPTO_AUTH_SHA512:
@@ -570,7 +593,6 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_MD5:
 	case RTE_CRYPTO_AUTH_AES_CCM:
 	case RTE_CRYPTO_AUTH_AES_GMAC:
-	case RTE_CRYPTO_AUTH_KASUMI_F9:
 	case RTE_CRYPTO_AUTH_AES_CMAC:
 	case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 	case RTE_CRYPTO_AUTH_ZUC_EIA3:
@@ -817,6 +839,12 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 		auth_param->auth_off >>= 3;
 		auth_param->auth_len >>= 3;
 	}
+	if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
+		auth_param->auth_len = (auth_param->auth_len >> 3)
+					+ (auth_param->auth_off >> 3)
+					+ (BYTE_LENGTH >> 3);
+		auth_param->auth_off = 0;
+	}
 	auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
 
 	if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
-- 
2.5.5

[dpdk-dev] [PATCH 2/4] app/test: add Kasumi f9 tests in QAT test suite

[Deepak Kumar Jain]

This patch adds Kausmi f9 tests in the QAT tesuite and add
an additional test for Kasumi F9.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 app/test/test_cryptodev.c                          | 11 ++++++
 app/test/test_cryptodev_kasumi_hash_test_vectors.h | 43 ++++++++++++++++++++++
 2 files changed, 54 insertions(+)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 8553759..9cf4504 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -1967,6 +1967,12 @@ test_kasumi_hash_generate_test_case_5(void)
 }
 
 static int
+test_kasumi_hash_generate_test_case_6(void)
+{
+	return test_kasumi_authentication(&kasumi_hash_test_case_6);
+}
+
+static int
 test_kasumi_hash_verify_test_case_1(void)
 {
 	return test_kasumi_authentication_verify(&kasumi_hash_test_case_1);
@@ -4136,6 +4142,9 @@ static struct unit_test_suite cryptodev_qat_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_MD5_HMAC_verify_case_2),
 
+		/** KASUMI F9 Authentication only **/
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_hash_generate_test_case_6),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
@@ -4237,6 +4246,8 @@ static struct unit_test_suite cryptodev_sw_kasumi_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_generate_test_case_5),
 		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_hash_generate_test_case_6),
+		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_1),
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_2),
diff --git a/app/test/test_cryptodev_kasumi_hash_test_vectors.h b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
index c080b9f..fc48355 100644
--- a/app/test/test_cryptodev_kasumi_hash_test_vectors.h
+++ b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
@@ -257,4 +257,47 @@ struct kasumi_hash_test_data kasumi_hash_test_case_5 = {
 		.len  = 4
 	}
 };
+struct kasumi_hash_test_data kasumi_hash_test_case_6 = {
+	.key = {
+		.data = {
+			0x83, 0xFD, 0x23, 0xA2, 0x44, 0xA7, 0x4C, 0xF3,
+			0x58, 0xDA, 0x30, 0x19, 0xF1, 0x72, 0x26, 0x35
+		},
+		.len = 16
+	},
+	.aad = {
+		.data = {
+			0x36, 0xAF, 0x61, 0x44, 0x4F, 0x30, 0x2A, 0xD2
+		},
+		.len = 8
+	},
+	.plaintext = {
+		.data = {
+			0x35, 0xC6, 0x87, 0x16, 0x63, 0x3C, 0x66, 0xFB,
+			0x75, 0x0C, 0x26, 0x68, 0x65, 0xD5, 0x3C, 0x11,
+			0xEA, 0x05, 0xB1, 0xE9, 0xFA, 0x49, 0xC8, 0x39,
+			0x8D, 0x48, 0xE1, 0xEF, 0xA5, 0x90, 0x9D, 0x39,
+			0x47, 0x90, 0x28, 0x37, 0xF5, 0xAE, 0x96, 0xD5,
+			0xA0, 0x5B, 0xC8, 0xD6, 0x1C, 0xA8, 0xDB, 0xEF,
+			0x1B, 0x13, 0xA4, 0xB4, 0xAB, 0xFE, 0x4F, 0xB1,
+			0x00, 0x60, 0x45, 0xB6, 0x74, 0xBB, 0x54, 0x72,
+			0x93, 0x04, 0xC3, 0x82, 0xBE, 0x53, 0xA5, 0xAF,
+			0x05, 0x55, 0x61, 0x76, 0xF6, 0xEA, 0xA2, 0xEF,
+			0x1D, 0x05, 0xE4, 0xB0, 0x83, 0x18, 0x1E, 0xE6,
+			0x74, 0xCD, 0xA5, 0xA4, 0x85, 0xF7, 0x4D, 0x7A,
+			0xC0
+			},
+		.len = 776
+	},
+	.validAuthLenInBits = {
+		.len = 768
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x95, 0xAE, 0x41, 0xBA},
+		.len  = 4
+	}
+};
 #endif /* TEST_CRYPTODEV_KASUMI_HASH_TEST_VECTORS_H_ */
-- 
2.5.5

[dpdk-dev] [PATCH 3/4] crypto/qat: enable support of Kasumi F8 in QAT cryptodev

[Deepak Kumar Jain]

This patch enables the support of Kasumi F8
for Intel Quick Assist Technology.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 drivers/crypto/qat/qat_adf/qat_algs.h            |  3 +-
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 44 +++++++++++++++++++++---
 drivers/crypto/qat/qat_crypto.c                  | 39 +++++++++++++++++++--
 3 files changed, 78 insertions(+), 8 deletions(-)

diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h b/drivers/crypto/qat/qat_adf/qat_algs.h
index 0cc176f..fad8471 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -57,6 +57,7 @@
  */
 #define KASUMI_F9_KEY_MODIFIER_4_BYTES   0xAAAAAAAA
 
+#define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x55555555
 
 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
 	ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
@@ -137,5 +138,5 @@ void qat_alg_ablkcipher_init_dec(struct qat_alg_ablkcipher_cd *cd,
 
 int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
-
+int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 #endif
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index 085a652..9d1df56 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -457,7 +457,8 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 	uint32_t total_key_size;
 	uint16_t proto = ICP_QAT_FW_LA_NO_PROTO;	/* no CCM/GCM/Snow3G */
 	uint16_t cipher_offset, cd_size;
-
+	uint32_t wordIndex  = 0;
+	uint32_t *temp_key = NULL;
 	PMD_INIT_FUNC_TRACE();
 
 	if (cdesc->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
@@ -507,6 +508,11 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 		cipher_cd_ctrl->cipher_state_sz =
 			ICP_QAT_HW_SNOW_3G_UEA2_IV_SZ >> 3;
 		proto = ICP_QAT_FW_LA_SNOW_3G_PROTO;
+	} else if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
+		total_key_size = ICP_QAT_HW_KASUMI_F8_KEY_SZ;
+		cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_KASUMI_BLK_SZ >> 3;
+		cipher_cd_ctrl->cipher_padding_sz =
+					(2 * ICP_QAT_HW_KASUMI_BLK_SZ) >> 3;
 	} else {
 		total_key_size = cipherkeylen;
 		cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_AES_BLK_SZ >> 3;
@@ -524,9 +530,27 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 	    ICP_QAT_HW_CIPHER_CONFIG_BUILD(cdesc->qat_mode,
 					cdesc->qat_cipher_alg, key_convert,
 					cdesc->qat_dir);
-	memcpy(cipher->aes.key, cipherkey, cipherkeylen);
-	cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
-			cipherkeylen;
+
+	if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
+		temp_key = (uint32_t *)(cdesc->cd_cur_ptr +
+					sizeof(struct icp_qat_hw_cipher_config)
+					+ cipherkeylen);
+		memcpy(cipher->aes.key, cipherkey, cipherkeylen);
+		memcpy(temp_key, cipherkey, cipherkeylen);
+
+		/* XOR Key with KASUMI F8 key modifier at 4 bytes level */
+		for (wordIndex = 0; wordIndex < (cipherkeylen >> 2);
+								wordIndex++)
+			temp_key[wordIndex] ^= KASUMI_F8_KEY_MODIFIER_4_BYTES;
+
+		cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
+					cipherkeylen + cipherkeylen;
+	} else {
+		memcpy(cipher->aes.key, cipherkey, cipherkeylen);
+		cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
+					cipherkeylen;
+	}
+
 	if (total_key_size > cipherkeylen) {
 		uint32_t padding_size =  total_key_size-cipherkeylen;
 
@@ -859,3 +883,15 @@ int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
 	}
 	return 0;
 }
+
+int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
+{
+	switch (key_len) {
+	case ICP_QAT_HW_KASUMI_KEY_SZ:
+		*alg = ICP_QAT_HW_CIPHER_ALGO_KASUMI;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index 1de95f1..1282312 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -324,6 +324,31 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* SNOW3G (UIA2) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_KASUMI_F9,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.digest_size = {
+					.min = 4,
+					.max = 4,
+					.increment = 0
+				},
+				.aad_size = {
+					.min = 8,
+					.max = 8,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
@@ -449,11 +474,18 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_CIPHER_NULL:
 		session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 		break;
+	case RTE_CRYPTO_CIPHER_KASUMI_F8:
+		if (qat_alg_validate_kasumi_key(cipher_xform->key.length,
+					&session->qat_cipher_alg) != 0) {
+			PMD_DRV_LOG(ERR, "Invalid KASUMI cipher key size");
+			goto error_out;
+		}
+		session->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;
+		break;
 	case RTE_CRYPTO_CIPHER_3DES_ECB:
 	case RTE_CRYPTO_CIPHER_3DES_CBC:
 	case RTE_CRYPTO_CIPHER_AES_ECB:
 	case RTE_CRYPTO_CIPHER_AES_CCM:
-	case RTE_CRYPTO_CIPHER_KASUMI_F8:
 		PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
 				cipher_xform->algo);
 		goto error_out;
@@ -796,11 +828,12 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 
 	cipher_param->cipher_length = op->sym->cipher.data.length;
 	cipher_param->cipher_offset = op->sym->cipher.data.offset;
-	if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2) {
+	if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
+			ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
 		if (unlikely((cipher_param->cipher_length % BYTE_LENGTH != 0) ||
 				(cipher_param->cipher_offset
 					% BYTE_LENGTH != 0))) {
-			PMD_DRV_LOG(ERR, " For Snow3g, QAT PMD only "
+			PMD_DRV_LOG(ERR, " For Snow3g/Kasumi, QAT PMD only "
 				"supports byte aligned values");
 			op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 			return -EINVAL;
-- 
2.5.5

[dpdk-dev] [PATCH 4/4] app/test: add kasumi f8 test into QAT testsuite

[Deepak Kumar Jain]

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 app/test/test_cryptodev.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 9cf4504..fdcdbeb 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -4145,6 +4145,11 @@ static struct unit_test_suite cryptodev_qat_testsuite  = {
 		/** KASUMI F9 Authentication only **/
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_generate_test_case_6),
+
+		/** KASUMI encrypt only (F8) */
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_encryption_test_case_1),
+
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[dpdk-dev] [PATCH v2 0/4] add kasumi in Intel(R) QuickAssist driver

[Deepak Kumar Jain]

This patchset contains patches to enable kasumi cipher only and hash only functionality in Intel(R) QuickAsisst Technology Driver.

This patchset depends on following patch:
"crypto/qat: add NULL capability to Intel QAT driver"
(http://dpdk.org/dev/patchwork/patch/15230/)

Changes since V1:
* Updated Test code to apply cleanly on driver code
* Added relevant documentation

Deepak Kumar JAIN (4):
  crypto/qat: enable Kasumi F9 support in QAT driver
  app/test: add Kasumi f9 tests in QAT test suite
  crypto/qat: enable support of Kasumi F8 in QAT cryptodev
  app/test: add kasumi f8 test into QAT testsuite

 app/test/test_cryptodev.c                          | 16 +++++
 app/test/test_cryptodev_kasumi_hash_test_vectors.h | 43 +++++++++++++
 doc/guides/cryptodevs/qat.rst                      | 10 +--
 drivers/crypto/qat/qat_adf/qat_algs.h              | 10 ++-
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c   | 74 ++++++++++++++++++++--
 drivers/crypto/qat/qat_crypto.c                    | 69 ++++++++++++++++++--
 6 files changed, 207 insertions(+), 15 deletions(-)

-- 
2.5.5

[dpdk-dev] [PATCH v2 1/4] crypto/qat: enable Kasumi F9 support in QAT driver

[Deepak Kumar Jain]

From: Deepak Kumar JAIN <deepak.k.jain@intel.com>

The changes in this patch enables the Kasumi F9 functionality
for Intel Quick Assist Technology

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 doc/guides/cryptodevs/qat.rst                    |  5 ++--
 drivers/crypto/qat/qat_adf/qat_algs.h            |  7 ++++++
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 30 ++++++++++++++++++++++--
 drivers/crypto/qat/qat_crypto.c                  | 30 +++++++++++++++++++++++-
 4 files changed, 67 insertions(+), 5 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index f6091dd..6b73d95 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -63,17 +63,18 @@ Hash algorithms:
 * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
 * ``RTE_CRYPTO_AUTH_MD5_HMAC``
 * ``RTE_CRYPTO_AUTH_NULL``
+* ``RTE_CRYPTO_AUTH_KASUMI_F9``
 
 Limitations
 -----------
 
 * Chained mbufs are not supported.
-* Hash only is not supported except Snow3G UIA2.
+* Hash only is not supported except Snow3G UIA2 and KASUMI F9.
 * Cipher only is not supported except Snow3G UEA2.
 * Only supports the session-oriented API implementation (session-less APIs are not supported).
 * Not performance tuned.
 * Snow3g(UEA2) supported only if cipher length, cipher offset fields are byte-aligned.
-* Snow3g(UIA2) supported only if hash length, hash offset fields are byte-aligned.
+* Snow3g(UIA2) and KASUMI(F9) supported only if hash length, hash offset fields are byte-aligned.
 * No BSD support as BSD QAT kernel driver not available.
 
 
diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h b/drivers/crypto/qat/qat_adf/qat_algs.h
index 6a86053..0cc176f 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -51,6 +51,13 @@
 #include "icp_qat_fw.h"
 #include "icp_qat_fw_la.h"
 
+/*
+ * Key Modifier (KM) value used in Kasumi algorithm in F9 mode to XOR
+ * Integrity Key (IK)
+ */
+#define KASUMI_F9_KEY_MODIFIER_4_BYTES   0xAAAAAAAA
+
+
 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
 	ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
 					ICP_QAT_HW_CIPHER_NO_CONVERT, \
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index d9437bc..085a652 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -96,6 +96,9 @@ static int qat_hash_get_state1_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 	case ICP_QAT_HW_AUTH_ALGO_MD5:
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_MD5_STATE1_SZ,
 						QAT_HW_DEFAULT_ALIGNMENT);
+	case ICP_QAT_HW_AUTH_ALGO_KASUMI_F9:
+		return QAT_HW_ROUND_UP(ICP_QAT_HW_KASUMI_F9_STATE1_SZ,
+						QAT_HW_DEFAULT_ALIGNMENT);
 	case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
 		/* return maximum state1 size in this case */
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA512_STATE1_SZ,
@@ -559,6 +562,8 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 	uint16_t state1_size = 0, state2_size = 0;
 	uint16_t hash_offset, cd_size;
 	uint32_t *aad_len = NULL;
+	uint32_t wordIndex  = 0;
+	uint32_t *pTempKey;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -605,7 +610,8 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 			ICP_QAT_HW_AUTH_CONFIG_BUILD(ICP_QAT_HW_AUTH_MODE1,
 				cdesc->qat_hash_alg, digestsize);
 
-	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2)
+	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2
+		|| cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9)
 		hash->auth_counter.counter = 0;
 	else
 		hash->auth_counter.counter = rte_bswap32(
@@ -722,12 +728,32 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 		break;
 	case ICP_QAT_HW_AUTH_ALGO_NULL:
 		break;
+	case ICP_QAT_HW_AUTH_ALGO_KASUMI_F9:
+		state1_size = qat_hash_get_state1_size(
+				ICP_QAT_HW_AUTH_ALGO_KASUMI_F9);
+		state2_size = ICP_QAT_HW_KASUMI_F9_STATE2_SZ;
+		memset(cdesc->cd_cur_ptr, 0, state1_size + state2_size);
+		pTempKey = (uint32_t *)(cdesc->cd_cur_ptr + state1_size
+								+ authkeylen);
+		/*
+		** The Inner Hash Initial State2 block must contain IK
+		** (Initialisation Key), followed by IK XOR-ed with KM
+		** (Key Modifier): IK||(IK^KM).
+		**/
+		/* write the auth key */
+		memcpy(cdesc->cd_cur_ptr + state1_size, authkey, authkeylen);
+		/* initialise temp key with auth key */
+		memcpy(pTempKey, authkey, authkeylen);
+		/* XOR Key with KASUMI F9 key modifier at 4 bytes level */
+		for (wordIndex = 0; wordIndex < (authkeylen >> 2); wordIndex++)
+			pTempKey[wordIndex] ^= KASUMI_F9_KEY_MODIFIER_4_BYTES;
+		break;
 	default:
 		PMD_DRV_LOG(ERR, "Invalid HASH alg %u", cdesc->qat_hash_alg);
 		return -EFAULT;
 	}
 
-	/* Request template setup */
+	/* Request templat setup */
 	qat_alg_init_common_hdr(header, proto);
 	header->service_cmd_id = cdesc->qat_cmd;
 
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index 434ff81..1de95f1 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -304,6 +304,26 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* SNOW3G (UEA2) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.iv_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
@@ -562,6 +582,9 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_NULL:
 		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
 		break;
+	case RTE_CRYPTO_AUTH_KASUMI_F9:
+		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_KASUMI_F9;
+		break;
 	case RTE_CRYPTO_AUTH_SHA1:
 	case RTE_CRYPTO_AUTH_SHA256:
 	case RTE_CRYPTO_AUTH_SHA512:
@@ -570,7 +593,6 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_MD5:
 	case RTE_CRYPTO_AUTH_AES_CCM:
 	case RTE_CRYPTO_AUTH_AES_GMAC:
-	case RTE_CRYPTO_AUTH_KASUMI_F9:
 	case RTE_CRYPTO_AUTH_AES_CMAC:
 	case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 	case RTE_CRYPTO_AUTH_ZUC_EIA3:
@@ -817,6 +839,12 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 		auth_param->auth_off >>= 3;
 		auth_param->auth_len >>= 3;
 	}
+	if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
+		auth_param->auth_len = (auth_param->auth_len >> 3)
+					+ (auth_param->auth_off >> 3)
+					+ (BYTE_LENGTH >> 3);
+		auth_param->auth_off = 0;
+	}
 	auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
 
 	if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
-- 
2.5.5

[dpdk-dev] [PATCH v2 2/4] app/test: add Kasumi f9 tests in QAT test suite

[Deepak Kumar Jain]

From: Deepak Kumar JAIN <deepak.k.jain@intel.com>

This patch adds Kausmi f9 tests in the QAT tesuite and add
an additional test for Kasumi F9.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 app/test/test_cryptodev.c                          | 12 ++++++
 app/test/test_cryptodev_kasumi_hash_test_vectors.h | 43 ++++++++++++++++++++++
 2 files changed, 55 insertions(+)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 67ca912..a0dae4f 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -1967,6 +1967,12 @@ test_kasumi_hash_generate_test_case_5(void)
 }
 
 static int
+test_kasumi_hash_generate_test_case_6(void)
+{
+	return test_kasumi_authentication(&kasumi_hash_test_case_6);
+}
+
+static int
 test_kasumi_hash_verify_test_case_1(void)
 {
 	return test_kasumi_authentication_verify(&kasumi_hash_test_case_1);
@@ -4146,6 +4152,10 @@ static struct unit_test_suite cryptodev_qat_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_null_auth_cipher_operation),
 
+		/** KASUMI F9 Authentication only **/
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_hash_generate_test_case_6),
+
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
@@ -4247,6 +4257,8 @@ static struct unit_test_suite cryptodev_sw_kasumi_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_generate_test_case_5),
 		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_hash_generate_test_case_6),
+		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_1),
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_2),
diff --git a/app/test/test_cryptodev_kasumi_hash_test_vectors.h b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
index c080b9f..fc48355 100644
--- a/app/test/test_cryptodev_kasumi_hash_test_vectors.h
+++ b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
@@ -257,4 +257,47 @@ struct kasumi_hash_test_data kasumi_hash_test_case_5 = {
 		.len  = 4
 	}
 };
+struct kasumi_hash_test_data kasumi_hash_test_case_6 = {
+	.key = {
+		.data = {
+			0x83, 0xFD, 0x23, 0xA2, 0x44, 0xA7, 0x4C, 0xF3,
+			0x58, 0xDA, 0x30, 0x19, 0xF1, 0x72, 0x26, 0x35
+		},
+		.len = 16
+	},
+	.aad = {
+		.data = {
+			0x36, 0xAF, 0x61, 0x44, 0x4F, 0x30, 0x2A, 0xD2
+		},
+		.len = 8
+	},
+	.plaintext = {
+		.data = {
+			0x35, 0xC6, 0x87, 0x16, 0x63, 0x3C, 0x66, 0xFB,
+			0x75, 0x0C, 0x26, 0x68, 0x65, 0xD5, 0x3C, 0x11,
+			0xEA, 0x05, 0xB1, 0xE9, 0xFA, 0x49, 0xC8, 0x39,
+			0x8D, 0x48, 0xE1, 0xEF, 0xA5, 0x90, 0x9D, 0x39,
+			0x47, 0x90, 0x28, 0x37, 0xF5, 0xAE, 0x96, 0xD5,
+			0xA0, 0x5B, 0xC8, 0xD6, 0x1C, 0xA8, 0xDB, 0xEF,
+			0x1B, 0x13, 0xA4, 0xB4, 0xAB, 0xFE, 0x4F, 0xB1,
+			0x00, 0x60, 0x45, 0xB6, 0x74, 0xBB, 0x54, 0x72,
+			0x93, 0x04, 0xC3, 0x82, 0xBE, 0x53, 0xA5, 0xAF,
+			0x05, 0x55, 0x61, 0x76, 0xF6, 0xEA, 0xA2, 0xEF,
+			0x1D, 0x05, 0xE4, 0xB0, 0x83, 0x18, 0x1E, 0xE6,
+			0x74, 0xCD, 0xA5, 0xA4, 0x85, 0xF7, 0x4D, 0x7A,
+			0xC0
+			},
+		.len = 776
+	},
+	.validAuthLenInBits = {
+		.len = 768
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x95, 0xAE, 0x41, 0xBA},
+		.len  = 4
+	}
+};
 #endif /* TEST_CRYPTODEV_KASUMI_HASH_TEST_VECTORS_H_ */
-- 
2.5.5

[dpdk-dev] [PATCH v2 3/4] crypto/qat: enable support of Kasumi F8 in QAT cryptodev

[Deepak Kumar Jain]

From: Deepak Kumar JAIN <deepak.k.jain@intel.com>

This patch enables the support of Kasumi F8
for Intel Quick Assist Technology.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 doc/guides/cryptodevs/qat.rst                    |  5 +--
 drivers/crypto/qat/qat_adf/qat_algs.h            |  3 +-
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 44 +++++++++++++++++++++---
 drivers/crypto/qat/qat_crypto.c                  | 39 +++++++++++++++++++--
 4 files changed, 81 insertions(+), 10 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 6b73d95..0502483 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -51,6 +51,7 @@ Cipher algorithms:
 * ``RTE_CRYPTO_SYM_CIPHER_SNOW3G_UEA2``
 * ``RTE_CRYPTO_CIPHER_AES_GCM``
 * ``RTE_CRYPTO_CIPHER_NULL``
+* ``RTE_CRYPTO_CIPHER_KASUMI_F8``
 
 Hash algorithms:
 
@@ -70,10 +71,10 @@ Limitations
 
 * Chained mbufs are not supported.
 * Hash only is not supported except Snow3G UIA2 and KASUMI F9.
-* Cipher only is not supported except Snow3G UEA2.
+* Cipher only is not supported except Snow3G UEA2 and KASUMI F8.
 * Only supports the session-oriented API implementation (session-less APIs are not supported).
 * Not performance tuned.
-* Snow3g(UEA2) supported only if cipher length, cipher offset fields are byte-aligned.
+* Snow3g(UEA2) and KAUSMI(F8) supported only if cipher length, cipher offset fields are byte-aligned.
 * Snow3g(UIA2) and KASUMI(F9) supported only if hash length, hash offset fields are byte-aligned.
 * No BSD support as BSD QAT kernel driver not available.
 
diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h b/drivers/crypto/qat/qat_adf/qat_algs.h
index 0cc176f..fad8471 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -57,6 +57,7 @@
  */
 #define KASUMI_F9_KEY_MODIFIER_4_BYTES   0xAAAAAAAA
 
+#define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x55555555
 
 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
 	ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
@@ -137,5 +138,5 @@ void qat_alg_ablkcipher_init_dec(struct qat_alg_ablkcipher_cd *cd,
 
 int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
-
+int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 #endif
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index 085a652..9d1df56 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -457,7 +457,8 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 	uint32_t total_key_size;
 	uint16_t proto = ICP_QAT_FW_LA_NO_PROTO;	/* no CCM/GCM/Snow3G */
 	uint16_t cipher_offset, cd_size;
-
+	uint32_t wordIndex  = 0;
+	uint32_t *temp_key = NULL;
 	PMD_INIT_FUNC_TRACE();
 
 	if (cdesc->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
@@ -507,6 +508,11 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 		cipher_cd_ctrl->cipher_state_sz =
 			ICP_QAT_HW_SNOW_3G_UEA2_IV_SZ >> 3;
 		proto = ICP_QAT_FW_LA_SNOW_3G_PROTO;
+	} else if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
+		total_key_size = ICP_QAT_HW_KASUMI_F8_KEY_SZ;
+		cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_KASUMI_BLK_SZ >> 3;
+		cipher_cd_ctrl->cipher_padding_sz =
+					(2 * ICP_QAT_HW_KASUMI_BLK_SZ) >> 3;
 	} else {
 		total_key_size = cipherkeylen;
 		cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_AES_BLK_SZ >> 3;
@@ -524,9 +530,27 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 	    ICP_QAT_HW_CIPHER_CONFIG_BUILD(cdesc->qat_mode,
 					cdesc->qat_cipher_alg, key_convert,
 					cdesc->qat_dir);
-	memcpy(cipher->aes.key, cipherkey, cipherkeylen);
-	cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
-			cipherkeylen;
+
+	if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
+		temp_key = (uint32_t *)(cdesc->cd_cur_ptr +
+					sizeof(struct icp_qat_hw_cipher_config)
+					+ cipherkeylen);
+		memcpy(cipher->aes.key, cipherkey, cipherkeylen);
+		memcpy(temp_key, cipherkey, cipherkeylen);
+
+		/* XOR Key with KASUMI F8 key modifier at 4 bytes level */
+		for (wordIndex = 0; wordIndex < (cipherkeylen >> 2);
+								wordIndex++)
+			temp_key[wordIndex] ^= KASUMI_F8_KEY_MODIFIER_4_BYTES;
+
+		cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
+					cipherkeylen + cipherkeylen;
+	} else {
+		memcpy(cipher->aes.key, cipherkey, cipherkeylen);
+		cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
+					cipherkeylen;
+	}
+
 	if (total_key_size > cipherkeylen) {
 		uint32_t padding_size =  total_key_size-cipherkeylen;
 
@@ -859,3 +883,15 @@ int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
 	}
 	return 0;
 }
+
+int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
+{
+	switch (key_len) {
+	case ICP_QAT_HW_KASUMI_KEY_SZ:
+		*alg = ICP_QAT_HW_CIPHER_ALGO_KASUMI;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index 1de95f1..1282312 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -324,6 +324,31 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* SNOW3G (UIA2) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_KASUMI_F9,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.digest_size = {
+					.min = 4,
+					.max = 4,
+					.increment = 0
+				},
+				.aad_size = {
+					.min = 8,
+					.max = 8,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
@@ -449,11 +474,18 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_CIPHER_NULL:
 		session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 		break;
+	case RTE_CRYPTO_CIPHER_KASUMI_F8:
+		if (qat_alg_validate_kasumi_key(cipher_xform->key.length,
+					&session->qat_cipher_alg) != 0) {
+			PMD_DRV_LOG(ERR, "Invalid KASUMI cipher key size");
+			goto error_out;
+		}
+		session->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;
+		break;
 	case RTE_CRYPTO_CIPHER_3DES_ECB:
 	case RTE_CRYPTO_CIPHER_3DES_CBC:
 	case RTE_CRYPTO_CIPHER_AES_ECB:
 	case RTE_CRYPTO_CIPHER_AES_CCM:
-	case RTE_CRYPTO_CIPHER_KASUMI_F8:
 		PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
 				cipher_xform->algo);
 		goto error_out;
@@ -796,11 +828,12 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 
 	cipher_param->cipher_length = op->sym->cipher.data.length;
 	cipher_param->cipher_offset = op->sym->cipher.data.offset;
-	if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2) {
+	if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
+			ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
 		if (unlikely((cipher_param->cipher_length % BYTE_LENGTH != 0) ||
 				(cipher_param->cipher_offset
 					% BYTE_LENGTH != 0))) {
-			PMD_DRV_LOG(ERR, " For Snow3g, QAT PMD only "
+			PMD_DRV_LOG(ERR, " For Snow3g/Kasumi, QAT PMD only "
 				"supports byte aligned values");
 			op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 			return -EINVAL;
-- 
2.5.5

[dpdk-dev] [PATCH v2 4/4] app/test: add kasumi f8 test into QAT testsuite

[Deepak Kumar Jain]

From: Deepak Kumar JAIN <deepak.k.jain@intel.com>

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 app/test/test_cryptodev.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index a0dae4f..fa16d32 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -4156,6 +4156,10 @@ static struct unit_test_suite cryptodev_qat_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_generate_test_case_6),
 
+		/** KASUMI encrypt only (F8) */
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_encryption_test_case_1),
+
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
-- 
2.5.5

[dpdk-dev] [PATCH v3 0/3] add kasumi in Intel(R) QuickAssist driver

[Deepak Kumar Jain]

This patchset contains patches to enable kasumi
functionality in Intel(R) QuickAsisst Technology Driver.

This patchset depends on following patch:
"crypto/qat: add Intel(R) QuickAssist C3xxx device"
(http://dpdk.org/dev/patchwork/patch/15794/

Deepak Kumar Jain (3):
  app/test: cleanup of test code for kasumi
  crypto/qat: add Kasumi support in Intel(R) QAT driver
  app/test: add Kasumi tests in QAT test suite

Changes in v3:
* Merged Cipher only and hash only patches into one patch.
* Code cleaup for clear understanding.

Changes in v2:
* Updated Test code to apply cleanly on driver code
* Added relevant documentation

 app/test/test_cryptodev.c                          | 361 ++++++++++++++++-----
 app/test/test_cryptodev_kasumi_hash_test_vectors.h |  76 +++++
 app/test/test_cryptodev_kasumi_test_vectors.h      | 103 +++++-
 doc/guides/cryptodevs/qat.rst                      |  10 +-
 doc/guides/rel_notes/release_16_11.rst             |   2 +-
 drivers/crypto/qat/qat_adf/qat_algs.h              |  10 +-
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c   |  72 +++-
 drivers/crypto/qat/qat_crypto.c                    |  79 ++++-
 8 files changed, 614 insertions(+), 99 deletions(-)

-- 
2.5.5

[dpdk-dev] [PATCH v3 1/3] app/test: cleanup of test code for kasumi

[Deepak Kumar Jain]

Cleanup for easier kasumi enabling.
Changed name of funcitons for clear understanding.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 app/test/test_cryptodev.c | 117 ++++++++++++++++++++++------------------------
 1 file changed, 55 insertions(+), 62 deletions(-)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 67ca912..89d627f 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -1448,74 +1448,67 @@ create_snow3g_kasumi_cipher_hash_operation(const uint8_t *auth_tag,
 	/* set crypto operation source mbuf */
 	sym_op->m_src = ut_params->ibuf;
 
+	/* digest */
+	sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
+			ut_params->ibuf, auth_tag_len);
 
-	/* iv */
-	if (cipher_algo == RTE_CRYPTO_CIPHER_KASUMI_F8)
-		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 8);
+	TEST_ASSERT_NOT_NULL(sym_op->auth.digest.data,
+			"no room to append auth tag");
+	ut_params->digest = sym_op->auth.digest.data;
+	sym_op->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(
+			ut_params->ibuf, data_pad_len);
+	sym_op->auth.digest.length = auth_tag_len;
+	if (op == RTE_CRYPTO_AUTH_OP_GENERATE)
+		memset(sym_op->auth.digest.data, 0, auth_tag_len);
 	else
-		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 16);
-
-	sym_op->cipher.iv.data = (uint8_t *)rte_pktmbuf_prepend(
-		ut_params->ibuf, iv_pad_len);
-	TEST_ASSERT_NOT_NULL(sym_op->cipher.iv.data, "no room to prepend iv");
-
-	memset(sym_op->cipher.iv.data, 0, iv_pad_len);
-	sym_op->cipher.iv.phys_addr = rte_pktmbuf_mtophys(ut_params->ibuf);
-	sym_op->cipher.iv.length = iv_pad_len;
-
-	rte_memcpy(sym_op->cipher.iv.data, iv, iv_len);
+		rte_memcpy(sym_op->auth.digest.data, auth_tag, auth_tag_len);
 
-	sym_op->cipher.data.length = cipher_len;
-	sym_op->cipher.data.offset = cipher_offset;
+	TEST_HEXDUMP(stdout, "digest:",
+		sym_op->auth.digest.data,
+		sym_op->auth.digest.length);
 
 	/* aad */
-	/*
-	* Always allocate the aad up to the block size.
-	* The cryptodev API calls out -
-	*  - the array must be big enough to hold the AAD, plus any
-	*   space to round this up to the nearest multiple of the
-	*   block size (8 bytes for KASUMI and 16 bytes for SNOW3G).
-	*/
+		/*
+		* Always allocate the aad up to the block size.
+		* The cryptodev API calls out -
+		*  - the array must be big enough to hold the AAD, plus any
+		*   space to round this up to the nearest multiple of the
+		*   block size (8 bytes for KASUMI and 16 bytes for SNOW3G).
+		*/
 	if (auth_algo == RTE_CRYPTO_AUTH_KASUMI_F9)
 		aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 8);
 	else
 		aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 16);
-
 	sym_op->auth.aad.data =
-			(uint8_t *)rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *);
+		(uint8_t *)rte_pktmbuf_prepend(
+			ut_params->ibuf, aad_buffer_len);
 	TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
 			"no room to prepend aad");
 	sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(
 			ut_params->ibuf);
 	sym_op->auth.aad.length = aad_len;
-
-	memset(sym_op->auth.aad.data, 0, aad_buffer_len);
+		memset(sym_op->auth.aad.data, 0, aad_buffer_len);
 	rte_memcpy(sym_op->auth.aad.data, aad, aad_len);
+		TEST_HEXDUMP(stdout, "aad:",
+		sym_op->auth.aad.data, aad_len);
 
-	TEST_HEXDUMP(stdout, "aad:",
-			sym_op->auth.aad.data, aad_len);
-
-	/* digest */
-	sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
-			ut_params->ibuf, auth_tag_len);
-
-	TEST_ASSERT_NOT_NULL(sym_op->auth.digest.data,
-			"no room to append auth tag");
-	ut_params->digest = sym_op->auth.digest.data;
-	sym_op->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(
-			ut_params->ibuf, data_pad_len + aad_len);
-	sym_op->auth.digest.length = auth_tag_len;
-	if (op == RTE_CRYPTO_AUTH_OP_GENERATE)
-		memset(sym_op->auth.digest.data, 0, auth_tag_len);
+		/* iv */
+	if (cipher_algo == RTE_CRYPTO_CIPHER_KASUMI_F8)
+		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 8);
 	else
-		rte_memcpy(sym_op->auth.digest.data, auth_tag, auth_tag_len);
-
-	TEST_HEXDUMP(stdout, "digest:",
-		sym_op->auth.digest.data,
-		sym_op->auth.digest.length);
+		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 16);
+	sym_op->cipher.iv.data = (uint8_t *)rte_pktmbuf_prepend(
+		ut_params->ibuf, iv_pad_len);
 
-	sym_op->auth.data.length = auth_len;
-	sym_op->auth.data.offset = auth_offset;
+	TEST_ASSERT_NOT_NULL(sym_op->cipher.iv.data, "no room to prepend iv");
+	memset(sym_op->cipher.iv.data, 0, iv_pad_len);
+	sym_op->cipher.iv.phys_addr = rte_pktmbuf_mtophys(ut_params->ibuf);
+	sym_op->cipher.iv.length = iv_pad_len;
+		rte_memcpy(sym_op->cipher.iv.data, iv, iv_len);
+		sym_op->cipher.data.length = cipher_len;
+	sym_op->cipher.data.offset = cipher_offset + auth_offset;
+		sym_op->auth.data.length = auth_len;
+	sym_op->auth.data.offset = auth_offset + cipher_offset;
 
 	return 0;
 }
@@ -2655,7 +2648,7 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
 }
 
 static int
-test_snow3g_authenticated_encryption(const struct snow3g_test_data *tdata)
+test_snow3g_cipher_auth(const struct snow3g_test_data *tdata)
 {
 	struct crypto_testsuite_params *ts_params = &testsuite_params;
 	struct crypto_unittest_params *ut_params = &unittest_params;
@@ -2714,12 +2707,12 @@ test_snow3g_authenticated_encryption(const struct snow3g_test_data *tdata)
 	ut_params->obuf = ut_params->op->sym->m_src;
 	if (ut_params->obuf)
 		ciphertext = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
-				+ tdata->iv.len;
+				+ tdata->iv.len + tdata->aad.len;
 	else
 		ciphertext = plaintext;
 
 	TEST_HEXDUMP(stdout, "ciphertext:", ciphertext, plaintext_len);
-
+	TEST_HEXDUMP(stdout, "OUTPUT BUFFER:", ut_params->obuf, 512);
 	/* Validate obuf */
 	TEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(
 			ciphertext,
@@ -2728,7 +2721,7 @@ test_snow3g_authenticated_encryption(const struct snow3g_test_data *tdata)
 			"Snow3G Ciphertext data not as expected");
 
 	ut_params->digest = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
-	    + plaintext_pad_len + tdata->aad.len;
+	    + plaintext_pad_len + tdata->aad.len + tdata->iv.len;
 
 	/* Validate obuf */
 	TEST_ASSERT_BUFFERS_ARE_EQUAL(
@@ -2739,7 +2732,7 @@ test_snow3g_authenticated_encryption(const struct snow3g_test_data *tdata)
 	return 0;
 }
 static int
-test_snow3g_encrypted_authentication(const struct snow3g_test_data *tdata)
+test_snow3g_auth_cipher(const struct snow3g_test_data *tdata)
 {
 	struct crypto_testsuite_params *ts_params = &testsuite_params;
 	struct crypto_unittest_params *ut_params = &unittest_params;
@@ -2973,15 +2966,15 @@ test_snow3g_decryption_test_case_5(void)
 	return test_snow3g_decryption(&snow3g_test_case_5);
 }
 static int
-test_snow3g_authenticated_encryption_test_case_1(void)
+test_snow3g_cipher_auth_test_case_1(void)
 {
-	return test_snow3g_authenticated_encryption(&snow3g_test_case_3);
+	return test_snow3g_cipher_auth(&snow3g_test_case_3);
 }
 
 static int
-test_snow3g_encrypted_authentication_test_case_1(void)
+test_snow3g_auth_cipher_test_case_1(void)
 {
-	return test_snow3g_encrypted_authentication(&snow3g_test_case_6);
+	return test_snow3g_auth_cipher(&snow3g_test_case_6);
 }
 
 /* ***** AES-GCM Tests ***** */
@@ -4122,9 +4115,9 @@ static struct unit_test_suite cryptodev_qat_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_snow3g_hash_verify_test_case_3),
 		TEST_CASE_ST(ut_setup, ut_teardown,
-			test_snow3g_authenticated_encryption_test_case_1),
+			test_snow3g_cipher_auth_test_case_1),
 		TEST_CASE_ST(ut_setup, ut_teardown,
-			test_snow3g_encrypted_authentication_test_case_1),
+			test_snow3g_auth_cipher_test_case_1),
 
 		/** HMAC_MD5 Authentication */
 		TEST_CASE_ST(ut_setup, ut_teardown,
@@ -4323,9 +4316,9 @@ static struct unit_test_suite cryptodev_sw_snow3g_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_snow3g_hash_verify_test_case_6),
 		TEST_CASE_ST(ut_setup, ut_teardown,
-			test_snow3g_authenticated_encryption_test_case_1),
+			test_snow3g_cipher_auth_test_case_1),
 		TEST_CASE_ST(ut_setup, ut_teardown,
-			test_snow3g_encrypted_authentication_test_case_1),
+			test_snow3g_auth_cipher_test_case_1),
 
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
-- 
2.5.5

Re: [dpdk-dev] [PATCH v3 1/3] app/test: cleanup of test code for kasumi

[Trahe, Fiona]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Deepak Kumar Jain
> Sent: Thursday, September 15, 2016 11:04 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>; Jain, Deepak K
> <deepak.k.jain@intel.com>
> Subject: [dpdk-dev] [PATCH v3 1/3] app/test: cleanup of test code for kasumi
> 
> Cleanup for easier kasumi enabling.
> Changed name of funcitons for clear understanding.
> 
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

Re: [dpdk-dev] [PATCH v3 1/3] app/test: cleanup of test code for kasumi

[De Lara Guarch, Pablo]

Hi Deepak,

> -----Original Message-----
> From: Jain, Deepak K
> Sent: Thursday, September 15, 2016 3:04 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo; Jain, Deepak K
> Subject: [PATCH v3 1/3] app/test: cleanup of test code for kasumi
> 
> Cleanup for easier kasumi enabling.
> Changed name of funcitons for clear understanding.

Typo in "funcitons".

Could you split this patch in two? One for the rename the functions and another one for the rest.
Actually, are you doing something else apart from cleanup/reordering?

> 
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
> ---
>  app/test/test_cryptodev.c | 117 ++++++++++++++++++++++------------------------
>  1 file changed, 55 insertions(+), 62 deletions(-)
> 
> diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
> index 67ca912..89d627f 100644
> --- a/app/test/test_cryptodev.c
> +++ b/app/test/test_cryptodev.c
> @@ -1448,74 +1448,67 @@
> create_snow3g_kasumi_cipher_hash_operation(const uint8_t *auth_tag,

...

>  	TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
>  			"no room to prepend aad");
>  	sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(
>  			ut_params->ibuf);
>  	sym_op->auth.aad.length = aad_len;
> -
> -	memset(sym_op->auth.aad.data, 0, aad_buffer_len);
> +		memset(sym_op->auth.aad.data, 0, aad_buffer_len);

No need to include extra tab.

>  	rte_memcpy(sym_op->auth.aad.data, aad, aad_len);
> +		TEST_HEXDUMP(stdout, "aad:",
> +		sym_op->auth.aad.data, aad_len);

No need to include extra tab.

> 
> -	TEST_HEXDUMP(stdout, "aad:",
> -			sym_op->auth.aad.data, aad_len);
> -
> -	/* digest */
> -	sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
> -			ut_params->ibuf, auth_tag_len);

...

> @@ -2714,12 +2707,12 @@ test_snow3g_authenticated_encryption(const
> struct snow3g_test_data *tdata)
>  	ut_params->obuf = ut_params->op->sym->m_src;
>  	if (ut_params->obuf)
>  		ciphertext = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
> -				+ tdata->iv.len;
> +				+ tdata->iv.len + tdata->aad.len;
>  	else
>  		ciphertext = plaintext;
> 
>  	TEST_HEXDUMP(stdout, "ciphertext:", ciphertext, plaintext_len);
> -
> +	TEST_HEXDUMP(stdout, "OUTPUT BUFFER:", ut_params->obuf, 512);

Magic number? What are you showing here?

>  	/* Validate obuf */
>  	TEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(
>  			ciphertext,
> @@ -2728,7 +2721,7 @@ test_snow3g_authenticated_encryption(const
> struct snow3g_test_data *tdata)
>  			"Snow3G Ciphertext data not as expected");
> 

Re: [dpdk-dev] [PATCH v3 1/3] app/test: cleanup of test code for kasumi

[Jain, Deepak K]

Hi Pablo,

> -----Original Message-----
> From: De Lara Guarch, Pablo
> Sent: Saturday, September 17, 2016 2:00 AM
> To: Jain, Deepak K <deepak.k.jain@intel.com>; dev@dpdk.org
> Subject: RE: [PATCH v3 1/3] app/test: cleanup of test code for kasumi
> 
> Hi Deepak,
> 
> > -----Original Message-----
> > From: Jain, Deepak K
> > Sent: Thursday, September 15, 2016 3:04 AM
> > To: dev@dpdk.org
> > Cc: De Lara Guarch, Pablo; Jain, Deepak K
> > Subject: [PATCH v3 1/3] app/test: cleanup of test code for kasumi
> >
> > Cleanup for easier kasumi enabling.
> > Changed name of funcitons for clear understanding.
> 
> Typo in "funcitons".
> 
> Could you split this patch in two? One for the rename the functions and
> another one for the rest.
> Actually, are you doing something else apart from cleanup/reordering?

Yes I can split the patch into two. One with name changes and one with reordering.
Other than this, cleaner usage of Additional Authentication data is included in the code.
Motivation behind this is to have code consistency across the wireless specific algorithms.
Will send another version with comments incorporated.
> 
> >
> > Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
> > ---
> >  app/test/test_cryptodev.c | 117
> > ++++++++++++++++++++++------------------------
> >  1 file changed, 55 insertions(+), 62 deletions(-)
> >
> > diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
> > index 67ca912..89d627f 100644
> > --- a/app/test/test_cryptodev.c
> > +++ b/app/test/test_cryptodev.c
> > @@ -1448,74 +1448,67 @@
> > create_snow3g_kasumi_cipher_hash_operation(const uint8_t *auth_tag,
> 
> ...
> 
> >  	TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
> >  			"no room to prepend aad");
> >  	sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(
> >  			ut_params->ibuf);
> >  	sym_op->auth.aad.length = aad_len;
> > -
> > -	memset(sym_op->auth.aad.data, 0, aad_buffer_len);
> > +		memset(sym_op->auth.aad.data, 0, aad_buffer_len);
> 
> No need to include extra tab.
> 
> >  	rte_memcpy(sym_op->auth.aad.data, aad, aad_len);
> > +		TEST_HEXDUMP(stdout, "aad:",
> > +		sym_op->auth.aad.data, aad_len);
> 
> No need to include extra tab.
> 
> >
> > -	TEST_HEXDUMP(stdout, "aad:",
> > -			sym_op->auth.aad.data, aad_len);
> > -
> > -	/* digest */
> > -	sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
> > -			ut_params->ibuf, auth_tag_len);
> 
> ...
> 
> > @@ -2714,12 +2707,12 @@ test_snow3g_authenticated_encryption(const
> > struct snow3g_test_data *tdata)
> >  	ut_params->obuf = ut_params->op->sym->m_src;
> >  	if (ut_params->obuf)
> >  		ciphertext = rte_pktmbuf_mtod(ut_params->obuf, uint8_t
> *)
> > -				+ tdata->iv.len;
> > +				+ tdata->iv.len + tdata->aad.len;
> >  	else
> >  		ciphertext = plaintext;
> >
> >  	TEST_HEXDUMP(stdout, "ciphertext:", ciphertext, plaintext_len);
> > -
> > +	TEST_HEXDUMP(stdout, "OUTPUT BUFFER:", ut_params->obuf, 512);
> 
> Magic number? What are you showing here?
> 
> >  	/* Validate obuf */
> >  	TEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(
> >  			ciphertext,
> > @@ -2728,7 +2721,7 @@ test_snow3g_authenticated_encryption(const
> > struct snow3g_test_data *tdata)
> >  			"Snow3G Ciphertext data not as expected");
> >

[dpdk-dev] [PATCH v3 2/3] crypto/qat: add Kasumi support in Intel(R) QAT driver

[Deepak Kumar Jain]

This patch add kasumi support in Intel(R)
QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 doc/guides/cryptodevs/qat.rst                    | 10 +--
 doc/guides/rel_notes/release_16_11.rst           |  2 +-
 drivers/crypto/qat/qat_adf/qat_algs.h            | 10 ++-
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 72 +++++++++++++++++++--
 drivers/crypto/qat/qat_crypto.c                  | 79 ++++++++++++++++++++++--
 5 files changed, 158 insertions(+), 15 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 78cadc4..6cdfb93 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -51,6 +51,7 @@ Cipher algorithms:
 * ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``
 * ``RTE_CRYPTO_CIPHER_AES_GCM``
 * ``RTE_CRYPTO_CIPHER_NULL``
+* ``RTE_CRYPTO_CIPHER_KASUMI_F8``
 
 Hash algorithms:
 
@@ -63,17 +64,18 @@ Hash algorithms:
 * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
 * ``RTE_CRYPTO_AUTH_MD5_HMAC``
 * ``RTE_CRYPTO_AUTH_NULL``
+* ``RTE_CRYPTO_AUTH_KASUMI_F9``
 
 Limitations
 -----------
 
 * Chained mbufs are not supported.
-* Hash only is not supported except Snow3G UIA2.
-* Cipher only is not supported except Snow3G UEA2.
+* Hash only is not supported except Snow3G UIA2 and Kasumi F9.
+* Cipher only is not supported except Snow3G UEA2 and Kasumi F8.
 * Only supports the session-oriented API implementation (session-less APIs are not supported).
 * Not performance tuned.
-* Snow3g(UEA2) supported only if cipher length, cipher offset fields are byte-aligned.
-* Snow3g(UIA2) supported only if hash length, hash offset fields are byte-aligned.
+* Snow3g(UEA2) and Kasumi(F8) supported only if cipher length, cipher offset fields are byte-aligned.
+* Snow3g(UIA2) and kasumi(F9) supported only if hash length, hash offset fields are byte-aligned.
 * No BSD support as BSD QAT kernel driver not available.
 * Snow3g (UIA2) not supported in the PMD of **Intel QuickAssist Technology C3xxx** device.
 
diff --git a/doc/guides/rel_notes/release_16_11.rst b/doc/guides/rel_notes/release_16_11.rst
index 4bc67e0..1dd0e6a 100644
--- a/doc/guides/rel_notes/release_16_11.rst
+++ b/doc/guides/rel_notes/release_16_11.rst
@@ -50,7 +50,7 @@ New Features
   * Added support for SHA224-HMAC algorithm.
   * Added support for SHA384-HMAC algorithm.
   * Added support for NULL algorithm.
-
+  * Added support for KASUMI (F8 and F9) algorithm.
 
 Resolved Issues
 ---------------
diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h b/drivers/crypto/qat/qat_adf/qat_algs.h
index 6a86053..fad8471 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -51,6 +51,14 @@
 #include "icp_qat_fw.h"
 #include "icp_qat_fw_la.h"
 
+/*
+ * Key Modifier (KM) value used in Kasumi algorithm in F9 mode to XOR
+ * Integrity Key (IK)
+ */
+#define KASUMI_F9_KEY_MODIFIER_4_BYTES   0xAAAAAAAA
+
+#define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x55555555
+
 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
 	ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
 					ICP_QAT_HW_CIPHER_NO_CONVERT, \
@@ -130,5 +138,5 @@ void qat_alg_ablkcipher_init_dec(struct qat_alg_ablkcipher_cd *cd,
 
 int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
-
+int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 #endif
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index d9437bc..131800c 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -96,6 +96,9 @@ static int qat_hash_get_state1_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 	case ICP_QAT_HW_AUTH_ALGO_MD5:
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_MD5_STATE1_SZ,
 						QAT_HW_DEFAULT_ALIGNMENT);
+	case ICP_QAT_HW_AUTH_ALGO_KASUMI_F9:
+		return QAT_HW_ROUND_UP(ICP_QAT_HW_KASUMI_F9_STATE1_SZ,
+						QAT_HW_DEFAULT_ALIGNMENT);
 	case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
 		/* return maximum state1 size in this case */
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA512_STATE1_SZ,
@@ -454,7 +457,8 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 	uint32_t total_key_size;
 	uint16_t proto = ICP_QAT_FW_LA_NO_PROTO;	/* no CCM/GCM/Snow3G */
 	uint16_t cipher_offset, cd_size;
-
+	uint32_t wordIndex  = 0;
+	uint32_t *temp_key = NULL;
 	PMD_INIT_FUNC_TRACE();
 
 	if (cdesc->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
@@ -504,6 +508,11 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 		cipher_cd_ctrl->cipher_state_sz =
 			ICP_QAT_HW_SNOW_3G_UEA2_IV_SZ >> 3;
 		proto = ICP_QAT_FW_LA_SNOW_3G_PROTO;
+	} else if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
+		total_key_size = ICP_QAT_HW_KASUMI_F8_KEY_SZ;
+		cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_KASUMI_BLK_SZ >> 3;
+		cipher_cd_ctrl->cipher_padding_sz =
+					(2 * ICP_QAT_HW_KASUMI_BLK_SZ) >> 3;
 	} else {
 		total_key_size = cipherkeylen;
 		cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_AES_BLK_SZ >> 3;
@@ -521,9 +530,27 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 	    ICP_QAT_HW_CIPHER_CONFIG_BUILD(cdesc->qat_mode,
 					cdesc->qat_cipher_alg, key_convert,
 					cdesc->qat_dir);
-	memcpy(cipher->aes.key, cipherkey, cipherkeylen);
-	cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
-			cipherkeylen;
+
+	if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
+		temp_key = (uint32_t *)(cdesc->cd_cur_ptr +
+					sizeof(struct icp_qat_hw_cipher_config)
+					+ cipherkeylen);
+		memcpy(cipher->aes.key, cipherkey, cipherkeylen);
+		memcpy(temp_key, cipherkey, cipherkeylen);
+
+		/* XOR Key with KASUMI F8 key modifier at 4 bytes level */
+		for (wordIndex = 0; wordIndex < (cipherkeylen >> 2);
+								wordIndex++)
+			temp_key[wordIndex] ^= KASUMI_F8_KEY_MODIFIER_4_BYTES;
+
+		cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
+					cipherkeylen + cipherkeylen;
+	} else {
+		memcpy(cipher->aes.key, cipherkey, cipherkeylen);
+		cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
+					cipherkeylen;
+	}
+
 	if (total_key_size > cipherkeylen) {
 		uint32_t padding_size =  total_key_size-cipherkeylen;
 
@@ -559,6 +586,8 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 	uint16_t state1_size = 0, state2_size = 0;
 	uint16_t hash_offset, cd_size;
 	uint32_t *aad_len = NULL;
+	uint32_t wordIndex  = 0;
+	uint32_t *pTempKey;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -605,7 +634,8 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 			ICP_QAT_HW_AUTH_CONFIG_BUILD(ICP_QAT_HW_AUTH_MODE1,
 				cdesc->qat_hash_alg, digestsize);
 
-	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2)
+	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2
+		|| cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9)
 		hash->auth_counter.counter = 0;
 	else
 		hash->auth_counter.counter = rte_bswap32(
@@ -722,6 +752,26 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 		break;
 	case ICP_QAT_HW_AUTH_ALGO_NULL:
 		break;
+	case ICP_QAT_HW_AUTH_ALGO_KASUMI_F9:
+		state1_size = qat_hash_get_state1_size(
+				ICP_QAT_HW_AUTH_ALGO_KASUMI_F9);
+		state2_size = ICP_QAT_HW_KASUMI_F9_STATE2_SZ;
+		memset(cdesc->cd_cur_ptr, 0, state1_size + state2_size);
+		pTempKey = (uint32_t *)(cdesc->cd_cur_ptr + state1_size
+							+ authkeylen);
+		/*
+		* The Inner Hash Initial State2 block must contain IK
+		* (Initialisation Key), followed by IK XOR-ed with KM
+		* (Key Modifier): IK||(IK^KM).
+		*/
+		/* write the auth key */
+		memcpy(cdesc->cd_cur_ptr + state1_size, authkey, authkeylen);
+		/* initialise temp key with auth key */
+		memcpy(pTempKey, authkey, authkeylen);
+		/* XOR Key with KASUMI F9 key modifier at 4 bytes level */
+		for (wordIndex = 0; wordIndex < (authkeylen >> 2); wordIndex++)
+			pTempKey[wordIndex] ^= KASUMI_F9_KEY_MODIFIER_4_BYTES;
+		break;
 	default:
 		PMD_DRV_LOG(ERR, "Invalid HASH alg %u", cdesc->qat_hash_alg);
 		return -EFAULT;
@@ -833,3 +883,15 @@ int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
 	}
 	return 0;
 }
+
+int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
+{
+	switch (key_len) {
+	case ICP_QAT_HW_KASUMI_KEY_SZ:
+		*alg = ICP_QAT_HW_CIPHER_ALGO_KASUMI;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index bc8d5b1..1bb1dd1 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -387,6 +387,51 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
 			}, },
 		}, }
 	},
+	{       /* KASUMI (F8) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.iv_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
+		{       /* KASUMI (F9) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_KASUMI_F9,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.digest_size = {
+					.min = 4,
+					.max = 4,
+					.increment = 0
+				},
+				.aad_size = {
+					.min = 8,
+					.max = 8,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
@@ -512,11 +557,18 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_CIPHER_NULL:
 		session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 		break;
+	case RTE_CRYPTO_CIPHER_KASUMI_F8:
+		if (qat_alg_validate_kasumi_key(cipher_xform->key.length,
+					&session->qat_cipher_alg) != 0) {
+			PMD_DRV_LOG(ERR, "Invalid KASUMI cipher key size");
+			goto error_out;
+		}
+		session->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;
+		break;
 	case RTE_CRYPTO_CIPHER_3DES_ECB:
 	case RTE_CRYPTO_CIPHER_3DES_CBC:
 	case RTE_CRYPTO_CIPHER_AES_ECB:
 	case RTE_CRYPTO_CIPHER_AES_CCM:
-	case RTE_CRYPTO_CIPHER_KASUMI_F8:
 		PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
 				cipher_xform->algo);
 		goto error_out;
@@ -645,6 +697,9 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_NULL:
 		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
 		break;
+	case RTE_CRYPTO_AUTH_KASUMI_F9:
+		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_KASUMI_F9;
+		break;
 	case RTE_CRYPTO_AUTH_SHA1:
 	case RTE_CRYPTO_AUTH_SHA256:
 	case RTE_CRYPTO_AUTH_SHA512:
@@ -653,7 +708,6 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_MD5:
 	case RTE_CRYPTO_AUTH_AES_CCM:
 	case RTE_CRYPTO_AUTH_AES_GMAC:
-	case RTE_CRYPTO_AUTH_KASUMI_F9:
 	case RTE_CRYPTO_AUTH_AES_CMAC:
 	case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 	case RTE_CRYPTO_AUTH_ZUC_EIA3:
@@ -857,11 +911,12 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 
 	cipher_param->cipher_length = op->sym->cipher.data.length;
 	cipher_param->cipher_offset = op->sym->cipher.data.offset;
-	if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2) {
+	if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
+			ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
 		if (unlikely((cipher_param->cipher_length % BYTE_LENGTH != 0) ||
 				(cipher_param->cipher_offset
 					% BYTE_LENGTH != 0))) {
-			PMD_DRV_LOG(ERR, " For Snow3g, QAT PMD only "
+			PMD_DRV_LOG(ERR, " For Snow3g/Kasumi, QAT PMD only "
 				"supports byte aligned values");
 			op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 			return -EINVAL;
@@ -900,6 +955,22 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 		auth_param->auth_off >>= 3;
 		auth_param->auth_len >>= 3;
 	}
+	if ((ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
+			ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) &&
+			ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
+		auth_param->auth_len = (auth_param->auth_len >> 3)
+				+ (auth_param->auth_off >> 3)
+				+ (BYTE_LENGTH >> 3)
+				- 8;
+		auth_param->auth_off = 8;
+	} else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH
+			&& ctx->qat_hash_alg ==
+					ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
+		auth_param->auth_len = (auth_param->auth_len >> 3)
+				+ (auth_param->auth_off >> 3)
+				+ (BYTE_LENGTH >> 3);
+		auth_param->auth_off = 0;
+	}
 	auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
 
 	if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
-- 
2.5.5

Re: [dpdk-dev] [PATCH v3 2/3] crypto/qat: add Kasumi support in Intel(R) QAT driver

[Trahe, Fiona]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Deepak Kumar Jain
> Sent: Thursday, September 15, 2016 11:04 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>; Jain, Deepak K
> <deepak.k.jain@intel.com>
> Subject: [dpdk-dev] [PATCH v3 2/3] crypto/qat: add Kasumi support in Intel(R)
> QAT driver
> 
> This patch add kasumi support in Intel(R) QuickAssist driver.
> 
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

Re: [dpdk-dev] [PATCH v3 2/3] crypto/qat: add Kasumi support in Intel(R) QAT driver

[De Lara Guarch, Pablo]

Hi Deepak,

> -----Original Message-----
> From: Jain, Deepak K
> Sent: Thursday, September 15, 2016 3:04 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo; Jain, Deepak K
> Subject: [PATCH v3 2/3] crypto/qat: add Kasumi support in Intel(R) QAT
> driver
> 
> This patch add kasumi support in Intel(R)
> QuickAssist driver.
> 
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
> ---
>  doc/guides/cryptodevs/qat.rst                    | 10 +--
>  doc/guides/rel_notes/release_16_11.rst           |  2 +-
>  drivers/crypto/qat/qat_adf/qat_algs.h            | 10 ++-
>  drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 72
> +++++++++++++++++++--
>  drivers/crypto/qat/qat_crypto.c                  | 79
> ++++++++++++++++++++++--
>  5 files changed, 158 insertions(+), 15 deletions(-)
> 
> diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
> index 78cadc4..6cdfb93 100644
> --- a/doc/guides/cryptodevs/qat.rst
> +++ b/doc/guides/cryptodevs/qat.rst

...

> +* Snow3g(UEA2) and Kasumi(F8) supported only if cipher length, cipher
> offset fields are byte-aligned.
> +* Snow3g(UIA2) and kasumi(F9) supported only if hash length, hash offset
> fields are byte-aligned.

kasumi -> Kasumi. Actually, it should be KASUMI, and Snow3g should be SNOW 3G.
Will send a patch to fix this in the documentation.

>  * No BSD support as BSD QAT kernel driver not available.
>  * Snow3g (UIA2) not supported in the PMD of **Intel QuickAssist
> Technology C3xxx** device.
> 

...

> diff --git a/drivers/crypto/qat/qat_crypto.c
> b/drivers/crypto/qat/qat_crypto.c
> index bc8d5b1..1bb1dd1 100644
> --- a/drivers/crypto/qat/qat_crypto.c
> +++ b/drivers/crypto/qat/qat_crypto.c
> @@ -387,6 +387,51 @@ static const struct rte_cryptodev_capabilities
> qat_pmd_capabilities[] = {
>  			}, },
>  		}, }
>  	},
> +	{       /* KASUMI (F8) */
> +		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
> +		{.sym = {
> +			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
> +			{.cipher = {
> +				.algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
> +				.block_size = 8,
> +				.key_size = {
> +					.min = 16,
> +					.max = 16,
> +					.increment = 0
> +				},
> +				.iv_size = {
> +					.min = 16,
> +					.max = 16,
> +					.increment = 0
> +				}

IV size is 8.

> +			}, }
> +		}, }
> +	},
> +		{       /* KASUMI (F9) */

Remove extra tab before brace up here.

> +		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
> +		{.sym = {
> +			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
> +			{.auth = {
> +				.algo = RTE_CRYPTO_AUTH_KASUMI_F9,
> +				.block_size = 8,
> +				.key_size = {
> +					.min = 16,
> +					.max = 16,
> +					.increment = 0
> +				},
> +				.digest_size = {
> +					.min = 4,
> +					.max = 4,
> +					.increment = 0
> +				},
> +				.aad_size = {
> +					.min = 8,
> +					.max = 8,
> +					.increment = 0
> +				}
> +			}, }
> +		}, }
> +	},
>  	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
>  };

[dpdk-dev] [PATCH v3 3/3] app/test: add Kasumi tests in QAT test suite

[Deepak Kumar Jain]

This patch adds Kausmi tests in the QAT tesuite.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
---
 app/test/test_cryptodev.c                          | 244 +++++++++++++++++++--
 app/test/test_cryptodev_kasumi_hash_test_vectors.h |  76 +++++++
 app/test/test_cryptodev_kasumi_test_vectors.h      | 103 ++++++++-
 3 files changed, 401 insertions(+), 22 deletions(-)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 89d627f..4751467 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -1560,22 +1560,6 @@ create_snow3g_kasumi_auth_cipher_operation(const unsigned auth_tag_len,
 			sym_op->auth.digest.data,
 			sym_op->auth.digest.length);
 
-	/* iv */
-	if (cipher_algo == RTE_CRYPTO_CIPHER_KASUMI_F8)
-		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 8);
-	else
-		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 16);
-
-	sym_op->cipher.iv.data = (uint8_t *)rte_pktmbuf_prepend(
-		ut_params->ibuf, iv_pad_len);
-	TEST_ASSERT_NOT_NULL(sym_op->cipher.iv.data, "no room to prepend iv");
-
-	memset(sym_op->cipher.iv.data, 0, iv_pad_len);
-	sym_op->cipher.iv.phys_addr = rte_pktmbuf_mtophys(ut_params->ibuf);
-	sym_op->cipher.iv.length = iv_pad_len;
-
-	rte_memcpy(sym_op->cipher.iv.data, iv, iv_len);
-
 	/* aad */
 	/*
 	* Always allocate the aad up to the block size.
@@ -1588,7 +1572,6 @@ create_snow3g_kasumi_auth_cipher_operation(const unsigned auth_tag_len,
 		aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 8);
 	else
 		aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 16);
-
 	sym_op->auth.aad.data = (uint8_t *)rte_pktmbuf_prepend(
 	ut_params->ibuf, aad_buffer_len);
 	TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
@@ -1596,13 +1579,27 @@ create_snow3g_kasumi_auth_cipher_operation(const unsigned auth_tag_len,
 	sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(
 				ut_params->ibuf);
 	sym_op->auth.aad.length = aad_len;
-
 	memset(sym_op->auth.aad.data, 0, aad_buffer_len);
 	rte_memcpy(sym_op->auth.aad.data, aad, aad_len);
-
 	TEST_HEXDUMP(stdout, "aad:",
 			sym_op->auth.aad.data, aad_len);
 
+	/* iv */
+	if (cipher_algo == RTE_CRYPTO_CIPHER_KASUMI_F8)
+		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 8);
+	else
+		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 16);
+
+	sym_op->cipher.iv.data = (uint8_t *)rte_pktmbuf_prepend(
+		ut_params->ibuf, iv_pad_len);
+	TEST_ASSERT_NOT_NULL(sym_op->cipher.iv.data, "no room to prepend iv");
+
+	memset(sym_op->cipher.iv.data, 0, iv_pad_len);
+	sym_op->cipher.iv.phys_addr = rte_pktmbuf_mtophys(ut_params->ibuf);
+	sym_op->cipher.iv.length = iv_pad_len;
+
+	rte_memcpy(sym_op->cipher.iv.data, iv, iv_len);
+
 	sym_op->cipher.data.length = cipher_len;
 	sym_op->cipher.data.offset = auth_offset + cipher_offset;
 
@@ -1960,6 +1957,12 @@ test_kasumi_hash_generate_test_case_5(void)
 }
 
 static int
+test_kasumi_hash_generate_test_case_6(void)
+{
+	return test_kasumi_authentication(&kasumi_hash_test_case_6);
+}
+
+static int
 test_kasumi_hash_verify_test_case_1(void)
 {
 	return test_kasumi_authentication_verify(&kasumi_hash_test_case_1);
@@ -2818,6 +2821,174 @@ test_snow3g_auth_cipher(const struct snow3g_test_data *tdata)
 }
 
 static int
+test_kasumi_auth_cipher(const struct kasumi_test_data *tdata)
+{
+	struct crypto_testsuite_params *ts_params = &testsuite_params;
+	struct crypto_unittest_params *ut_params = &unittest_params;
+
+	int retval;
+
+	uint8_t *plaintext, *ciphertext;
+	unsigned plaintext_pad_len;
+	unsigned plaintext_len;
+
+	/* Create KASUMI session */
+	retval = create_snow3g_kasumi_auth_cipher_session(
+			ts_params->valid_devs[0],
+			RTE_CRYPTO_CIPHER_OP_ENCRYPT,
+			RTE_CRYPTO_AUTH_OP_GENERATE,
+			RTE_CRYPTO_AUTH_KASUMI_F9,
+			RTE_CRYPTO_CIPHER_KASUMI_F8,
+			tdata->key.data, tdata->key.len,
+			tdata->aad.len, tdata->digest.len);
+	if (retval < 0)
+		return retval;
+	ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+
+	/* clear mbuf payload */
+	memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
+			rte_pktmbuf_tailroom(ut_params->ibuf));
+
+	plaintext_len = ceil_byte_length(tdata->plaintext.len);
+	/* Append data which is padded to a multiple of */
+	/* the algorithms block size */
+	plaintext_pad_len = RTE_ALIGN_CEIL(plaintext_len, 16);
+	plaintext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
+				plaintext_pad_len);
+	memcpy(plaintext, tdata->plaintext.data, plaintext_len);
+
+	TEST_HEXDUMP(stdout, "plaintext:", plaintext, plaintext_len);
+
+	/* Create KASUMI operation */
+	retval = create_snow3g_kasumi_auth_cipher_operation(tdata->digest.len,
+				tdata->iv.data, tdata->iv.len,
+				tdata->aad.data, tdata->aad.len,
+				plaintext_pad_len,
+				tdata->validCipherLenInBits.len,
+				tdata->validCipherOffsetLenInBits.len,
+				tdata->validAuthLenInBits.len,
+				tdata->validAuthOffsetLenInBits.len,
+				RTE_CRYPTO_AUTH_KASUMI_F9,
+				RTE_CRYPTO_CIPHER_KASUMI_F8
+				);
+
+	if (retval < 0)
+		return retval;
+
+	ut_params->op = process_crypto_request(ts_params->valid_devs[0],
+			ut_params->op);
+	TEST_ASSERT_NOT_NULL(ut_params->op, "failed to retrieve obuf");
+	ut_params->obuf = ut_params->op->sym->m_src;
+	if (ut_params->obuf)
+		ciphertext = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
+				+ tdata->iv.len + tdata->aad.len;
+	else
+		ciphertext = plaintext;
+
+	/* Validate obuf */
+	TEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(
+			ciphertext,
+			tdata->ciphertext.data,
+			tdata->validCipherLenInBits.len,
+			"Snow3G/Kasumi Ciphertext data not as expected");
+	ut_params->digest = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
+	    + plaintext_pad_len + tdata->aad.len + tdata->iv.len;
+
+	/* Validate obuf */
+	TEST_ASSERT_BUFFERS_ARE_EQUAL(
+			ut_params->digest,
+			tdata->digest.data,
+			DIGEST_BYTE_LENGTH_KASUMI_F9,
+			"Snow3G/KASUMI Generated auth tag not as expected");
+	return 0;
+}
+
+static int
+test_kasumi_cipher_auth(const struct kasumi_test_data *tdata)
+{
+	struct crypto_testsuite_params *ts_params = &testsuite_params;
+	struct crypto_unittest_params *ut_params = &unittest_params;
+
+	int retval;
+
+	uint8_t *plaintext, *ciphertext;
+	unsigned plaintext_pad_len;
+	unsigned plaintext_len;
+
+	/* Create KASUMI session */
+	retval = create_snow3g_kasumi_cipher_auth_session(
+			ts_params->valid_devs[0],
+			RTE_CRYPTO_CIPHER_OP_ENCRYPT,
+			RTE_CRYPTO_AUTH_OP_GENERATE,
+			RTE_CRYPTO_AUTH_KASUMI_F9,
+			RTE_CRYPTO_CIPHER_KASUMI_F8,
+			tdata->key.data, tdata->key.len,
+			tdata->aad.len, tdata->digest.len);
+	if (retval < 0)
+		return retval;
+
+	ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+
+	/* clear mbuf payload */
+	memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
+			rte_pktmbuf_tailroom(ut_params->ibuf));
+
+	plaintext_len = ceil_byte_length(tdata->plaintext.len);
+	/* Append data which is padded to a multiple of */
+	/* the algorithms block size */
+	plaintext_pad_len = RTE_ALIGN_CEIL(plaintext_len, 16);
+	plaintext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
+				plaintext_pad_len);
+	memcpy(plaintext, tdata->plaintext.data, plaintext_len);
+
+	TEST_HEXDUMP(stdout, "plaintext:", plaintext, plaintext_len);
+
+	/* Create KASUMI operation */
+	retval = create_snow3g_kasumi_cipher_hash_operation(tdata->digest.data,
+				tdata->digest.len, tdata->aad.data,
+				tdata->aad.len,
+				plaintext_pad_len, RTE_CRYPTO_AUTH_OP_GENERATE,
+				RTE_CRYPTO_AUTH_KASUMI_F9,
+				RTE_CRYPTO_CIPHER_KASUMI_F8,
+				tdata->iv.data, tdata->iv.len,
+				tdata->validCipherLenInBits.len,
+				tdata->validCipherOffsetLenInBits.len,
+				tdata->validAuthLenInBits.len,
+				tdata->validAuthOffsetLenInBits.len
+				);
+	if (retval < 0)
+		return retval;
+
+	ut_params->op = process_crypto_request(ts_params->valid_devs[0],
+			ut_params->op);
+	TEST_ASSERT_NOT_NULL(ut_params->op, "failed to retrieve obuf");
+	ut_params->obuf = ut_params->op->sym->m_src;
+	if (ut_params->obuf)
+		ciphertext = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
+				+ tdata->aad.len + tdata->iv.len;
+	else
+		ciphertext = plaintext;
+
+	ut_params->digest = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
+			+ plaintext_pad_len + tdata->aad.len + tdata->iv.len;
+
+	/* Validate obuf */
+	TEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(
+		ciphertext,
+		tdata->ciphertext.data,
+		tdata->validCipherLenInBits.len,
+		"KASUMI Ciphertext data not as expected");
+
+	/* Validate obuf */
+	TEST_ASSERT_BUFFERS_ARE_EQUAL(
+		ut_params->digest,
+		tdata->digest.data,
+		DIGEST_BYTE_LENGTH_SNOW3G_UIA2,
+		"KASUMI Generated auth tag not as expected");
+	return 0;
+}
+
+static int
 test_kasumi_encryption_test_case_1(void)
 {
 	return test_kasumi_encryption(&kasumi_test_case_1);
@@ -2977,6 +3148,19 @@ test_snow3g_auth_cipher_test_case_1(void)
 	return test_snow3g_auth_cipher(&snow3g_test_case_6);
 }
 
+static int
+test_kasumi_auth_cipher_test_case_1(void)
+{
+	return test_kasumi_auth_cipher(&kasumi_test_case_3);
+}
+
+static int
+test_kasumi_cipher_auth_test_case_1(void)
+{
+	return test_kasumi_cipher_auth(&kasumi_test_case_6);
+}
+
+
 /* ***** AES-GCM Tests ***** */
 
 static int
@@ -4139,6 +4323,21 @@ static struct unit_test_suite cryptodev_qat_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_null_auth_cipher_operation),
 
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_hash_generate_test_case_6),
+
+		/** KASUMI encrypt only (F8) */
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_encryption_test_case_1),
+
+		/** KASUMI encrypt only (F8) */
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_encryption_test_case_3),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_auth_cipher_test_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_cipher_auth_test_case_1),
+
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
@@ -4240,6 +4439,8 @@ static struct unit_test_suite cryptodev_sw_kasumi_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_generate_test_case_5),
 		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_hash_generate_test_case_6),
+		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_1),
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_2),
@@ -4249,7 +4450,10 @@ static struct unit_test_suite cryptodev_sw_kasumi_testsuite  = {
 			test_kasumi_hash_verify_test_case_4),
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_5),
-
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_auth_cipher_test_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_cipher_auth_test_case_1),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
diff --git a/app/test/test_cryptodev_kasumi_hash_test_vectors.h b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
index c080b9f..a4b0205 100644
--- a/app/test/test_cryptodev_kasumi_hash_test_vectors.h
+++ b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
@@ -257,4 +257,80 @@ struct kasumi_hash_test_data kasumi_hash_test_case_5 = {
 		.len  = 4
 	}
 };
+struct kasumi_hash_test_data kasumi_hash_test_case_6 = {
+	.key = {
+		.data = {
+			0x83, 0xFD, 0x23, 0xA2, 0x44, 0xA7, 0x4C, 0xF3,
+			0x58, 0xDA, 0x30, 0x19, 0xF1, 0x72, 0x26, 0x35
+		},
+		.len = 16
+	},
+	.aad = {
+		.data = {
+			0x36, 0xAF, 0x61, 0x44, 0x4F, 0x30, 0x2A, 0xD2
+		},
+		.len = 8
+	},
+	.plaintext = {
+		.data = {
+			0x35, 0xC6, 0x87, 0x16, 0x63, 0x3C, 0x66, 0xFB,
+			0x75, 0x0C, 0x26, 0x68, 0x65, 0xD5, 0x3C, 0x11,
+			0xEA, 0x05, 0xB1, 0xE9, 0xFA, 0x49, 0xC8, 0x39,
+			0x8D, 0x48, 0xE1, 0xEF, 0xA5, 0x90, 0x9D, 0x39,
+			0x47, 0x90, 0x28, 0x37, 0xF5, 0xAE, 0x96, 0xD5,
+			0xA0, 0x5B, 0xC8, 0xD6, 0x1C, 0xA8, 0xDB, 0xEF,
+			0x1B, 0x13, 0xA4, 0xB4, 0xAB, 0xFE, 0x4F, 0xB1,
+			0x00, 0x60, 0x45, 0xB6, 0x74, 0xBB, 0x54, 0x72,
+			0x93, 0x04, 0xC3, 0x82, 0xBE, 0x53, 0xA5, 0xAF,
+			0x05, 0x55, 0x61, 0x76, 0xF6, 0xEA, 0xA2, 0xEF,
+			0x1D, 0x05, 0xE4, 0xB0, 0x83, 0x18, 0x1E, 0xE6,
+			0x74, 0xCD, 0xA5, 0xA4, 0x85, 0xF7, 0x4D, 0x7A,
+			0xC0
+			},
+		.len = 776
+	},
+	.validAuthLenInBits = {
+		.len = 768
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x95, 0xAE, 0x41, 0xBA},
+		.len  = 4
+	}
+};
+
+struct kasumi_hash_test_data kasumi_hash_test_case_7 = {
+	.key = {
+		.data = {
+			0x5A, 0xCB, 0x1D, 0x64, 0x4C, 0x0D, 0x51, 0x20,
+			0x4E, 0xA5, 0xF1, 0x45, 0x10, 0x10, 0xD8, 0x52
+		},
+		.len = 16
+	},
+	.aad = {
+		.data = {
+			0x38, 0xA6, 0xF0, 0x56, 0x05, 0xD2, 0xEC, 0x49,
+		},
+		.len = 8
+	},
+	.plaintext = {
+		.data = {
+				0xAD, 0x9C, 0x44, 0x1F, 0x89, 0x0B, 0x38, 0xC4,
+				0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8, 0xC0
+		},
+		.len = 128
+	},
+	.validAuthLenInBits = {
+		.len = 120
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x87, 0x5F, 0xE4, 0x89},
+		.len  = 4
+	}
+};
 #endif /* TEST_CRYPTODEV_KASUMI_HASH_TEST_VECTORS_H_ */
diff --git a/app/test/test_cryptodev_kasumi_test_vectors.h b/app/test/test_cryptodev_kasumi_test_vectors.h
index 9163d7c..016af54 100644
--- a/app/test/test_cryptodev_kasumi_test_vectors.h
+++ b/app/test/test_cryptodev_kasumi_test_vectors.h
@@ -44,12 +44,22 @@ struct kasumi_test_data {
 		unsigned len;
 	} iv;
 
+	/* Includes: COUNT (4 bytes) and FRESH (4 bytes) */
+	struct {
+		uint8_t data[8];
+		unsigned len;
+	} aad;
+
 	struct {
 		uint8_t data[1024];
 		unsigned len; /* length must be in Bits */
 	} plaintext;
 
 	struct {
+		unsigned len;
+	} validDataLenInBits;
+
+	struct {
 		uint8_t data[1024];
 		unsigned len; /* length must be in Bits */
 	} ciphertext;
@@ -61,6 +71,21 @@ struct kasumi_test_data {
 	struct {
 		unsigned len;
 	} validCipherOffsetLenInBits;
+
+	/* Actual length of data to be hashed */
+	struct {
+		unsigned len;
+	} validAuthLenInBits;
+
+	struct {
+		unsigned len;
+	} validAuthOffsetLenInBits;
+
+	struct {
+		uint8_t data[64];
+		unsigned len;
+	} digest;
+
 };
 
 struct kasumi_test_data kasumi_test_case_1 = {
@@ -183,12 +208,18 @@ struct kasumi_test_data kasumi_test_case_3 = {
 		},
 		.len = 8
 	},
+	.aad = {
+		.data = {
+			0x38, 0xA6, 0xF0, 0x56, 0x05, 0xD2, 0xEC, 0x49
+		},
+		.len = 8
+	},
 	.plaintext = {
 		.data = {
 			0xAD, 0x9C, 0x44, 0x1F, 0x89, 0x0B, 0x38, 0xC4,
-			0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8
+			0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8, 0xC0
 		},
-		.len = 120
+		.len = 128
 	},
 	.ciphertext = {
 		.data = {
@@ -197,11 +228,24 @@ struct kasumi_test_data kasumi_test_case_3 = {
 		},
 		.len = 120
 	},
+	.validDataLenInBits = {
+			.len = 128
+	},
 	.validCipherLenInBits = {
 		.len = 120
 	},
 	.validCipherOffsetLenInBits = {
 		.len = 64
+	},
+	.validAuthLenInBits = {
+		.len = 120
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x87, 0x5F, 0xE4, 0x89},
+		.len  = 4
 	}
 };
 
@@ -305,4 +349,59 @@ struct kasumi_test_data kasumi_test_case_5 = {
 	},
 };
 
+struct kasumi_test_data kasumi_test_case_6 = {
+	.key = {
+		.data = {
+			 0x5A, 0xCB, 0x1D, 0x64, 0x4C, 0x0D, 0x51, 0x20,
+			 0x4E, 0xA5, 0xF1, 0x45, 0x10, 0x10, 0xD8, 0x52
+		},
+		.len = 16
+	},
+	.iv = {
+		.data = {
+			0xFA, 0x55, 0x6B, 0x26, 0x1C, 0x00, 0x00, 0x00
+		},
+		.len = 8
+	},
+	.aad = {
+		.data = {
+			0x38, 0xA6, 0xF0, 0x56, 0x05, 0xD2, 0xEC, 0x49
+		},
+		.len = 8
+	},
+	.plaintext = {
+		.data = {
+			0xAD, 0x9C, 0x44, 0x1F, 0x89, 0x0B, 0x38, 0xC4,
+			0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8, 0xC0
+		},
+		.len = 128
+	},
+	.ciphertext = {
+		.data = {
+			0x9B, 0xC9, 0x2C, 0xA8, 0x03, 0xC6, 0x7B, 0x28,
+			0xA1, 0x1A, 0x4B, 0xEE, 0x5A, 0x0C, 0x25
+		},
+		.len = 120
+	},
+	.validDataLenInBits = {
+			.len = 128
+	},
+	.validCipherLenInBits = {
+		.len = 120
+	},
+	.validCipherOffsetLenInBits = {
+		.len = 64
+	},
+	.validAuthLenInBits = {
+		.len = 120
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x0F, 0xD2, 0xAA, 0xB5},
+		.len  = 4
+	}
+};
+
 #endif /* TEST_CRYPTODEV_KASUMI_TEST_VECTORS_H_ */
-- 
2.5.5

Re: [dpdk-dev] [PATCH v3 3/3] app/test: add Kasumi tests in QAT test suite

[Trahe, Fiona]

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Deepak Kumar Jain
> Sent: Thursday, September 15, 2016 11:06 AM
> To: dev@dpdk.org
> Cc: Jain, Deepak K <deepak.k.jain@intel.com>
> Subject: [dpdk-dev] [PATCH v3 3/3] app/test: add Kasumi tests in QAT test
> suite
> 
> This patch adds Kausmi tests in the QAT tesuite.
> 
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>

Re: [dpdk-dev] [PATCH v3 3/3] app/test: add Kasumi tests in QAT test suite

[De Lara Guarch, Pablo]

Hi Deepak,

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Deepak Kumar Jain
> Sent: Thursday, September 15, 2016 3:06 AM
> To: dev@dpdk.org
> Cc: Jain, Deepak K
> Subject: [dpdk-dev] [PATCH v3 3/3] app/test: add Kasumi tests in QAT test
> suite
> 
> This patch adds Kausmi tests in the QAT tesuite.

This patch implements tests for authenticated encryption and encrypted authentication,
and  adds them in the testsuite for KASUMI SW PMD (thanks for that!).
Could you include this info in the commit message.

> 
> Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
> ---
>  app/test/test_cryptodev.c                          | 244 +++++++++++++++++++--
>  app/test/test_cryptodev_kasumi_hash_test_vectors.h |  76 +++++++
>  app/test/test_cryptodev_kasumi_test_vectors.h      | 103 ++++++++-
>  3 files changed, 401 insertions(+), 22 deletions(-)
> 
> diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
> index 89d627f..4751467 100644
> --- a/app/test/test_cryptodev.c
> +++ b/app/test/test_cryptodev.c

...

>  static int
> +test_kasumi_auth_cipher(const struct kasumi_test_data *tdata)
> +{

...

> +
> +	/* Validate obuf */
> +	TEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(
> +			ciphertext,
> +			tdata->ciphertext.data,
> +			tdata->validCipherLenInBits.len,
> +			"Snow3G/Kasumi Ciphertext data not as expected");

This is in a kasumi test, so you can change the message to "Kasumi Ciphertext..."

> +	ut_params->digest = rte_pktmbuf_mtod(ut_params->obuf, uint8_t
> *)
> +	    + plaintext_pad_len + tdata->aad.len + tdata->iv.len;
> +
> +	/* Validate obuf */
> +	TEST_ASSERT_BUFFERS_ARE_EQUAL(
> +			ut_params->digest,
> +			tdata->digest.data,
> +			DIGEST_BYTE_LENGTH_KASUMI_F9,
> +			"Snow3G/KASUMI Generated auth tag not as
> expected");

Same here

> +	return 0;
> +}
> +

...

>  /* ***** AES-GCM Tests ***** */
> 
>  static int
> @@ -4139,6 +4323,21 @@ static struct unit_test_suite
> cryptodev_qat_testsuite  = {
>  		TEST_CASE_ST(ut_setup, ut_teardown,
>  			test_null_auth_cipher_operation),
> 

If you include a comment down here for KASUMI encryption only,
you should include one for authentication only here, and maybe comments
for the other two cases (auth_cipher/cipher_auth). You can also group all of them into "KASUMI tests", easier :)


> +		TEST_CASE_ST(ut_setup, ut_teardown,
> +			test_kasumi_hash_generate_test_case_6),
> +
> +		/** KASUMI encrypt only (F8) */
> +		TEST_CASE_ST(ut_setup, ut_teardown,
> +			test_kasumi_encryption_test_case_1),
> +
> +		/** KASUMI encrypt only (F8) */
> +		TEST_CASE_ST(ut_setup, ut_teardown,
> +			test_kasumi_encryption_test_case_3),

You can combine both tests above, and have just one comment (or go for a single comment overall).

> +		TEST_CASE_ST(ut_setup, ut_teardown,
> +			test_kasumi_auth_cipher_test_case_1),
> +		TEST_CASE_ST(ut_setup, ut_teardown,
> +			test_kasumi_cipher_auth_test_case_1),
> +
>  		TEST_CASES_END() /**< NULL terminate unit test array */
>  	}
>  };

...

> diff --git a/app/test/test_cryptodev_kasumi_hash_test_vectors.h
> b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
> index c080b9f..a4b0205 100644
> --- a/app/test/test_cryptodev_kasumi_hash_test_vectors.h
> +++ b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
> @@ -257,4 +257,80 @@ struct kasumi_hash_test_data
> kasumi_hash_test_case_5 = {
>  		.len  = 4
>  	}
>  };

Add blank line here.

> +struct kasumi_hash_test_data kasumi_hash_test_case_6 = {
> +	.key = {
> +		.data = {
> +			0x83, 0xFD, 0x23, 0xA2, 0x44, 0xA7, 0x4C, 0xF3,
> +			0x58, 0xDA, 0x30, 0x19, 0xF1, 0x72, 0x26, 0x35
> +		},
> +		.len = 16
> +	},
> +	.aad = {
> +		.data = {
> +			0x36, 0xAF, 0x61, 0x44, 0x4F, 0x30, 0x2A, 0xD2
> +		},
> +		.len = 8
> +	},
> +	.plaintext = {
> +		.data = {
> +			0x35, 0xC6, 0x87, 0x16, 0x63, 0x3C, 0x66, 0xFB,
> +			0x75, 0x0C, 0x26, 0x68, 0x65, 0xD5, 0x3C, 0x11,
> +			0xEA, 0x05, 0xB1, 0xE9, 0xFA, 0x49, 0xC8, 0x39,
> +			0x8D, 0x48, 0xE1, 0xEF, 0xA5, 0x90, 0x9D, 0x39,
> +			0x47, 0x90, 0x28, 0x37, 0xF5, 0xAE, 0x96, 0xD5,
> +			0xA0, 0x5B, 0xC8, 0xD6, 0x1C, 0xA8, 0xDB, 0xEF,
> +			0x1B, 0x13, 0xA4, 0xB4, 0xAB, 0xFE, 0x4F, 0xB1,
> +			0x00, 0x60, 0x45, 0xB6, 0x74, 0xBB, 0x54, 0x72,
> +			0x93, 0x04, 0xC3, 0x82, 0xBE, 0x53, 0xA5, 0xAF,
> +			0x05, 0x55, 0x61, 0x76, 0xF6, 0xEA, 0xA2, 0xEF,
> +			0x1D, 0x05, 0xE4, 0xB0, 0x83, 0x18, 0x1E, 0xE6,
> +			0x74, 0xCD, 0xA5, 0xA4, 0x85, 0xF7, 0x4D, 0x7A,
> +			0xC0
> +			},

Remove one extra tab before the brace.

> +		.len = 776
> +	},
> +	.validAuthLenInBits = {
> +		.len = 768
> +	},
> +	.validAuthOffsetLenInBits = {
> +		.len = 64
> +	},
> +	.digest = {
> +		.data = {0x95, 0xAE, 0x41, 0xBA},
> +		.len  = 4
> +	}
> +};
> +
> +struct kasumi_hash_test_data kasumi_hash_test_case_7 = {
> +	.key = {
> +		.data = {
> +			0x5A, 0xCB, 0x1D, 0x64, 0x4C, 0x0D, 0x51, 0x20,
> +			0x4E, 0xA5, 0xF1, 0x45, 0x10, 0x10, 0xD8, 0x52
> +		},
> +		.len = 16
> +	},
> +	.aad = {
> +		.data = {
> +			0x38, 0xA6, 0xF0, 0x56, 0x05, 0xD2, 0xEC, 0x49,
> +		},
> +		.len = 8
> +	},
> +	.plaintext = {
> +		.data = {
> +				0xAD, 0x9C, 0x44, 0x1F, 0x89, 0x0B, 0x38,
> 0xC4,
> +				0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8,
> 0xC0

Remove extra tab here.

> +		},
> +		.len = 128
> +	},
> +	.validAuthLenInBits = {
> +		.len = 120
> +	},
> +	.validAuthOffsetLenInBits = {
> +		.len = 64
> +	},
> +	.digest = {
> +		.data = {0x87, 0x5F, 0xE4, 0x89},
> +		.len  = 4
> +	}
> +};
>  #endif /* TEST_CRYPTODEV_KASUMI_HASH_TEST_VECTORS_H_ */
> diff --git a/app/test/test_cryptodev_kasumi_test_vectors.h
> b/app/test/test_cryptodev_kasumi_test_vectors.h
> index 9163d7c..016af54 100644
> --- a/app/test/test_cryptodev_kasumi_test_vectors.h
> +++ b/app/test/test_cryptodev_kasumi_test_vectors.h

...

>  struct kasumi_test_data kasumi_test_case_1 = {
> @@ -183,12 +208,18 @@ struct kasumi_test_data kasumi_test_case_3 = {
>  		},
>  		.len = 8
>  	},
> +	.aad = {
> +		.data = {
> +			0x38, 0xA6, 0xF0, 0x56, 0x05, 0xD2, 0xEC, 0x49
> +		},
> +		.len = 8
> +	},
>  	.plaintext = {
>  		.data = {
>  			0xAD, 0x9C, 0x44, 0x1F, 0x89, 0x0B, 0x38, 0xC4,
> -			0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8
> +			0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8, 0xC0

Might be a good idea to include in the declaration of the structure "kasumi_test_data"
that plaintext may include the direction bit, so it explains the extra byte here (like in the hash vectors),
as you are using this for authentication too.

>  		},
> -		.len = 120
> +		.len = 128
>  	},
>  	.ciphertext = {
>  		.data = {
> @@ -197,11 +228,24 @@ struct kasumi_test_data kasumi_test_case_3 = {
>  		},
>  		.len = 120
>  	},
> +	.validDataLenInBits = {
> +			.len = 128
> +	},
>  	.validCipherLenInBits = {
>  		.len = 120
>  	},
>  	.validCipherOffsetLenInBits = {
>  		.len = 64
> +	},
> +	.validAuthLenInBits = {
> +		.len = 120
> +	},
> +	.validAuthOffsetLenInBits = {
> +		.len = 64
> +	},
> +	.digest = {
> +		.data = {0x87, 0x5F, 0xE4, 0x89},
> +		.len  = 4
>  	}
>  };

[dpdk-dev] [PATCH v4 0/4] add kasumi in Intel(R) QuickAssist driver

[Deepak Kumar Jain]

This patchset depends on following patch:
"crypto/qat: add Intel(R) QuickAssist C3xxx device"
(http://dpdk.org/dev/patchwork/patch/15794/

Changes in v4:
* Split cleanup patch into two smaller patches.
* Fixed indentation issues.

Changes in v3:
* Merged Cipher only and hash only patches into one patch.
* Code cleaup for clear understanding.

Changes in v2:
* Updated Test code to apply cleanly on driver code
* Added relevant documentation


Deepak Kumar Jain (4):
  app/test: crypto test code cleanup
  app/test: rename functions name
  crypto/qat: add Kasumi support in Intel(R) QAT driver
  app/test: add Kasumi tests in QAT test suite

 app/test/test_cryptodev.c                          | 341 ++++++++++++++++-----
 app/test/test_cryptodev_kasumi_hash_test_vectors.h |  77 +++++
 app/test/test_cryptodev_kasumi_test_vectors.h      | 105 ++++++-
 doc/guides/cryptodevs/qat.rst                      |  10 +-
 doc/guides/rel_notes/release_16_11.rst             |   2 +-
 drivers/crypto/qat/qat_adf/qat_algs.h              |  10 +-
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c   |  72 ++++-
 drivers/crypto/qat/qat_crypto.c                    |  79 ++++-
 8 files changed, 604 insertions(+), 92 deletions(-)

-- 
2.5.5

[dpdk-dev] [PATCH v4 1/4] app/test: crypto test code cleanup

[Deepak Kumar Jain]

Cleanup the code for code design consistency.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
 app/test/test_cryptodev.c | 111 +++++++++++++++++++++-------------------------
 1 file changed, 51 insertions(+), 60 deletions(-)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 67ca912..70606e6 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -1448,25 +1448,24 @@ create_snow3g_kasumi_cipher_hash_operation(const uint8_t *auth_tag,
 	/* set crypto operation source mbuf */
 	sym_op->m_src = ut_params->ibuf;
 
+	/* digest */
+	sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
+			ut_params->ibuf, auth_tag_len);
 
-	/* iv */
-	if (cipher_algo == RTE_CRYPTO_CIPHER_KASUMI_F8)
-		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 8);
+	TEST_ASSERT_NOT_NULL(sym_op->auth.digest.data,
+			"no room to append auth tag");
+	ut_params->digest = sym_op->auth.digest.data;
+	sym_op->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(
+			ut_params->ibuf, data_pad_len);
+	sym_op->auth.digest.length = auth_tag_len;
+	if (op == RTE_CRYPTO_AUTH_OP_GENERATE)
+		memset(sym_op->auth.digest.data, 0, auth_tag_len);
 	else
-		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 16);
-
-	sym_op->cipher.iv.data = (uint8_t *)rte_pktmbuf_prepend(
-		ut_params->ibuf, iv_pad_len);
-	TEST_ASSERT_NOT_NULL(sym_op->cipher.iv.data, "no room to prepend iv");
-
-	memset(sym_op->cipher.iv.data, 0, iv_pad_len);
-	sym_op->cipher.iv.phys_addr = rte_pktmbuf_mtophys(ut_params->ibuf);
-	sym_op->cipher.iv.length = iv_pad_len;
-
-	rte_memcpy(sym_op->cipher.iv.data, iv, iv_len);
+		rte_memcpy(sym_op->auth.digest.data, auth_tag, auth_tag_len);
 
-	sym_op->cipher.data.length = cipher_len;
-	sym_op->cipher.data.offset = cipher_offset;
+	TEST_HEXDUMP(stdout, "digest:",
+		sym_op->auth.digest.data,
+		sym_op->auth.digest.length);
 
 	/* aad */
 	/*
@@ -1480,42 +1479,35 @@ create_snow3g_kasumi_cipher_hash_operation(const uint8_t *auth_tag,
 		aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 8);
 	else
 		aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 16);
-
 	sym_op->auth.aad.data =
-			(uint8_t *)rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *);
+		(uint8_t *)rte_pktmbuf_prepend(
+			ut_params->ibuf, aad_buffer_len);
 	TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
 			"no room to prepend aad");
 	sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(
 			ut_params->ibuf);
 	sym_op->auth.aad.length = aad_len;
-
 	memset(sym_op->auth.aad.data, 0, aad_buffer_len);
 	rte_memcpy(sym_op->auth.aad.data, aad, aad_len);
+	TEST_HEXDUMP(stdout, "aad:", sym_op->auth.aad.data, aad_len);
 
-	TEST_HEXDUMP(stdout, "aad:",
-			sym_op->auth.aad.data, aad_len);
-
-	/* digest */
-	sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
-			ut_params->ibuf, auth_tag_len);
-
-	TEST_ASSERT_NOT_NULL(sym_op->auth.digest.data,
-			"no room to append auth tag");
-	ut_params->digest = sym_op->auth.digest.data;
-	sym_op->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(
-			ut_params->ibuf, data_pad_len + aad_len);
-	sym_op->auth.digest.length = auth_tag_len;
-	if (op == RTE_CRYPTO_AUTH_OP_GENERATE)
-		memset(sym_op->auth.digest.data, 0, auth_tag_len);
+	/* iv */
+	if (cipher_algo == RTE_CRYPTO_CIPHER_KASUMI_F8)
+		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 8);
 	else
-		rte_memcpy(sym_op->auth.digest.data, auth_tag, auth_tag_len);
-
-	TEST_HEXDUMP(stdout, "digest:",
-		sym_op->auth.digest.data,
-		sym_op->auth.digest.length);
+		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 16);
+	sym_op->cipher.iv.data = (uint8_t *)rte_pktmbuf_prepend(
+		ut_params->ibuf, iv_pad_len);
 
-	sym_op->auth.data.length = auth_len;
-	sym_op->auth.data.offset = auth_offset;
+	TEST_ASSERT_NOT_NULL(sym_op->cipher.iv.data, "no room to prepend iv");
+	memset(sym_op->cipher.iv.data, 0, iv_pad_len);
+	sym_op->cipher.iv.phys_addr = rte_pktmbuf_mtophys(ut_params->ibuf);
+	sym_op->cipher.iv.length = iv_pad_len;
+		rte_memcpy(sym_op->cipher.iv.data, iv, iv_len);
+		sym_op->cipher.data.length = cipher_len;
+	sym_op->cipher.data.offset = cipher_offset + auth_offset;
+		sym_op->auth.data.length = auth_len;
+	sym_op->auth.data.offset = auth_offset + cipher_offset;
 
 	return 0;
 }
@@ -1567,22 +1559,6 @@ create_snow3g_kasumi_auth_cipher_operation(const unsigned auth_tag_len,
 			sym_op->auth.digest.data,
 			sym_op->auth.digest.length);
 
-	/* iv */
-	if (cipher_algo == RTE_CRYPTO_CIPHER_KASUMI_F8)
-		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 8);
-	else
-		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 16);
-
-	sym_op->cipher.iv.data = (uint8_t *)rte_pktmbuf_prepend(
-		ut_params->ibuf, iv_pad_len);
-	TEST_ASSERT_NOT_NULL(sym_op->cipher.iv.data, "no room to prepend iv");
-
-	memset(sym_op->cipher.iv.data, 0, iv_pad_len);
-	sym_op->cipher.iv.phys_addr = rte_pktmbuf_mtophys(ut_params->ibuf);
-	sym_op->cipher.iv.length = iv_pad_len;
-
-	rte_memcpy(sym_op->cipher.iv.data, iv, iv_len);
-
 	/* aad */
 	/*
 	* Always allocate the aad up to the block size.
@@ -1610,6 +1586,22 @@ create_snow3g_kasumi_auth_cipher_operation(const unsigned auth_tag_len,
 	TEST_HEXDUMP(stdout, "aad:",
 			sym_op->auth.aad.data, aad_len);
 
+	/* iv */
+	if (cipher_algo == RTE_CRYPTO_CIPHER_KASUMI_F8)
+		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 8);
+	else
+		iv_pad_len = RTE_ALIGN_CEIL(iv_len, 16);
+
+	sym_op->cipher.iv.data = (uint8_t *)rte_pktmbuf_prepend(
+		ut_params->ibuf, iv_pad_len);
+	TEST_ASSERT_NOT_NULL(sym_op->cipher.iv.data, "no room to prepend iv");
+
+	memset(sym_op->cipher.iv.data, 0, iv_pad_len);
+	sym_op->cipher.iv.phys_addr = rte_pktmbuf_mtophys(ut_params->ibuf);
+	sym_op->cipher.iv.length = iv_pad_len;
+
+	rte_memcpy(sym_op->cipher.iv.data, iv, iv_len);
+
 	sym_op->cipher.data.length = cipher_len;
 	sym_op->cipher.data.offset = auth_offset + cipher_offset;
 
@@ -2714,12 +2706,11 @@ test_snow3g_authenticated_encryption(const struct snow3g_test_data *tdata)
 	ut_params->obuf = ut_params->op->sym->m_src;
 	if (ut_params->obuf)
 		ciphertext = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
-				+ tdata->iv.len;
+				+ tdata->iv.len + tdata->aad.len;
 	else
 		ciphertext = plaintext;
 
 	TEST_HEXDUMP(stdout, "ciphertext:", ciphertext, plaintext_len);
-
 	/* Validate obuf */
 	TEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(
 			ciphertext,
@@ -2728,7 +2719,7 @@ test_snow3g_authenticated_encryption(const struct snow3g_test_data *tdata)
 			"Snow3G Ciphertext data not as expected");
 
 	ut_params->digest = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
-	    + plaintext_pad_len + tdata->aad.len;
+	    + plaintext_pad_len + tdata->aad.len + tdata->iv.len;
 
 	/* Validate obuf */
 	TEST_ASSERT_BUFFERS_ARE_EQUAL(
-- 
2.5.5

[dpdk-dev] [PATCH v4 2/4] app/test: rename functions name

[Deepak Kumar Jain]

Renamed authenticated encryption and encrypted authentication
with easily recognixation names.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
 app/test/test_cryptodev.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 70606e6..61a474c 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -2647,7 +2647,7 @@ static int test_snow3g_decryption_oop(const struct snow3g_test_data *tdata)
 }
 
 static int
-test_snow3g_authenticated_encryption(const struct snow3g_test_data *tdata)
+test_snow3g_cipher_auth(const struct snow3g_test_data *tdata)
 {
 	struct crypto_testsuite_params *ts_params = &testsuite_params;
 	struct crypto_unittest_params *ut_params = &unittest_params;
@@ -2730,7 +2730,7 @@ test_snow3g_authenticated_encryption(const struct snow3g_test_data *tdata)
 	return 0;
 }
 static int
-test_snow3g_encrypted_authentication(const struct snow3g_test_data *tdata)
+test_snow3g_auth_cipher(const struct snow3g_test_data *tdata)
 {
 	struct crypto_testsuite_params *ts_params = &testsuite_params;
 	struct crypto_unittest_params *ut_params = &unittest_params;
@@ -2964,15 +2964,15 @@ test_snow3g_decryption_test_case_5(void)
 	return test_snow3g_decryption(&snow3g_test_case_5);
 }
 static int
-test_snow3g_authenticated_encryption_test_case_1(void)
+test_snow3g_cipher_auth_test_case_1(void)
 {
-	return test_snow3g_authenticated_encryption(&snow3g_test_case_3);
+	return test_snow3g_cipher_auth(&snow3g_test_case_3);
 }
 
 static int
-test_snow3g_encrypted_authentication_test_case_1(void)
+test_snow3g_auth_cipher_test_case_1(void)
 {
-	return test_snow3g_encrypted_authentication(&snow3g_test_case_6);
+	return test_snow3g_auth_cipher(&snow3g_test_case_6);
 }
 
 /* ***** AES-GCM Tests ***** */
@@ -4113,9 +4113,9 @@ static struct unit_test_suite cryptodev_qat_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_snow3g_hash_verify_test_case_3),
 		TEST_CASE_ST(ut_setup, ut_teardown,
-			test_snow3g_authenticated_encryption_test_case_1),
+			test_snow3g_cipher_auth_test_case_1),
 		TEST_CASE_ST(ut_setup, ut_teardown,
-			test_snow3g_encrypted_authentication_test_case_1),
+			test_snow3g_auth_cipher_test_case_1),
 
 		/** HMAC_MD5 Authentication */
 		TEST_CASE_ST(ut_setup, ut_teardown,
@@ -4314,9 +4314,9 @@ static struct unit_test_suite cryptodev_sw_snow3g_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_snow3g_hash_verify_test_case_6),
 		TEST_CASE_ST(ut_setup, ut_teardown,
-			test_snow3g_authenticated_encryption_test_case_1),
+			test_snow3g_cipher_auth_test_case_1),
 		TEST_CASE_ST(ut_setup, ut_teardown,
-			test_snow3g_encrypted_authentication_test_case_1),
+			test_snow3g_auth_cipher_test_case_1),
 
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
-- 
2.5.5

[dpdk-dev] [PATCH v4 3/4] crypto/qat: add Kasumi support in Intel(R) QAT driver

[Deepak Kumar Jain]

This patch add kasumi support in Intel(R)
QuickAssist driver.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
 doc/guides/cryptodevs/qat.rst                    | 10 +--
 doc/guides/rel_notes/release_16_11.rst           |  2 +-
 drivers/crypto/qat/qat_adf/qat_algs.h            | 10 ++-
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 72 +++++++++++++++++++--
 drivers/crypto/qat/qat_crypto.c                  | 79 ++++++++++++++++++++++--
 5 files changed, 158 insertions(+), 15 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 78cadc4..4b87c21 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -51,6 +51,7 @@ Cipher algorithms:
 * ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``
 * ``RTE_CRYPTO_CIPHER_AES_GCM``
 * ``RTE_CRYPTO_CIPHER_NULL``
+* ``RTE_CRYPTO_CIPHER_KASUMI_F8``
 
 Hash algorithms:
 
@@ -63,17 +64,18 @@ Hash algorithms:
 * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
 * ``RTE_CRYPTO_AUTH_MD5_HMAC``
 * ``RTE_CRYPTO_AUTH_NULL``
+* ``RTE_CRYPTO_AUTH_KASUMI_F9``
 
 Limitations
 -----------
 
 * Chained mbufs are not supported.
-* Hash only is not supported except Snow3G UIA2.
-* Cipher only is not supported except Snow3G UEA2.
+* Hash only is not supported except Snow3G UIA2 and KASUMI F9.
+* Cipher only is not supported except Snow3G UEA2 and KASUMI F8.
 * Only supports the session-oriented API implementation (session-less APIs are not supported).
 * Not performance tuned.
-* Snow3g(UEA2) supported only if cipher length, cipher offset fields are byte-aligned.
-* Snow3g(UIA2) supported only if hash length, hash offset fields are byte-aligned.
+* Snow3g(UEA2) and KASUMI(F8) supported only if cipher length, cipher offset fields are byte-aligned.
+* Snow3g(UIA2) and KASUMI(F9) supported only if hash length, hash offset fields are byte-aligned.
 * No BSD support as BSD QAT kernel driver not available.
 * Snow3g (UIA2) not supported in the PMD of **Intel QuickAssist Technology C3xxx** device.
 
diff --git a/doc/guides/rel_notes/release_16_11.rst b/doc/guides/rel_notes/release_16_11.rst
index 4bc67e0..1dd0e6a 100644
--- a/doc/guides/rel_notes/release_16_11.rst
+++ b/doc/guides/rel_notes/release_16_11.rst
@@ -50,7 +50,7 @@ New Features
   * Added support for SHA224-HMAC algorithm.
   * Added support for SHA384-HMAC algorithm.
   * Added support for NULL algorithm.
-
+  * Added support for KASUMI (F8 and F9) algorithm.
 
 Resolved Issues
 ---------------
diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h b/drivers/crypto/qat/qat_adf/qat_algs.h
index 6a86053..fad8471 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -51,6 +51,14 @@
 #include "icp_qat_fw.h"
 #include "icp_qat_fw_la.h"
 
+/*
+ * Key Modifier (KM) value used in Kasumi algorithm in F9 mode to XOR
+ * Integrity Key (IK)
+ */
+#define KASUMI_F9_KEY_MODIFIER_4_BYTES   0xAAAAAAAA
+
+#define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x55555555
+
 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
 	ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
 					ICP_QAT_HW_CIPHER_NO_CONVERT, \
@@ -130,5 +138,5 @@ void qat_alg_ablkcipher_init_dec(struct qat_alg_ablkcipher_cd *cd,
 
 int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
-
+int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 #endif
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index d9437bc..131800c 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -96,6 +96,9 @@ static int qat_hash_get_state1_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 	case ICP_QAT_HW_AUTH_ALGO_MD5:
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_MD5_STATE1_SZ,
 						QAT_HW_DEFAULT_ALIGNMENT);
+	case ICP_QAT_HW_AUTH_ALGO_KASUMI_F9:
+		return QAT_HW_ROUND_UP(ICP_QAT_HW_KASUMI_F9_STATE1_SZ,
+						QAT_HW_DEFAULT_ALIGNMENT);
 	case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
 		/* return maximum state1 size in this case */
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA512_STATE1_SZ,
@@ -454,7 +457,8 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 	uint32_t total_key_size;
 	uint16_t proto = ICP_QAT_FW_LA_NO_PROTO;	/* no CCM/GCM/Snow3G */
 	uint16_t cipher_offset, cd_size;
-
+	uint32_t wordIndex  = 0;
+	uint32_t *temp_key = NULL;
 	PMD_INIT_FUNC_TRACE();
 
 	if (cdesc->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER) {
@@ -504,6 +508,11 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 		cipher_cd_ctrl->cipher_state_sz =
 			ICP_QAT_HW_SNOW_3G_UEA2_IV_SZ >> 3;
 		proto = ICP_QAT_FW_LA_SNOW_3G_PROTO;
+	} else if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
+		total_key_size = ICP_QAT_HW_KASUMI_F8_KEY_SZ;
+		cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_KASUMI_BLK_SZ >> 3;
+		cipher_cd_ctrl->cipher_padding_sz =
+					(2 * ICP_QAT_HW_KASUMI_BLK_SZ) >> 3;
 	} else {
 		total_key_size = cipherkeylen;
 		cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_AES_BLK_SZ >> 3;
@@ -521,9 +530,27 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
 	    ICP_QAT_HW_CIPHER_CONFIG_BUILD(cdesc->qat_mode,
 					cdesc->qat_cipher_alg, key_convert,
 					cdesc->qat_dir);
-	memcpy(cipher->aes.key, cipherkey, cipherkeylen);
-	cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
-			cipherkeylen;
+
+	if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
+		temp_key = (uint32_t *)(cdesc->cd_cur_ptr +
+					sizeof(struct icp_qat_hw_cipher_config)
+					+ cipherkeylen);
+		memcpy(cipher->aes.key, cipherkey, cipherkeylen);
+		memcpy(temp_key, cipherkey, cipherkeylen);
+
+		/* XOR Key with KASUMI F8 key modifier at 4 bytes level */
+		for (wordIndex = 0; wordIndex < (cipherkeylen >> 2);
+								wordIndex++)
+			temp_key[wordIndex] ^= KASUMI_F8_KEY_MODIFIER_4_BYTES;
+
+		cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
+					cipherkeylen + cipherkeylen;
+	} else {
+		memcpy(cipher->aes.key, cipherkey, cipherkeylen);
+		cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
+					cipherkeylen;
+	}
+
 	if (total_key_size > cipherkeylen) {
 		uint32_t padding_size =  total_key_size-cipherkeylen;
 
@@ -559,6 +586,8 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 	uint16_t state1_size = 0, state2_size = 0;
 	uint16_t hash_offset, cd_size;
 	uint32_t *aad_len = NULL;
+	uint32_t wordIndex  = 0;
+	uint32_t *pTempKey;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -605,7 +634,8 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 			ICP_QAT_HW_AUTH_CONFIG_BUILD(ICP_QAT_HW_AUTH_MODE1,
 				cdesc->qat_hash_alg, digestsize);
 
-	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2)
+	if (cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2
+		|| cdesc->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9)
 		hash->auth_counter.counter = 0;
 	else
 		hash->auth_counter.counter = rte_bswap32(
@@ -722,6 +752,26 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 		break;
 	case ICP_QAT_HW_AUTH_ALGO_NULL:
 		break;
+	case ICP_QAT_HW_AUTH_ALGO_KASUMI_F9:
+		state1_size = qat_hash_get_state1_size(
+				ICP_QAT_HW_AUTH_ALGO_KASUMI_F9);
+		state2_size = ICP_QAT_HW_KASUMI_F9_STATE2_SZ;
+		memset(cdesc->cd_cur_ptr, 0, state1_size + state2_size);
+		pTempKey = (uint32_t *)(cdesc->cd_cur_ptr + state1_size
+							+ authkeylen);
+		/*
+		* The Inner Hash Initial State2 block must contain IK
+		* (Initialisation Key), followed by IK XOR-ed with KM
+		* (Key Modifier): IK||(IK^KM).
+		*/
+		/* write the auth key */
+		memcpy(cdesc->cd_cur_ptr + state1_size, authkey, authkeylen);
+		/* initialise temp key with auth key */
+		memcpy(pTempKey, authkey, authkeylen);
+		/* XOR Key with KASUMI F9 key modifier at 4 bytes level */
+		for (wordIndex = 0; wordIndex < (authkeylen >> 2); wordIndex++)
+			pTempKey[wordIndex] ^= KASUMI_F9_KEY_MODIFIER_4_BYTES;
+		break;
 	default:
 		PMD_DRV_LOG(ERR, "Invalid HASH alg %u", cdesc->qat_hash_alg);
 		return -EFAULT;
@@ -833,3 +883,15 @@ int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
 	}
 	return 0;
 }
+
+int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
+{
+	switch (key_len) {
+	case ICP_QAT_HW_KASUMI_KEY_SZ:
+		*alg = ICP_QAT_HW_CIPHER_ALGO_KASUMI;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index 67af596..d13933d 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -387,6 +387,51 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
 			}, },
 		}, }
 	},
+	{       /* KASUMI (F8) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.iv_size = {
+					.min = 8,
+					.max = 8,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
+	{       /* KASUMI (F9) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_KASUMI_F9,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.digest_size = {
+					.min = 4,
+					.max = 4,
+					.increment = 0
+				},
+				.aad_size = {
+					.min = 8,
+					.max = 8,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
@@ -512,11 +557,18 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_CIPHER_NULL:
 		session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
 		break;
+	case RTE_CRYPTO_CIPHER_KASUMI_F8:
+		if (qat_alg_validate_kasumi_key(cipher_xform->key.length,
+					&session->qat_cipher_alg) != 0) {
+			PMD_DRV_LOG(ERR, "Invalid KASUMI cipher key size");
+			goto error_out;
+		}
+		session->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;
+		break;
 	case RTE_CRYPTO_CIPHER_3DES_ECB:
 	case RTE_CRYPTO_CIPHER_3DES_CBC:
 	case RTE_CRYPTO_CIPHER_AES_ECB:
 	case RTE_CRYPTO_CIPHER_AES_CCM:
-	case RTE_CRYPTO_CIPHER_KASUMI_F8:
 		PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
 				cipher_xform->algo);
 		goto error_out;
@@ -645,6 +697,9 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_NULL:
 		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
 		break;
+	case RTE_CRYPTO_AUTH_KASUMI_F9:
+		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_KASUMI_F9;
+		break;
 	case RTE_CRYPTO_AUTH_SHA1:
 	case RTE_CRYPTO_AUTH_SHA256:
 	case RTE_CRYPTO_AUTH_SHA512:
@@ -653,7 +708,6 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_MD5:
 	case RTE_CRYPTO_AUTH_AES_CCM:
 	case RTE_CRYPTO_AUTH_AES_GMAC:
-	case RTE_CRYPTO_AUTH_KASUMI_F9:
 	case RTE_CRYPTO_AUTH_AES_CMAC:
 	case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 	case RTE_CRYPTO_AUTH_ZUC_EIA3:
@@ -857,11 +911,12 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 
 	cipher_param->cipher_length = op->sym->cipher.data.length;
 	cipher_param->cipher_offset = op->sym->cipher.data.offset;
-	if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2) {
+	if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
+			ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
 		if (unlikely((cipher_param->cipher_length % BYTE_LENGTH != 0) ||
 				(cipher_param->cipher_offset
 					% BYTE_LENGTH != 0))) {
-			PMD_DRV_LOG(ERR, " For Snow3g, QAT PMD only "
+			PMD_DRV_LOG(ERR, " For Snow3g/Kasumi, QAT PMD only "
 				"supports byte aligned values");
 			op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 			return -EINVAL;
@@ -900,6 +955,22 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 		auth_param->auth_off >>= 3;
 		auth_param->auth_len >>= 3;
 	}
+	if ((ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
+			ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) &&
+			ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
+		auth_param->auth_len = (auth_param->auth_len >> 3)
+				+ (auth_param->auth_off >> 3)
+				+ (BYTE_LENGTH >> 3)
+				- 8;
+		auth_param->auth_off = 8;
+	} else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH
+			&& ctx->qat_hash_alg ==
+					ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
+		auth_param->auth_len = (auth_param->auth_len >> 3)
+				+ (auth_param->auth_off >> 3)
+				+ (BYTE_LENGTH >> 3);
+		auth_param->auth_off = 0;
+	}
 	auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
 
 	if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
-- 
2.5.5

[dpdk-dev] [PATCH v4 4/4] app/test: add Kasumi tests in QAT test suite

[Deepak Kumar Jain]

This patch adds KASUMI tests in the QAT testsuite.
Alg-Chaining tests have also been added in the KASUMI
SW PMD.

Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
 app/test/test_cryptodev.c                          | 210 ++++++++++++++++++++-
 app/test/test_cryptodev_kasumi_hash_test_vectors.h |  77 ++++++++
 app/test/test_cryptodev_kasumi_test_vectors.h      | 105 ++++++++++-
 3 files changed, 385 insertions(+), 7 deletions(-)

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 61a474c..6c6e141 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -1571,7 +1571,6 @@ create_snow3g_kasumi_auth_cipher_operation(const unsigned auth_tag_len,
 		aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 8);
 	else
 		aad_buffer_len = ALIGN_POW2_ROUNDUP(aad_len, 16);
-
 	sym_op->auth.aad.data = (uint8_t *)rte_pktmbuf_prepend(
 	ut_params->ibuf, aad_buffer_len);
 	TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
@@ -1579,10 +1578,8 @@ create_snow3g_kasumi_auth_cipher_operation(const unsigned auth_tag_len,
 	sym_op->auth.aad.phys_addr = rte_pktmbuf_mtophys(
 				ut_params->ibuf);
 	sym_op->auth.aad.length = aad_len;
-
 	memset(sym_op->auth.aad.data, 0, aad_buffer_len);
 	rte_memcpy(sym_op->auth.aad.data, aad, aad_len);
-
 	TEST_HEXDUMP(stdout, "aad:",
 			sym_op->auth.aad.data, aad_len);
 
@@ -1959,6 +1956,12 @@ test_kasumi_hash_generate_test_case_5(void)
 }
 
 static int
+test_kasumi_hash_generate_test_case_6(void)
+{
+	return test_kasumi_authentication(&kasumi_hash_test_case_6);
+}
+
+static int
 test_kasumi_hash_verify_test_case_1(void)
 {
 	return test_kasumi_authentication_verify(&kasumi_hash_test_case_1);
@@ -2816,6 +2819,174 @@ test_snow3g_auth_cipher(const struct snow3g_test_data *tdata)
 }
 
 static int
+test_kasumi_auth_cipher(const struct kasumi_test_data *tdata)
+{
+	struct crypto_testsuite_params *ts_params = &testsuite_params;
+	struct crypto_unittest_params *ut_params = &unittest_params;
+
+	int retval;
+
+	uint8_t *plaintext, *ciphertext;
+	unsigned plaintext_pad_len;
+	unsigned plaintext_len;
+
+	/* Create KASUMI session */
+	retval = create_snow3g_kasumi_auth_cipher_session(
+			ts_params->valid_devs[0],
+			RTE_CRYPTO_CIPHER_OP_ENCRYPT,
+			RTE_CRYPTO_AUTH_OP_GENERATE,
+			RTE_CRYPTO_AUTH_KASUMI_F9,
+			RTE_CRYPTO_CIPHER_KASUMI_F8,
+			tdata->key.data, tdata->key.len,
+			tdata->aad.len, tdata->digest.len);
+	if (retval < 0)
+		return retval;
+	ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+
+	/* clear mbuf payload */
+	memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
+			rte_pktmbuf_tailroom(ut_params->ibuf));
+
+	plaintext_len = ceil_byte_length(tdata->plaintext.len);
+	/* Append data which is padded to a multiple of */
+	/* the algorithms block size */
+	plaintext_pad_len = RTE_ALIGN_CEIL(plaintext_len, 16);
+	plaintext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
+				plaintext_pad_len);
+	memcpy(plaintext, tdata->plaintext.data, plaintext_len);
+
+	TEST_HEXDUMP(stdout, "plaintext:", plaintext, plaintext_len);
+
+	/* Create KASUMI operation */
+	retval = create_snow3g_kasumi_auth_cipher_operation(tdata->digest.len,
+				tdata->iv.data, tdata->iv.len,
+				tdata->aad.data, tdata->aad.len,
+				plaintext_pad_len,
+				tdata->validCipherLenInBits.len,
+				tdata->validCipherOffsetLenInBits.len,
+				tdata->validAuthLenInBits.len,
+				tdata->validAuthOffsetLenInBits.len,
+				RTE_CRYPTO_AUTH_KASUMI_F9,
+				RTE_CRYPTO_CIPHER_KASUMI_F8
+				);
+
+	if (retval < 0)
+		return retval;
+
+	ut_params->op = process_crypto_request(ts_params->valid_devs[0],
+			ut_params->op);
+	TEST_ASSERT_NOT_NULL(ut_params->op, "failed to retrieve obuf");
+	ut_params->obuf = ut_params->op->sym->m_src;
+	if (ut_params->obuf)
+		ciphertext = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
+				+ tdata->iv.len + tdata->aad.len;
+	else
+		ciphertext = plaintext;
+
+	/* Validate obuf */
+	TEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(
+			ciphertext,
+			tdata->ciphertext.data,
+			tdata->validCipherLenInBits.len,
+			"KASUMI Ciphertext data not as expected");
+	ut_params->digest = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
+	    + plaintext_pad_len + tdata->aad.len + tdata->iv.len;
+
+	/* Validate obuf */
+	TEST_ASSERT_BUFFERS_ARE_EQUAL(
+			ut_params->digest,
+			tdata->digest.data,
+			DIGEST_BYTE_LENGTH_KASUMI_F9,
+			"KASUMI Generated auth tag not as expected");
+	return 0;
+}
+
+static int
+test_kasumi_cipher_auth(const struct kasumi_test_data *tdata)
+{
+	struct crypto_testsuite_params *ts_params = &testsuite_params;
+	struct crypto_unittest_params *ut_params = &unittest_params;
+
+	int retval;
+
+	uint8_t *plaintext, *ciphertext;
+	unsigned plaintext_pad_len;
+	unsigned plaintext_len;
+
+	/* Create KASUMI session */
+	retval = create_snow3g_kasumi_cipher_auth_session(
+			ts_params->valid_devs[0],
+			RTE_CRYPTO_CIPHER_OP_ENCRYPT,
+			RTE_CRYPTO_AUTH_OP_GENERATE,
+			RTE_CRYPTO_AUTH_KASUMI_F9,
+			RTE_CRYPTO_CIPHER_KASUMI_F8,
+			tdata->key.data, tdata->key.len,
+			tdata->aad.len, tdata->digest.len);
+	if (retval < 0)
+		return retval;
+
+	ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+
+	/* clear mbuf payload */
+	memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
+			rte_pktmbuf_tailroom(ut_params->ibuf));
+
+	plaintext_len = ceil_byte_length(tdata->plaintext.len);
+	/* Append data which is padded to a multiple of */
+	/* the algorithms block size */
+	plaintext_pad_len = RTE_ALIGN_CEIL(plaintext_len, 16);
+	plaintext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
+				plaintext_pad_len);
+	memcpy(plaintext, tdata->plaintext.data, plaintext_len);
+
+	TEST_HEXDUMP(stdout, "plaintext:", plaintext, plaintext_len);
+
+	/* Create KASUMI operation */
+	retval = create_snow3g_kasumi_cipher_hash_operation(tdata->digest.data,
+				tdata->digest.len, tdata->aad.data,
+				tdata->aad.len,
+				plaintext_pad_len, RTE_CRYPTO_AUTH_OP_GENERATE,
+				RTE_CRYPTO_AUTH_KASUMI_F9,
+				RTE_CRYPTO_CIPHER_KASUMI_F8,
+				tdata->iv.data, tdata->iv.len,
+				tdata->validCipherLenInBits.len,
+				tdata->validCipherOffsetLenInBits.len,
+				tdata->validAuthLenInBits.len,
+				tdata->validAuthOffsetLenInBits.len
+				);
+	if (retval < 0)
+		return retval;
+
+	ut_params->op = process_crypto_request(ts_params->valid_devs[0],
+			ut_params->op);
+	TEST_ASSERT_NOT_NULL(ut_params->op, "failed to retrieve obuf");
+	ut_params->obuf = ut_params->op->sym->m_src;
+	if (ut_params->obuf)
+		ciphertext = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
+				+ tdata->aad.len + tdata->iv.len;
+	else
+		ciphertext = plaintext;
+
+	ut_params->digest = rte_pktmbuf_mtod(ut_params->obuf, uint8_t *)
+			+ plaintext_pad_len + tdata->aad.len + tdata->iv.len;
+
+	/* Validate obuf */
+	TEST_ASSERT_BUFFERS_ARE_EQUAL_BIT(
+		ciphertext,
+		tdata->ciphertext.data,
+		tdata->validCipherLenInBits.len,
+		"KASUMI Ciphertext data not as expected");
+
+	/* Validate obuf */
+	TEST_ASSERT_BUFFERS_ARE_EQUAL(
+		ut_params->digest,
+		tdata->digest.data,
+		DIGEST_BYTE_LENGTH_SNOW3G_UIA2,
+		"KASUMI Generated auth tag not as expected");
+	return 0;
+}
+
+static int
 test_kasumi_encryption_test_case_1(void)
 {
 	return test_kasumi_encryption(&kasumi_test_case_1);
@@ -2975,6 +3146,19 @@ test_snow3g_auth_cipher_test_case_1(void)
 	return test_snow3g_auth_cipher(&snow3g_test_case_6);
 }
 
+static int
+test_kasumi_auth_cipher_test_case_1(void)
+{
+	return test_kasumi_auth_cipher(&kasumi_test_case_3);
+}
+
+static int
+test_kasumi_cipher_auth_test_case_1(void)
+{
+	return test_kasumi_cipher_auth(&kasumi_test_case_6);
+}
+
+
 /* ***** AES-GCM Tests ***** */
 
 static int
@@ -4137,6 +4321,19 @@ static struct unit_test_suite cryptodev_qat_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_null_auth_cipher_operation),
 
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_hash_generate_test_case_6),
+
+		/** KASUMI tests */
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_encryption_test_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_encryption_test_case_3),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_auth_cipher_test_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_cipher_auth_test_case_1),
+
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
@@ -4238,6 +4435,8 @@ static struct unit_test_suite cryptodev_sw_kasumi_testsuite  = {
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_generate_test_case_5),
 		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_hash_generate_test_case_6),
+		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_1),
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_2),
@@ -4247,7 +4446,10 @@ static struct unit_test_suite cryptodev_sw_kasumi_testsuite  = {
 			test_kasumi_hash_verify_test_case_4),
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_kasumi_hash_verify_test_case_5),
-
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_auth_cipher_test_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_kasumi_cipher_auth_test_case_1),
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
diff --git a/app/test/test_cryptodev_kasumi_hash_test_vectors.h b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
index c080b9f..69742fa 100644
--- a/app/test/test_cryptodev_kasumi_hash_test_vectors.h
+++ b/app/test/test_cryptodev_kasumi_hash_test_vectors.h
@@ -257,4 +257,81 @@ struct kasumi_hash_test_data kasumi_hash_test_case_5 = {
 		.len  = 4
 	}
 };
+
+struct kasumi_hash_test_data kasumi_hash_test_case_6 = {
+	.key = {
+		.data = {
+			0x83, 0xFD, 0x23, 0xA2, 0x44, 0xA7, 0x4C, 0xF3,
+			0x58, 0xDA, 0x30, 0x19, 0xF1, 0x72, 0x26, 0x35
+		},
+		.len = 16
+	},
+	.aad = {
+		.data = {
+			0x36, 0xAF, 0x61, 0x44, 0x4F, 0x30, 0x2A, 0xD2
+		},
+		.len = 8
+	},
+	.plaintext = {
+		.data = {
+			0x35, 0xC6, 0x87, 0x16, 0x63, 0x3C, 0x66, 0xFB,
+			0x75, 0x0C, 0x26, 0x68, 0x65, 0xD5, 0x3C, 0x11,
+			0xEA, 0x05, 0xB1, 0xE9, 0xFA, 0x49, 0xC8, 0x39,
+			0x8D, 0x48, 0xE1, 0xEF, 0xA5, 0x90, 0x9D, 0x39,
+			0x47, 0x90, 0x28, 0x37, 0xF5, 0xAE, 0x96, 0xD5,
+			0xA0, 0x5B, 0xC8, 0xD6, 0x1C, 0xA8, 0xDB, 0xEF,
+			0x1B, 0x13, 0xA4, 0xB4, 0xAB, 0xFE, 0x4F, 0xB1,
+			0x00, 0x60, 0x45, 0xB6, 0x74, 0xBB, 0x54, 0x72,
+			0x93, 0x04, 0xC3, 0x82, 0xBE, 0x53, 0xA5, 0xAF,
+			0x05, 0x55, 0x61, 0x76, 0xF6, 0xEA, 0xA2, 0xEF,
+			0x1D, 0x05, 0xE4, 0xB0, 0x83, 0x18, 0x1E, 0xE6,
+			0x74, 0xCD, 0xA5, 0xA4, 0x85, 0xF7, 0x4D, 0x7A,
+			0xC0
+		},
+		.len = 776
+	},
+	.validAuthLenInBits = {
+		.len = 768
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x95, 0xAE, 0x41, 0xBA},
+		.len  = 4
+	}
+};
+
+struct kasumi_hash_test_data kasumi_hash_test_case_7 = {
+	.key = {
+		.data = {
+			0x5A, 0xCB, 0x1D, 0x64, 0x4C, 0x0D, 0x51, 0x20,
+			0x4E, 0xA5, 0xF1, 0x45, 0x10, 0x10, 0xD8, 0x52
+		},
+		.len = 16
+	},
+	.aad = {
+		.data = {
+			0x38, 0xA6, 0xF0, 0x56, 0x05, 0xD2, 0xEC, 0x49,
+		},
+		.len = 8
+	},
+	.plaintext = {
+		.data = {
+			0xAD, 0x9C, 0x44, 0x1F, 0x89, 0x0B, 0x38, 0xC4,
+			0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8, 0xC0
+		},
+		.len = 128
+	},
+	.validAuthLenInBits = {
+		.len = 120
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x87, 0x5F, 0xE4, 0x89},
+		.len  = 4
+	}
+};
 #endif /* TEST_CRYPTODEV_KASUMI_HASH_TEST_VECTORS_H_ */
diff --git a/app/test/test_cryptodev_kasumi_test_vectors.h b/app/test/test_cryptodev_kasumi_test_vectors.h
index 9163d7c..ef1dc6f 100644
--- a/app/test/test_cryptodev_kasumi_test_vectors.h
+++ b/app/test/test_cryptodev_kasumi_test_vectors.h
@@ -44,12 +44,22 @@ struct kasumi_test_data {
 		unsigned len;
 	} iv;
 
+	/* Includes: COUNT (4 bytes) and FRESH (4 bytes) */
 	struct {
-		uint8_t data[1024];
+		uint8_t data[8];
+		unsigned len;
+	} aad;
+
+	struct {
+		uint8_t data[1024]; /* Data may include direction bit */
 		unsigned len; /* length must be in Bits */
 	} plaintext;
 
 	struct {
+		unsigned len;
+	} validDataLenInBits;
+
+	struct {
 		uint8_t data[1024];
 		unsigned len; /* length must be in Bits */
 	} ciphertext;
@@ -61,6 +71,21 @@ struct kasumi_test_data {
 	struct {
 		unsigned len;
 	} validCipherOffsetLenInBits;
+
+	/* Actual length of data to be hashed */
+	struct {
+		unsigned len;
+	} validAuthLenInBits;
+
+	struct {
+		unsigned len;
+	} validAuthOffsetLenInBits;
+
+	struct {
+		uint8_t data[64];
+		unsigned len;
+	} digest;
+
 };
 
 struct kasumi_test_data kasumi_test_case_1 = {
@@ -183,12 +208,18 @@ struct kasumi_test_data kasumi_test_case_3 = {
 		},
 		.len = 8
 	},
+	.aad = {
+		.data = {
+			0x38, 0xA6, 0xF0, 0x56, 0x05, 0xD2, 0xEC, 0x49
+		},
+		.len = 8
+	},
 	.plaintext = {
 		.data = {
 			0xAD, 0x9C, 0x44, 0x1F, 0x89, 0x0B, 0x38, 0xC4,
-			0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8
+			0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8, 0xC0
 		},
-		.len = 120
+		.len = 128
 	},
 	.ciphertext = {
 		.data = {
@@ -197,11 +228,24 @@ struct kasumi_test_data kasumi_test_case_3 = {
 		},
 		.len = 120
 	},
+	.validDataLenInBits = {
+			.len = 128
+	},
 	.validCipherLenInBits = {
 		.len = 120
 	},
 	.validCipherOffsetLenInBits = {
 		.len = 64
+	},
+	.validAuthLenInBits = {
+		.len = 120
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x87, 0x5F, 0xE4, 0x89},
+		.len  = 4
 	}
 };
 
@@ -305,4 +349,59 @@ struct kasumi_test_data kasumi_test_case_5 = {
 	},
 };
 
+struct kasumi_test_data kasumi_test_case_6 = {
+	.key = {
+		.data = {
+			 0x5A, 0xCB, 0x1D, 0x64, 0x4C, 0x0D, 0x51, 0x20,
+			 0x4E, 0xA5, 0xF1, 0x45, 0x10, 0x10, 0xD8, 0x52
+		},
+		.len = 16
+	},
+	.iv = {
+		.data = {
+			0xFA, 0x55, 0x6B, 0x26, 0x1C, 0x00, 0x00, 0x00
+		},
+		.len = 8
+	},
+	.aad = {
+		.data = {
+			0x38, 0xA6, 0xF0, 0x56, 0x05, 0xD2, 0xEC, 0x49
+		},
+		.len = 8
+	},
+	.plaintext = {
+		.data = {
+			0xAD, 0x9C, 0x44, 0x1F, 0x89, 0x0B, 0x38, 0xC4,
+			0x57, 0xA4, 0x9D, 0x42, 0x14, 0x07, 0xE8, 0xC0
+		},
+		.len = 128
+	},
+	.ciphertext = {
+		.data = {
+			0x9B, 0xC9, 0x2C, 0xA8, 0x03, 0xC6, 0x7B, 0x28,
+			0xA1, 0x1A, 0x4B, 0xEE, 0x5A, 0x0C, 0x25
+		},
+		.len = 120
+	},
+	.validDataLenInBits = {
+			.len = 128
+	},
+	.validCipherLenInBits = {
+		.len = 120
+	},
+	.validCipherOffsetLenInBits = {
+		.len = 64
+	},
+	.validAuthLenInBits = {
+		.len = 120
+	},
+	.validAuthOffsetLenInBits = {
+		.len = 64
+	},
+	.digest = {
+		.data = {0x0F, 0xD2, 0xAA, 0xB5},
+		.len  = 4
+	}
+};
+
 #endif /* TEST_CRYPTODEV_KASUMI_TEST_VECTORS_H_ */
-- 
2.5.5

Re: [dpdk-dev] [PATCH v4 0/4] add kasumi in Intel(R) QuickAssist driver

[De Lara Guarch, Pablo]

> -----Original Message-----
> From: Jain, Deepak K
> Sent: Monday, September 19, 2016 4:01 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo; Jain, Deepak K
> Subject: [PATCH v4 0/4] add kasumi in Intel(R) QuickAssist driver
> 
> This patchset depends on following patch:
> "crypto/qat: add Intel(R) QuickAssist C3xxx device"
> (http://dpdk.org/dev/patchwork/patch/15794/
> 
> Changes in v4:
> * Split cleanup patch into two smaller patches.
> * Fixed indentation issues.
> 
> Changes in v3:
> * Merged Cipher only and hash only patches into one patch.
> * Code cleaup for clear understanding.
> 
> Changes in v2:
> * Updated Test code to apply cleanly on driver code
> * Added relevant documentation
> 
> 
> Deepak Kumar Jain (4):
>   app/test: crypto test code cleanup
>   app/test: rename functions name
>   crypto/qat: add Kasumi support in Intel(R) QAT driver
>   app/test: add Kasumi tests in QAT test suite
> 
>  app/test/test_cryptodev.c                          | 341 ++++++++++++++++-----
>  app/test/test_cryptodev_kasumi_hash_test_vectors.h |  77 +++++
>  app/test/test_cryptodev_kasumi_test_vectors.h      | 105 ++++++-
>  doc/guides/cryptodevs/qat.rst                      |  10 +-
>  doc/guides/rel_notes/release_16_11.rst             |   2 +-
>  drivers/crypto/qat/qat_adf/qat_algs.h              |  10 +-
>  drivers/crypto/qat/qat_adf/qat_algs_build_desc.c   |  72 ++++-
>  drivers/crypto/qat/qat_crypto.c                    |  79 ++++-
>  8 files changed, 604 insertions(+), 92 deletions(-)
> 
> --
> 2.5.5

Applied to dpdk-next-crypto.
Thanks,

Pablo

Re: [dpdk-dev] [PATCH 0/4] add kasumi in Intel(R) QuickAssist driver

[De Lara Guarch, Pablo]

Hi Deepak,

> -----Original Message-----
> From: Jain, Deepak K
> Sent: Tuesday, August 23, 2016 2:36 PM
> To: De Lara Guarch, Pablo; Trahe, Fiona; Griffin, John
> Cc: dev@dpdk.org; Jain, Deepak K
> Subject: [PATCH 0/4] add kasumi in Intel(R) QuickAssist driver
> 
> This patchset contains patches to enable kasumi cipher only
> and hash only functionality in Intel(R) QuickAsisst
> Technology Driver.
> 
> This patchset depends on following patch:
> "crypto/qat: add NULL capability to Intel QAT driver"
> (http://dpdk.org/dev/patchwork/patch/15230/)
> 
> Deepak Kumar Jain (4):
>   crypto/qat: enable Kasumi F9 support in QAT driver
>   app/test: add Kasumi f9 tests in QAT test suite
>   crypto/qat: enable support of Kasumi F8 in QAT cryptodev
>   app/test: add kasumi f8 test into QAT testsuite
> 
>  app/test/test_cryptodev.c                          | 16 +++++
>  app/test/test_cryptodev_kasumi_hash_test_vectors.h | 43 +++++++++++++
>  drivers/crypto/qat/qat_adf/qat_algs.h              | 10 ++-
>  drivers/crypto/qat/qat_adf/qat_algs_build_desc.c   | 74
> ++++++++++++++++++++--
>  drivers/crypto/qat/qat_crypto.c                    | 69 ++++++++++++++++++--
>  5 files changed, 201 insertions(+), 11 deletions(-)
> 
> --
> 2.5.5

Could you send a v2 with a release notes update?

Thanks,
Pablo

Re: [dpdk-dev] [PATCH 0/4] add kasumi in Intel(R) QuickAssist driver

[Jain, Deepak K]

Hi Pablo,

> -----Original Message-----
> From: De Lara Guarch, Pablo
> Sent: Wednesday, September 7, 2016 7:07 PM
> To: Jain, Deepak K <deepak.k.jain@intel.com>; Trahe, Fiona
> <fiona.trahe@intel.com>; Griffin, John <john.griffin@intel.com>
> Cc: dev@dpdk.org
> Subject: RE: [PATCH 0/4] add kasumi in Intel(R) QuickAssist driver
> 
> Hi Deepak,
> 
> > -----Original Message-----
> > From: Jain, Deepak K
> > Sent: Tuesday, August 23, 2016 2:36 PM
> > To: De Lara Guarch, Pablo; Trahe, Fiona; Griffin, John
> > Cc: dev@dpdk.org; Jain, Deepak K
> > Subject: [PATCH 0/4] add kasumi in Intel(R) QuickAssist driver
> >
> > This patchset contains patches to enable kasumi cipher only and hash
> > only functionality in Intel(R) QuickAsisst Technology Driver.
> >
> > This patchset depends on following patch:
> > "crypto/qat: add NULL capability to Intel QAT driver"
> > (http://dpdk.org/dev/patchwork/patch/15230/)
> >
> > Deepak Kumar Jain (4):
> >   crypto/qat: enable Kasumi F9 support in QAT driver
> >   app/test: add Kasumi f9 tests in QAT test suite
> >   crypto/qat: enable support of Kasumi F8 in QAT cryptodev
> >   app/test: add kasumi f8 test into QAT testsuite
> >
> >  app/test/test_cryptodev.c                          | 16 +++++
> >  app/test/test_cryptodev_kasumi_hash_test_vectors.h | 43
> +++++++++++++
> >  drivers/crypto/qat/qat_adf/qat_algs.h              | 10 ++-
> >  drivers/crypto/qat/qat_adf/qat_algs_build_desc.c   | 74
> > ++++++++++++++++++++--
> >  drivers/crypto/qat/qat_crypto.c                    | 69 ++++++++++++++++++--
> >  5 files changed, 201 insertions(+), 11 deletions(-)
> >
> > --
> > 2.5.5
> 
> Could you send a v2 with a release notes update?
> 
Agreed. I will send v2 with release notes.

> Thanks,
> Pablo