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Thu, 21 Feb 2019 09:21:02 +0000 From: Shahaf Shuler To: =?iso-8859-1?Q?Ga=EBtan_Rivet?= CC: "anatoly.burakov@intel.com" , Yongseok Koh , Thomas Monjalon , "ferruh.yigit@intel.com" , "nhorman@tuxdriver.com" , "dev@dpdk.org" Thread-Topic: [PATCH 5/6] net/mlx5: support PCI device DMA map and unmap Thread-Index: AQHUw5A5KoxVu+EYWUWdWXo4EvvB4aXdm8+AgAA6+FCAAUBEgIAK5Ugw Date: Thu, 21 Feb 2019 09:21:02 +0000 Message-ID: References: <20190213113504.7aoc7myuacpmqo2b@bidouze.vm.6wind.com> <20190213114425.gsmqftnmakk4u3pj@bidouze.vm.6wind.com> <20190214102145.hyveguazu3f64sji@bidouze.vm.6wind.com> In-Reply-To: <20190214102145.hyveguazu3f64sji@bidouze.vm.6wind.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=shahafs@mellanox.com; x-originating-ip: [193.47.165.251] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 8189aeb8-8ef4-449b-2c66-08d697dde64f x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8189aeb8-8ef4-449b-2c66-08d697dde64f X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Feb 2019 09:21:02.5747 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR0502MB4036 Subject: Re: [dpdk-dev] [PATCH 5/6] net/mlx5: support PCI device DMA map and unmap X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Feb 2019 09:21:04 -0000 Thursday, February 14, 2019 12:22 PM, Ga=EBtan Rivet: > Subject: Re: [PATCH 5/6] net/mlx5: support PCI device DMA map and unmap >=20 > On Wed, Feb 13, 2019 at 07:11:35PM +0000, Shahaf Shuler wrote: > > Wednesday, February 13, 2019 1:44 PM, Ga=EBtan Rivet: > > > Subject: Re: [PATCH 5/6] net/mlx5: support PCI device DMA map and > > > unmap > > > > > > On Wed, Feb 13, 2019 at 12:35:04PM +0100, Ga=EBtan Rivet wrote: > > > > On Wed, Feb 13, 2019 at 11:10:25AM +0200, Shahaf Shuler wrote: > > > > > The implementation reuses the external memory registration work > > > > > done > > > > [..] > > > > > > > + > > > > > + /** > > > > > + * We really need to iterate all eth devices regardless of > > > > > + * their owner. > > > > > + */ > > > > > + while (port_id < RTE_MAX_ETHPORTS) { > > > > > + port_id =3D rte_eth_find_next(port_id); > > > > > + if (port_id >=3D RTE_MAX_ETHPORTS) > > > > > + break; > > > > > + dev =3D &rte_eth_devices[port_id]; > > > > > + drv_name =3D dev->device->driver->name; > > > > > + if (!strncmp(drv_name, MLX5_DRIVER_NAME, > > > > > + sizeof(MLX5_DRIVER_NAME) + 1) && > > > > > + pdev =3D=3D RTE_DEV_TO_PCI(dev->device)) { > > > > > + /* found the PCI device. */ > > > > > + return dev; > > > > > + } > > > > > + } > > > > > + return NULL; > > > > > +} > > > > > > > > Might I interest you in the new API? > > > > Good suggestion, will have a look on it in depth. > > > > > > > > > > { > > > > struct rte_dev_iterator it; > > > > struct rte_device *dev; > > > > > > > > RTE_DEV_FOREACH(dev, "class=3Deth", &it) > > > > if (dev =3D=3D &pdev->device) > > > > return it.class_device; > > > > return NULL; > > > > } > > > > > > > > > > On that note, this could be in the PCI bus instead? Looking in more depth into it. it looks like ethdev is the only device clas= s which register its type. So putting a generic iterator for every class on the PCI bus looks an overk= ill to me at this point.=20 I think I will take the above suggestion to replace the internal PMD code.= =20 > > > > We can put it on the PCI bus, but it would mean the PCI bus will not be > device agnostic. > > Currently, I couldn't find any reference to eth_dev on the PCI bus, bes= ides > a single macro which convert to pci device that doesn't really do type ch= ecks. > > > > Having it in, would mean the PCI will need start to distinguish between > ethdev, crypto dev and what ever devices exists on its bus. > > >=20 > I think it's worth thinking about it. > It can stay class-agnostic: >=20 > void * > rte_pci_device_class(struct rte_pci_device *pdev, const char *class) > { > char devstr[15+strlen(class)]; > struct rte_dev_iterator it; > struct rte_device *dev; >=20 > snprintf(devstr, sizeof(devstr), "bus=3Dpci/class=3D%s", clas= s); > RTE_DEV_FOREACH(dev, devstr, &it) > if (dev =3D=3D &pdev->device) > return it.class_device; > return NULL; > } >=20 > (not a fan of the stack VLA but whatever.) > then: >=20 > eth_dev =3D rte_pci_device_class(pdev, "eth"); >=20 > Whichever type of device could be returned. Only limit is that you have t= o > know beforehand what is the device type of the PCI device you are queryin= g > about, but that's necessary anyway. >=20 > And if it was instead a crypto dev, it would return NULL. >=20 > -- > Ga=EBtan Rivet > 6WIND