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* [dpdk-dev] [PATCH] net/mlx5: fix UAR remap initialization for 32-bit systems
@ 2019-09-18  6:54 Viacheslav Ovsiienko
  2019-09-22  7:01 ` Matan Azrad
  2019-09-29  8:44 ` Raslan Darawsheh
  0 siblings, 2 replies; 3+ messages in thread
From: Viacheslav Ovsiienko @ 2019-09-18  6:54 UTC (permalink / raw)
  To: dev; +Cc: matan, rasland

The txq_uar_init() routine uses the uninitialized uar_mmap_offset
field in 32-bit configurations due to this field is initialized
after txq_uar_init() call.

Fixes: 120dc4a7dcd3 ("net/mlx5: remove device register remap")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
---
 drivers/net/mlx5/mlx5_txq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index 81f3b40..2b7d6c0 100644
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -572,7 +572,6 @@ struct mlx5_txq_ibv *
 	txq_ibv->cq = tmpl.cq;
 	rte_atomic32_inc(&txq_ibv->refcnt);
 	txq_ctrl->bf_reg = qp.bf.reg;
-	txq_uar_init(txq_ctrl);
 	if (qp.comp_mask & MLX5DV_QP_MASK_UAR_MMAP_OFFSET) {
 		txq_ctrl->uar_mmap_offset = qp.uar_mmap_offset;
 		DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%"PRIx64,
@@ -585,6 +584,7 @@ struct mlx5_txq_ibv *
 		rte_errno = EINVAL;
 		goto error;
 	}
+	txq_uar_init(txq_ctrl);
 	LIST_INSERT_HEAD(&priv->txqsibv, txq_ibv, next);
 	txq_ibv->txq_ctrl = txq_ctrl;
 	priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2019-09-29  8:44 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2019-09-18  6:54 [dpdk-dev] [PATCH] net/mlx5: fix UAR remap initialization for 32-bit systems Viacheslav Ovsiienko
2019-09-22  7:01 ` Matan Azrad
2019-09-29  8:44 ` Raslan Darawsheh

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