Re: [dpdk-dev] [PATCH] net/mlx5: fix the compatibility with MISC4

[Raslan Darawsheh <rasland@mellanox.com>]

Hi,

> -----Original Message-----
> From: Bing Zhao <bingz@mellanox.com>
> Sent: Monday, July 20, 2020 12:04 PM
> To: Ori Kam <orika@mellanox.com>; Slava Ovsiienko
> <viacheslavo@mellanox.com>
> Cc: Raslan Darawsheh <rasland@mellanox.com>; Matan Azrad
> <matan@mellanox.com>; dev@dpdk.org
> Subject: [PATCH] net/mlx5: fix the compatibility with MISC4
> 
> When eCPRI offloading is introduced, the support for misc parameters
> 4 of flow table entry (FTE) match set is needed. The structure of
> "mlx5_ifc_fte_match_param_bits" is extended with
> "mlx5_ifc_fte_match_set_misc4_bits" at the end of it. The total size
> of the FTE match set will be changed into 384 bytes from 320 bytes.
> Low level user space driver (rdma-core) will have the validation of
> the length of FTE match set. In the old release that no MISC4
> supported in the rdma-core, the validation will fail, and this will
> break the backward compatibility, even if the MISC4 is not used in
> most cases.
> In order to make new mlx5 PMD work well with old rdma-core, the
> length adjustment needs to be done. When creating a flow, the lengths
> of the matcher and value are both set to 320 without MISC4. There is
> no need to change the structure definition, all bytes of the MISC4
> will be discarded if it is not needed. Or else, like in eCPRI
> matching, the lengths will be adjusted to 384 for matcher creation
> and value matching.
> 
> Fixes: afa8556c873c ("net/mlx5: add flow translation of eCPRI header")
> 
> Signed-off-by: Bing Zhao <bingz@mellanox.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
>  drivers/net/mlx5/mlx5_flow_dv.c | 17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
> b/drivers/net/mlx5/mlx5_flow_dv.c
> index ee66a44..778a766 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -5765,7 +5765,15 @@ struct field_modify_info modify_tcp[] = {
>  	dev_flow = &((struct mlx5_flow *)priv->inter_flows)[priv-
> >flow_idx++];
>  	dev_flow->handle = dev_handle;
>  	dev_flow->handle_idx = handle_idx;
> -	dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
> +	/*
> +	 * In some old rdma-core releases, before continuing, a check of the
> +	 * length of matching parameter will be done at first. It needs to use
> +	 * the length without misc4 param. If the flow has misc4 support,
> then
> +	 * the length needs to be adjusted accordingly. Each param member
> is
> +	 * aligned with a 64B boundary naturally.
> +	 */
> +	dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param) -
> +				  MLX5_ST_SZ_BYTES(fte_match_set_misc4);
>  	/*
>  	 * The matching value needs to be cleared to 0 before using. In the
>  	 * past, it will be automatically cleared when using rte_*alloc
> @@ -7986,7 +7994,8 @@ struct field_modify_info modify_tcp[] = {
>  	uint64_t priority = attr->priority;
>  	struct mlx5_flow_dv_matcher matcher = {
>  		.mask = {
> -			.size = sizeof(matcher.mask.buf),
> +			.size = sizeof(matcher.mask.buf) -
> +				MLX5_ST_SZ_BYTES(fte_match_set_misc4),
>  		},
>  	};
>  	int actions_n = 0;
> @@ -8678,6 +8687,10 @@ struct field_modify_info modify_tcp[] = {
>  						NULL,
>  						"cannot create eCPRI
> parser");
>  			}
> +			/* Adjust the length matcher and device flow value.
> */
> +			matcher.mask.size =
> MLX5_ST_SZ_BYTES(fte_match_param);
> +			dev_flow->dv.value.size =
> +
> 	MLX5_ST_SZ_BYTES(fte_match_param);
>  			flow_dv_translate_item_ecpri(dev, match_mask,
>  						     match_value, items);
>  			/* No other protocol should follow eCPRI layer. */
> --
> 1.8.3.1

Patch squashed into relevant commit in master-net-mlx,

Kindest regards,
Raslan Darawsheh