From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7E0AEA052B; Wed, 29 Jul 2020 17:01:36 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A3E5D1BFD6; Wed, 29 Jul 2020 17:01:30 +0200 (CEST) Received: from EUR02-AM5-obe.outbound.protection.outlook.com (mail-eopbgr00070.outbound.protection.outlook.com [40.107.0.70]) by dpdk.org (Postfix) with ESMTP id DF6CD3B5 for ; Wed, 29 Jul 2020 17:01:26 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ijElqA9D3W/QGTDNPAylfw93Xk6kyUnFrhMVROeTfhg7bYCDNELDhTfPec9cWfy9l9VnSX8b7AopoCPkK6KPpYFgNuF7AAGiRrJnwik4u77aZAqDzKf9HvzPa1jX/S7eGN8hLDhXxR3f8YP7UbahX/t+Itcq05n+8ExEp3DMhOjSG8ffWhtRb7p54Aga2lAQj8qXV7p4vZDgEsz23v5ghe+r1zIEk/HiYXlESlsqrLXuP/8wPRMJRLTD+VWiwc1A8eCdsLGWrjcBQc03gP5FIz2C+t5Wo8EH2NA1cgghg1OCfi5ZCjkZyZIkXQGaoczj6OF9ydWs1rJkHKWxxWbNmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=MeBctow5s9ewdThlFdZ8O2PtGknQc+Z/+t5WhpwxCG4=; b=FYosKAhb7PASUzlsw1KfuvxdFoB+nEVyHZr8bkBc2J073RIJoZVZY6lDB5d6YVcqUGaIRm1etZ6/v4mQ4HCFyFmFRcTATkBakR7SEItAqIjj4EgJfKkaLl8wKohuK3pM3p0gUeSWupdY1aSOLarSb0ihhKTLqF7tqv68WIh8IvJ6Z5aMDIzwxnLbAMWZJFenAHQPHulhA0FOMyMjCOSZz08na0MPTGrQjVl7VqtaVA0mWQNHezk33mu5z0Y8ZrM5xH5F54VPFIwlvYtpb0s/iw/SLdMVgQMoy/xhdHiQFOzGb85JlxKE4L/cxroEatMFwiFahrEOXbIzJH6h9DK3+g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=mellanox.com; dmarc=pass action=none header.from=mellanox.com; dkim=pass header.d=mellanox.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=MeBctow5s9ewdThlFdZ8O2PtGknQc+Z/+t5WhpwxCG4=; b=HVjJX+VFpUqbae5O/0nSVJqUl8pf5KLMT1ZKqCBTvY8sKe8nLamQnlp14pfNExHZNEwa0YeT6DWSe4Wk6fpPnIyP6AL5u3om95XnRD2bA+YzenW8BbfJCud8qC5ya/s3Mv0ijmYpsFgGrVLgvjLm8+s0mRXnIdbIxtrrYWBqSyA= Received: from AM0PR05MB6707.eurprd05.prod.outlook.com (2603:10a6:20b:15b::17) by AM0PR05MB6083.eurprd05.prod.outlook.com (2603:10a6:208:127::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3239.16; Wed, 29 Jul 2020 15:01:26 +0000 Received: from AM0PR05MB6707.eurprd05.prod.outlook.com ([fe80::ecd3:6008:3784:4012]) by AM0PR05MB6707.eurprd05.prod.outlook.com ([fe80::ecd3:6008:3784:4012%4]) with mapi id 15.20.3239.017; Wed, 29 Jul 2020 15:01:26 +0000 From: Raslan Darawsheh To: Slava Ovsiienko , "dev@dpdk.org" CC: Matan Azrad , Dekel Peled Thread-Topic: [PATCH] common/mlx5: fix user mode register access command Thread-Index: AQHWZaPjtOuwKVPZY0m2v1gFxRyscqkepiaQ Date: Wed, 29 Jul 2020 15:01:26 +0000 Message-ID: References: <1596025754-26376-1-git-send-email-viacheslavo@mellanox.com> In-Reply-To: <1596025754-26376-1-git-send-email-viacheslavo@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: mellanox.com; dkim=none (message not signed) header.d=none;mellanox.com; dmarc=none action=none header.from=mellanox.com; x-originating-ip: [84.242.49.134] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: 4b021f17-4f5b-4b5f-9f52-08d833d04427 x-ms-traffictypediagnostic: AM0PR05MB6083: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:989; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: tKj/fN6D1XyZnGU2EofQYHB291N4PSeqJiiUlAsQkEZFq7TMZ1uZUBmVmwmROpC1CTZTIG6BNVAB0TqkdRi4z3wPQZPtZywMIhDU+5MwQ2ZCFvbinzN6mg1bPS8v0l3IVu1HLYODxi70OTabmHpGemv1QxyLCCamEboCvTLsfkcgXY4MRWzm2QhCBqBhjFjYNnLdWl9nVfu8aJZjV1mQdU/Gk4R4mPTPIl4fTbaRF8ckZ5YaIBuyrcgdCDcXu1y5I+fuhd34SYzqszBnxH5VMR2ELRU5HZvGTFuYYrwotl1xsRp4uq5Etf3KTPaBcSAw x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM0PR05MB6707.eurprd05.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(346002)(376002)(39860400002)(396003)(366004)(136003)(55016002)(86362001)(478600001)(66446008)(5660300002)(316002)(107886003)(8936002)(9686003)(7696005)(26005)(4326008)(71200400001)(186003)(76116006)(66946007)(53546011)(83380400001)(33656002)(6506007)(8676002)(2906002)(110136005)(52536014)(64756008)(54906003)(66476007)(66556008); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata: 4w8N5c4o43fECOK8588mILtTUMVHGozs/g3ePIT1NX5C70C0j39os8dOsRBQiDDQM490daxkKLw+t9WfLfFNO6vbgr7I4tAEJ2HE3eRtH12s6ujqtNbx/KgoC701BqT89eIK6U3agXddy3R5xKkYn94MPYy7a0x3vob02onP1nYfkVj6hXBvQdZL/r+9ZyBcrS3r+CaPMTuP2d5OMxxIxXVnLxAIS1OMaXRfgVbZOqL3NFi5adwkBtRW2fkOroEuwo1t14TfdnMYCnSC0m+LJERq2WvePGBItj+TxLD6eTdRGF622maIBgLSp1jYBBgvIrzO93TLj8SqNzWAwUWMPmOsHdLtrV1nuMUl1OAAsoAGtXY5c2B1JjjAOsYbJ0Js+YlH2vcwyg4EopQ9ETEoLw6Xd0qYLHh+twcvqLpSABRo/UNiQSvTnCERWwbxYtB7G81+VKYYloExTR9KAFOXQI4T9KDgdYRK+zFcoPOIvxV367jOXbopU/cH2MTnOPsap//wqQnB96PD6dJJOmVmbgosfC3CY28KJGMPv7x1zaXreRRnYgK+ioe8qS/nM+vaKhnxcAla0j0tL3l8hc+y+IyURaYqanM+MRhME9L1je+vJA1bx1nVi21jfjRFdRCcH2etbAmrHByyzqXCRSLSXA== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM0PR05MB6707.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4b021f17-4f5b-4b5f-9f52-08d833d04427 X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Jul 2020 15:01:26.1491 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: L6EAOheBYW5vYtR2A2jnLlVo30VKD9kgvAXYitRa8AoOw3s0V/AM/75Luh+InEysD/gtFVsAAV6Au4nU94LktA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR05MB6083 Subject: Re: [dpdk-dev] [PATCH] common/mlx5: fix user mode register access command X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, > -----Original Message----- > From: Viacheslav Ovsiienko > Sent: Wednesday, July 29, 2020 3:29 PM > To: dev@dpdk.org > Cc: Matan Azrad ; Raslan Darawsheh > ; Dekel Peled > Subject: [PATCH] common/mlx5: fix user mode register access command >=20 > To detect the timestamp mode configured on the NIC the mlx5 > PMD uses the firmware command ACCESS_REGISTER_USER. This > command is relatively new and might be not supported by > older firmware versions and was rejected, causing annoying > messages in kernel log. >=20 > This patch adds the attribute flag check whether firmware > supports the command and avoid the call if it does not. >=20 > Fixes: bb7ef9a96281 ("common/mlx5: add register access DevX routine") >=20 > Signed-off-by: Viacheslav Ovsiienko > --- > drivers/common/mlx5/mlx5_devx_cmds.c | 2 ++ > drivers/common/mlx5/mlx5_devx_cmds.h | 1 + > drivers/common/mlx5/mlx5_prm.h | 3 ++- > drivers/net/mlx5/linux/mlx5_os.c | 7 ++++--- > 4 files changed, 9 insertions(+), 4 deletions(-) >=20 > diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c > b/drivers/common/mlx5/mlx5_devx_cmds.c > index d1c674c..7c81ae1 100644 > --- a/drivers/common/mlx5/mlx5_devx_cmds.c > +++ b/drivers/common/mlx5/mlx5_devx_cmds.c > @@ -688,6 +688,8 @@ struct mlx5_devx_obj * > relaxed_ordering_write); > attr->relaxed_ordering_read =3D MLX5_GET(cmd_hca_cap, hcattr, > relaxed_ordering_read); > + attr->access_register_user =3D MLX5_GET(cmd_hca_cap, hcattr, > + access_register_user); > attr->eth_net_offloads =3D MLX5_GET(cmd_hca_cap, hcattr, > eth_net_offloads); > attr->eth_virt =3D MLX5_GET(cmd_hca_cap, hcattr, eth_virt); > diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h > b/drivers/common/mlx5/mlx5_devx_cmds.h > index 528cb7b..1c84cea 100644 > --- a/drivers/common/mlx5/mlx5_devx_cmds.h > +++ b/drivers/common/mlx5/mlx5_devx_cmds.h > @@ -93,6 +93,7 @@ struct mlx5_hca_attr { > uint32_t vhca_id:16; > uint32_t relaxed_ordering_write:1; > uint32_t relaxed_ordering_read:1; > + uint32_t access_register_user:1; > uint32_t wqe_index_ignore:1; > uint32_t cross_channel:1; > uint32_t non_wire_sq:1; /* SQ with non-wire ops is supported. */ > diff --git a/drivers/common/mlx5/mlx5_prm.h > b/drivers/common/mlx5/mlx5_prm.h > index 62efa72..0fa42bb 100644 > --- a/drivers/common/mlx5/mlx5_prm.h > +++ b/drivers/common/mlx5/mlx5_prm.h > @@ -1104,7 +1104,8 @@ struct mlx5_ifc_cmd_hca_cap_bits { > u8 log_max_eq_sz[0x8]; > u8 relaxed_ordering_write[0x1]; > u8 relaxed_ordering_read[0x1]; > - u8 log_max_mkey[0x6]; > + u8 access_register_user[0x1]; > + u8 log_max_mkey[0x5]; > u8 reserved_at_f0[0x8]; > u8 dump_fill_mkey[0x1]; > u8 reserved_at_f9[0x3]; > diff --git a/drivers/net/mlx5/linux/mlx5_os.c > b/drivers/net/mlx5/linux/mlx5_os.c > index fa3b027..c0d5325 100644 > --- a/drivers/net/mlx5/linux/mlx5_os.c > +++ b/drivers/net/mlx5/linux/mlx5_os.c > @@ -1067,9 +1067,10 @@ > if (config->devx) { > uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)]; >=20 > - err =3D mlx5_devx_cmd_register_read > - (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, > - reg, MLX5_ST_SZ_DW(register_mtutc)); > + err =3D config->hca_attr.access_register_user ? > + mlx5_devx_cmd_register_read > + (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0, > + reg, MLX5_ST_SZ_DW(register_mtutc)) : > ENOTSUP; > if (!err) { > uint32_t ts_mode; >=20 > -- > 1.8.3.1 Patch applied to next-net-mlx, Kindest regards, Raslan Darawsheh