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DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR08MB4451; H:AM0PR08MB3986.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: rfaqNyppDrG7eMGCj1X9GnuCVifPsAPs0YSg9pfHdC2M25U8D6znwSgguxpzaTfAeVfENAqMluWKbXvvnZpwggPIOyQqZQthC51iEsCRUyflNkAWPH6LzhchSv5huCqxW7R+QmJ4O/ZoLGvqRuTjSpZR0P4JElehLcQvEZDs7BuIPQFScasXR/DgcKE8xzL1mNxcBsxHW2uA6Gj5Zm0L+E3VVsHZ65yRB+ESWdz+iRNaOWh7NbJJRrmkatDWJ7iC1ALGB6e/VyTyhr1sMsBp0MZhZ+3DQbsI7yIR97LiOzyHdZEjYt2fF4qPXKF68Dy40X0O6wqAXf+uo5HdsXky7SKLZkxxGXb83uteUT6UbqoE7yoW9rRa6T2AUKsNFwXwGMhVHdwUnP5s7IVQkvbIiqJliLpW3UAbWW8q7JhMu40= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: a91b71bb-02f2-4653-4a35-08d70369ae16 X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Jul 2019 06:01:11.9892 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Ruifeng.Wang@arm.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB4451 Subject: Re: [dpdk-dev] [PATCH v4 3/3] lib/lpm: use atomic store to avoid partial update X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Honnappa, > -----Original Message----- > From: Honnappa Nagarahalli > Sent: Monday, July 8, 2019 12:57 > To: Ruifeng Wang (Arm Technology China) ; > vladimir.medvedkin@intel.com; bruce.richardson@intel.com > Cc: dev@dpdk.org; Gavin Hu (Arm Technology China) ; > nd ; Ruifeng Wang (Arm Technology China) > ; Honnappa Nagarahalli > ; nd > Subject: RE: [PATCH v4 3/3] lib/lpm: use atomic store to avoid partial up= date >=20 > > > > Compiler could generate non-atomic stores for whole table entry updatin= g. > > This may cause incorrect nexthop to be returned, if the byte with > > valid flag is updated prior to the byte with next hot is updated. > ^^^^^^^ Should= be nexthop >=20 > > > > Changed to use atomic store to update whole table entry. > > > > Suggested-by: Medvedkin Vladimir > > Signed-off-by: Ruifeng Wang > > Reviewed-by: Gavin Hu > > --- > > v4: initial version > > > > lib/librte_lpm/rte_lpm.c | 34 ++++++++++++++++++++++++---------- > > 1 file changed, 24 insertions(+), 10 deletions(-) > > > > diff --git a/lib/librte_lpm/rte_lpm.c b/lib/librte_lpm/rte_lpm.c index > > baa6e7460..5d1dbd7e6 100644 > > --- a/lib/librte_lpm/rte_lpm.c > > +++ b/lib/librte_lpm/rte_lpm.c > > @@ -767,7 +767,9 @@ add_depth_small_v20(struct rte_lpm_v20 *lpm, > > uint32_t ip, uint8_t depth, > > * Setting tbl8 entry in one go to avoid > > * race conditions > > */ > > - lpm->tbl8[j] =3D new_tbl8_entry; > > + __atomic_store(&lpm->tbl8[j], > > + &new_tbl8_entry, > > + __ATOMIC_RELAXED); > > > > continue; > > } > > @@ -837,7 +839,9 @@ add_depth_small_v1604(struct rte_lpm *lpm, > > uint32_t ip, uint8_t depth, > > * Setting tbl8 entry in one go to avoid > > * race conditions > > */ > > - lpm->tbl8[j] =3D new_tbl8_entry; > > + __atomic_store(&lpm->tbl8[j], > > + &new_tbl8_entry, > > + __ATOMIC_RELAXED); > > > > continue; > > } > > @@ -965,7 +969,8 @@ add_depth_big_v20(struct rte_lpm_v20 *lpm, > > uint32_t ip_masked, uint8_t depth, > > * Setting tbl8 entry in one go to avoid race > > * condition > > */ > > - lpm->tbl8[i] =3D new_tbl8_entry; > > + __atomic_store(&lpm->tbl8[i], > > &new_tbl8_entry, > > + __ATOMIC_RELAXED); > > > > continue; > > } > > @@ -1100,7 +1105,8 @@ add_depth_big_v1604(struct rte_lpm *lpm, > > uint32_t ip_masked, uint8_t depth, > > * Setting tbl8 entry in one go to avoid race > > * condition > > */ > > - lpm->tbl8[i] =3D new_tbl8_entry; > > + __atomic_store(&lpm->tbl8[i], > > &new_tbl8_entry, > > + __ATOMIC_RELAXED); > > > > continue; > > } > > @@ -1393,7 +1399,9 @@ delete_depth_small_v20(struct rte_lpm_v20 > *lpm, > > uint32_t ip_masked, > > > > RTE_LPM_TBL8_GROUP_NUM_ENTRIES); j++) { > > > > if (lpm->tbl8[j].depth <=3D depth) > > - lpm->tbl8[j] =3D > > new_tbl8_entry; > > + __atomic_store(&lpm- > >tbl8[j], > > + &new_tbl8_entry, > > + __ATOMIC_RELAXED); > > } > > } > > } > > @@ -1490,7 +1498,9 @@ delete_depth_small_v1604(struct rte_lpm *lpm, > > uint32_t ip_masked, > > > > RTE_LPM_TBL8_GROUP_NUM_ENTRIES); j++) { > > > > if (lpm->tbl8[j].depth <=3D depth) > > - lpm->tbl8[j] =3D > > new_tbl8_entry; > > + __atomic_store(&lpm- > >tbl8[j], > > + &new_tbl8_entry, > > + __ATOMIC_RELAXED); > > } > > } > > } > > @@ -1646,7 +1656,8 @@ delete_depth_big_v20(struct rte_lpm_v20 *lpm, > > uint32_t ip_masked, > > */ > > for (i =3D tbl8_index; i < (tbl8_index + tbl8_range); i++) { > > if (lpm->tbl8[i].depth <=3D depth) > > - lpm->tbl8[i] =3D new_tbl8_entry; > > + __atomic_store(&lpm->tbl8[i], > > &new_tbl8_entry, > > + __ATOMIC_RELAXED); > > } > > } > > > > @@ -1677,7 +1688,8 @@ delete_depth_big_v20(struct rte_lpm_v20 *lpm, > > uint32_t ip_masked, > > /* Set tbl24 before freeing tbl8 to avoid race condition. > > * Prevent the free of the tbl8 group from hoisting. > > */ > > - lpm->tbl24[tbl24_index] =3D new_tbl24_entry; > > + __atomic_store(&lpm->tbl24[tbl24_index], > > &new_tbl24_entry, > > + __ATOMIC_RELAXED); > > __atomic_thread_fence(__ATOMIC_RELEASE); > > tbl8_free_v20(lpm->tbl8, tbl8_group_start); > tbl8_alloc_v20/tbl8_free_v20 need to be updated to use __atomic_store >=20 tbl8_alloc_v20/tbl8_free_v20 updates a single field of table entry. The pro= cess is already atomic. Do we really need to use __atomic_store? > > } > > @@ -1730,7 +1742,8 @@ delete_depth_big_v1604(struct rte_lpm *lpm, > > uint32_t ip_masked, > > */ > > for (i =3D tbl8_index; i < (tbl8_index + tbl8_range); i++) { > > if (lpm->tbl8[i].depth <=3D depth) > > - lpm->tbl8[i] =3D new_tbl8_entry; > > + __atomic_store(&lpm->tbl8[i], > > &new_tbl8_entry, > > + __ATOMIC_RELAXED); > > } > > } > > > > @@ -1761,7 +1774,8 @@ delete_depth_big_v1604(struct rte_lpm *lpm, > > uint32_t ip_masked, > > /* Set tbl24 before freeing tbl8 to avoid race condition. > > * Prevent the free of the tbl8 group from hoisting. > > */ > > - lpm->tbl24[tbl24_index] =3D new_tbl24_entry; > > + __atomic_store(&lpm->tbl24[tbl24_index], > > &new_tbl24_entry, > > + __ATOMIC_RELAXED); > > __atomic_thread_fence(__ATOMIC_RELEASE); > > tbl8_free_v1604(lpm->tbl8, tbl8_group_start); > tbl8_alloc_v1604 /tbl8_free_v1604 need to be updated to use > __atomic_store Ditto. >=20 > > } > > -- > > 2.17.1