* Re: [dpdk-dev] [RFC PATCH] RFC build: prototype support for ARM builds
2017-12-19 10:53 [dpdk-dev] [RFC PATCH] RFC build: prototype support for ARM builds Bruce Richardson
@ 2017-12-19 13:27 ` Luca Boccassi
2017-12-19 14:17 ` Bruce Richardson
2018-01-19 13:05 ` [dpdk-dev] [PATCH v2 1/2] build: add " Pavan Nikhilesh
` (4 subsequent siblings)
5 siblings, 1 reply; 30+ messages in thread
From: Luca Boccassi @ 2017-12-19 13:27 UTC (permalink / raw)
To: Bruce Richardson, dev; +Cc: jerin.jacob, hemant.agrawal
On Tue, 2017-12-19 at 10:53 +0000, Bruce Richardson wrote:
> Add some skeleton files to enable compiling for ARM target. This has
> been
> tested by doing a cross-compile for armv8-a type using the linaro gcc
> toolchain.
>
> meson arm-build --cross-file aarch64_cross.txt
> ninja -C arm-build
>
> where aarch64_cross.txt contained the following
>
> [binaries]
> c = 'aarch64-linux-gnu-gcc'
> cpp = 'aarch64-linux-gnu-cpp'
> ar = 'aarch64-linux-gnu-ar'
>
> [host_machine]
> system = 'linux'
> cpu_family = 'aarch64'
> cpu = 'armv8-a'
> endian = 'little'
>
> It is hoped that those working on arm architecture can use this as a
> baseline
> to add arm support - both native compiled and cross-compiled - to the
> meson
> build.
Can't comment on ARM functionality, but shouldn't the new files use
SPDX ids rather than the full license header?
--
Kind regards,
Luca Boccassi
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [RFC PATCH] RFC build: prototype support for ARM builds
2017-12-19 13:27 ` Luca Boccassi
@ 2017-12-19 14:17 ` Bruce Richardson
0 siblings, 0 replies; 30+ messages in thread
From: Bruce Richardson @ 2017-12-19 14:17 UTC (permalink / raw)
To: Luca Boccassi; +Cc: dev, jerin.jacob, hemant.agrawal
On Tue, Dec 19, 2017 at 01:27:07PM +0000, Luca Boccassi wrote:
> On Tue, 2017-12-19 at 10:53 +0000, Bruce Richardson wrote:
> > Add some skeleton files to enable compiling for ARM target. This has
> > been
> > tested by doing a cross-compile for armv8-a type using the linaro gcc
> > toolchain.
> >
> > meson arm-build --cross-file aarch64_cross.txt
> > ninja -C arm-build
> >
> > where aarch64_cross.txt contained the following
> >
> > [binaries]
> > c = 'aarch64-linux-gnu-gcc'
> > cpp = 'aarch64-linux-gnu-cpp'
> > ar = 'aarch64-linux-gnu-ar'
> >
> > [host_machine]
> > system = 'linux'
> > cpu_family = 'aarch64'
> > cpu = 'armv8-a'
> > endian = 'little'
> >
> > It is hoped that those working on arm architecture can use this as a
> > baseline
> > to add arm support - both native compiled and cross-compiled - to the
> > meson
> > build.
>
> Can't comment on ARM functionality, but shouldn't the new files use
> SPDX ids rather than the full license header?
>
Yes, they should. However, this is just a prototype patch used to verify
the cross-compile functionality of the build system and is not directly
intended for merge. A proper implementation should, I think, come from
those more familiar with arm architecture than I am. [Hence the CC of
Jerin and Hemant on the patch]. Because of that I didn't go back to edit
the license tag of the patch i.e. I was a bit lazy. :-)
/Bruce
^ permalink raw reply [flat|nested] 30+ messages in thread
* [dpdk-dev] [PATCH v2 1/2] build: add support for ARM builds
2017-12-19 10:53 [dpdk-dev] [RFC PATCH] RFC build: prototype support for ARM builds Bruce Richardson
2017-12-19 13:27 ` Luca Boccassi
@ 2018-01-19 13:05 ` Pavan Nikhilesh
2018-01-19 13:05 ` [dpdk-dev] [PATCH v2 2/2] build: add support for detecting march on ARM Pavan Nikhilesh
2018-01-19 13:52 ` [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds Pavan Nikhilesh
` (3 subsequent siblings)
5 siblings, 1 reply; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-19 13:05 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren; +Cc: dev, Pavan Nikhilesh
From: Bruce Richardson <bruce.richardson@intel.com>
Add files to enable compiling for ARM cross builds.
This can be tested by doing a cross-compile for armv8-a type using
the linaro gcc toolchain.
meson arm-build --cross-file aarch64_cross.txt
ninja -C arm-build
where aarch64_cross.txt contained the following
[binaries]
c = 'aarch64-linux-gnu-gcc'
cpp = 'aarch64-linux-gnu-cpp'
ar = 'aarch64-linux-gnu-ar'
[host_machine]
system = 'linux'
cpu_family = 'aarch64'
cpu = 'armv8-a'
endian = 'little'
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
v2 Changes:
- Merged RFC patch.
- Added framework to easily other vendor specific flags
- renamed machine_arg to machine_args
config/arm/meson.build | 63 ++++++++++++++++++++++
config/meson.build | 4 +-
lib/librte_eal/common/arch/arm/meson.build | 33 ++++++++++++
lib/librte_eal/common/include/arch/arm/meson.build | 57 ++++++++++++++++++++
4 files changed, 156 insertions(+), 1 deletion(-)
create mode 100644 config/arm/meson.build
create mode 100644 lib/librte_eal/common/arch/arm/meson.build
create mode 100644 lib/librte_eal/common/include/arch/arm/meson.build
diff --git a/config/arm/meson.build b/config/arm/meson.build
new file mode 100644
index 000000000..0c2e57657
--- /dev/null
+++ b/config/arm/meson.build
@@ -0,0 +1,63 @@
+# BSD LICENSE
+#
+# Copyright(c) 2017 Intel Corporation.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# * Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# * Neither the name of Intel Corporation nor the names of its
+# contributors may be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# for checking defines we need to use the correct compiler flags
+march_opt = '-march=@0@'.format(machine)
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+if cc.sizeof('void *') == 8
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
+ dpdk_conf.set('RTE_ARCH_ARM', 1)
+ dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+endif
+
+if cc.get_define('__ARM_NEON', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
+ 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
+endif
diff --git a/config/meson.build b/config/meson.build
index 95223042f..fa55c53a5 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -56,8 +56,10 @@ endforeach
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
- subdir(arch_subdir)
+elif host_machine.cpu_family().startswith('arm') or host_machine.cpu_family().startswith('aarch')
+ arch_subdir = 'arm'
endif
+subdir(arch_subdir)
dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
diff --git a/lib/librte_eal/common/arch/arm/meson.build b/lib/librte_eal/common/arch/arm/meson.build
new file mode 100644
index 000000000..57158271d
--- /dev/null
+++ b/lib/librte_eal/common/arch/arm/meson.build
@@ -0,0 +1,33 @@
+# BSD LICENSE
+#
+# Copyright(c) 2017 Intel Corporation.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# * Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# * Neither the name of Intel Corporation nor the names of its
+# contributors may be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+eal_common_arch_sources = files('rte_cpuflags.c',
+ 'rte_cycles.c')
diff --git a/lib/librte_eal/common/include/arch/arm/meson.build b/lib/librte_eal/common/include/arch/arm/meson.build
new file mode 100644
index 000000000..c5d399bf1
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/meson.build
@@ -0,0 +1,57 @@
+# BSD LICENSE
+#
+# Copyright(c) 2017 Intel Corporation.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# * Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# * Neither the name of Intel Corporation nor the names of its
+# contributors may be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+install_headers(
+ 'rte_atomic_32.h',
+ 'rte_atomic_64.h',
+ 'rte_atomic.h',
+ 'rte_byteorder.h',
+ 'rte_cpuflags_32.h',
+ 'rte_cpuflags_64.h',
+ 'rte_cpuflags.h',
+ 'rte_cycles_32.h',
+ 'rte_cycles_64.h',
+ 'rte_cycles.h',
+ 'rte_io_64.h',
+ 'rte_io.h',
+ 'rte_memcpy_32.h',
+ 'rte_memcpy_64.h',
+ 'rte_memcpy.h',
+ 'rte_pause_32.h',
+ 'rte_pause_64.h',
+ 'rte_pause.h',
+ 'rte_prefetch_32.h',
+ 'rte_prefetch_64.h',
+ 'rte_prefetch.h',
+ 'rte_rwlock.h',
+ 'rte_spinlock.h',
+ 'rte_vect.h',
+ subdir: get_option('include_subdir_arch'))
--
2.14.1
^ permalink raw reply [flat|nested] 30+ messages in thread* [dpdk-dev] [PATCH v2 2/2] build: add support for detecting march on ARM
2018-01-19 13:05 ` [dpdk-dev] [PATCH v2 1/2] build: add " Pavan Nikhilesh
@ 2018-01-19 13:05 ` Pavan Nikhilesh
0 siblings, 0 replies; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-19 13:05 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren; +Cc: dev, Pavan Nikhilesh
Added support for detecting march and mcpu by reading midr_el1 register.
The implementer, primary part number values read can be used to figure
out the underlying arm cpu.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
app/test-pmd/meson.build | 2 +-
config/arm/armv8_machine.py | 18 ++++++++
config/arm/meson.build | 109 +++++++++++++++++++++++++++++---------------
config/meson.build | 19 ++++----
drivers/meson.build | 2 +-
examples/meson.build | 2 +-
lib/meson.build | 2 +-
meson.build | 2 +-
test/test/meson.build | 2 +-
9 files changed, 105 insertions(+), 53 deletions(-)
create mode 100755 config/arm/armv8_machine.py
diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
index e819677a5..2a3f0ba1f 100644
--- a/app/test-pmd/meson.build
+++ b/app/test-pmd/meson.build
@@ -45,7 +45,7 @@ endif
executable('dpdk-testpmd',
sources,
- c_args: machine_arg,
+ c_args: machine_args,
link_whole: link_libs,
dependencies: dep_objs,
install_rpath: join_paths(get_option('prefix'), driver_install_path),
diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
new file mode 100755
index 000000000..3c6e7b6a7
--- /dev/null
+++ b/config/arm/armv8_machine.py
@@ -0,0 +1,18 @@
+#!/usr/bin/python
+import pprint
+pp = pprint
+
+ident = []
+fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
+with open(fname) as f:
+ content = f.read()
+
+midr_el1 = (int(content.rstrip('\n'), 16))
+
+ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
+ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
+ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
+ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
+ident.append(hex(midr_el1 & 0xF)) # Revision
+
+print(' '.join(ident))
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 0c2e57657..62af5e68a 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -1,59 +1,92 @@
-# BSD LICENSE
-#
-# Copyright(c) 2017 Intel Corporation.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in
-# the documentation and/or other materials provided with the
-# distribution.
-# * Neither the name of Intel Corporation nor the names of its
-# contributors may be used to endorse or promote products derived
-# from this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+# Copyright(c) 2017 Cavium, Inc
# for checking defines we need to use the correct compiler flags
march_opt = '-march=@0@'.format(machine)
+machine_args_cavium = [
+ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
+ ['0xa1', ['-mcpu=thunderxt88']],
+ ['0xa2', ['-mcpu=thunderxt81']],
+ ['0xa3', ['-mcpu=thunderxt83']]]
+
+flags_cavium = [
+ ['RTE_MACHINE', '"thunderx"'],
+ ['RTE_CACHE_LINE_SIZE', 128],
+ ['RTE_MAX_NUMA_NODES', 2],
+ ['RTE_MAX_LCORE', 96],
+ ['RTE_MAX_VFIO_GROUPS', 128],
+ ['RTE_RING_USE_C11_MEM_MODEL', false]]
+
+impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
+
+dpdk_conf.set('RTE_TOOLCHAIN', '"gcc"')
+dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
-if cc.sizeof('void *') == 8
- dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
- dpdk_conf.set('RTE_ARCH_ARM64', 1)
- dpdk_conf.set('RTE_ARCH_64', 1)
-else
+
+if cc.sizeof('void *') != 8
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
dpdk_conf.set('RTE_ARCH_ARM', 1)
dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+
+ if not meson.is_cross_build()
+ # The script returns ['Implementor', 'Variant', 'Architecture',
+ # 'Primary Part number', 'Revision']
+ detect_vendor = find_program(join_paths(
+ meson.current_source_dir(), 'armv8_machine.py'))
+ cmd = run_command(detect_vendor.path())
+ if cmd.returncode() != 0
+ message('Using default armv8 config')
+ else
+ machine_args = [] # Clear previous machine args
+ cmd_output = cmd.stdout().strip().split(' ')
+ machine = get_variable('impl_' + cmd_output[0])
+ message('Implementor : ' + machine[0])
+
+ foreach flag: machine[1]
+ dpdk_conf.set(flag[0], flag[1])
+ endforeach
+
+ # Primary part number based mcpu flags are supported
+ # for gcc versions > 7
+ if cc.version().version_compare('<7.0')
+ foreach marg: machine[2]
+ if marg[0] == 'default'
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ else
+ foreach marg: machine[2]
+ if marg[0] == cmd_output[3]
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ endif
+ endif
+ endif
endif
+message(machine_args)
-if cc.get_define('__ARM_NEON', args: march_opt) != ''
+if cc.get_define('__ARM_NEON', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
endif
-if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
endif
-if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
diff --git a/config/meson.build b/config/meson.build
index fa55c53a5..f8c67578d 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -8,7 +8,8 @@ else
machine = get_option('machine')
endif
dpdk_conf.set('RTE_MACHINE', machine)
-machine_arg = '-march=' + machine
+machine_args = []
+machine_args += '-march=' + machine
# use pthreads
add_project_link_arguments('-pthread', language: 'c')
@@ -53,6 +54,14 @@ foreach arg: warning_flags
endif
endforeach
+# set other values pulled from the build options
+dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
+dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
+dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
+dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
+# values which have defaults which may be overridden
+dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
+
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
@@ -65,12 +74,4 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
-# set other values pulled from the build options
-dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
-dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
-dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
-dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
-# values which have defaults which may be overridden
-dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
-
install_headers('rte_config.h', subdir: get_option('include_subdir_arch'))
diff --git a/drivers/meson.build b/drivers/meson.build
index 9b5039847..1d6430bfe 100644
--- a/drivers/meson.build
+++ b/drivers/meson.build
@@ -22,7 +22,7 @@ foreach class:driver_classes
version = 1
sources = []
objs = []
- cflags = [machine_arg]
+ cflags = machine_args
includes = [include_directories(drv_path)]
# set up internal deps. Drivers can append/override as necessary
deps = std_deps
diff --git a/examples/meson.build b/examples/meson.build
index 0abed7169..b3f997242 100644
--- a/examples/meson.build
+++ b/examples/meson.build
@@ -9,7 +9,7 @@ endif
foreach example: get_option('examples').split(',')
name = example
sources = []
- cflags = [machine_arg]
+ cflags = machine_args
ext_deps = []
includes = [include_directories(example)]
deps = ['eal', 'mempool', 'net', 'mbuf', 'ethdev', 'cmdline']
diff --git a/lib/meson.build b/lib/meson.build
index 0c94d74b9..b9ea6f61b 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -31,7 +31,7 @@ foreach l:libraries
sources = []
headers = []
includes = []
- cflags = [machine_arg]
+ cflags = machine_args
objs = [] # other object files to link against, used e.g. for
# instruction-set optimized versions of code
diff --git a/meson.build b/meson.build
index 3dce8579e..326fbc7d1 100644
--- a/meson.build
+++ b/meson.build
@@ -66,5 +66,5 @@ pkg.generate(name: meson.project_name(),
['-Wl,-Bdynamic'] + dpdk_extra_ldflags,
description: 'The Data Plane Development Kit (DPDK)',
subdirs: [get_option('include_subdir_arch'), '.'],
- extra_cflags: ['-include "rte_config.h"', machine_arg]
+ extra_cflags: ['-include "rte_config.h"'] + machine_args
)
diff --git a/test/test/meson.build b/test/test/meson.build
index 1863c603c..873efbc07 100644
--- a/test/test/meson.build
+++ b/test/test/meson.build
@@ -204,7 +204,7 @@ if get_option('tests')
test_sources,
link_whole: link_libs,
dependencies: test_dep_objs,
- c_args: machine_arg,
+ c_args: machine_args,
install_rpath: driver_install_path,
install: false)
--
2.14.1
^ permalink raw reply [flat|nested] 30+ messages in thread
* [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds
2017-12-19 10:53 [dpdk-dev] [RFC PATCH] RFC build: prototype support for ARM builds Bruce Richardson
2017-12-19 13:27 ` Luca Boccassi
2018-01-19 13:05 ` [dpdk-dev] [PATCH v2 1/2] build: add " Pavan Nikhilesh
@ 2018-01-19 13:52 ` Pavan Nikhilesh
2018-01-19 13:52 ` [dpdk-dev] [PATCH v3 2/2] build: add support for detecting march on ARM Pavan Nikhilesh
2018-01-19 16:24 ` [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds Bruce Richardson
2018-01-19 18:23 ` [dpdk-dev] [PATCH v4 " Pavan Nikhilesh
` (2 subsequent siblings)
5 siblings, 2 replies; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-19 13:52 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan
Cc: dev, Pavan Nikhilesh
From: Bruce Richardson <bruce.richardson@intel.com>
Add files to enable compiling for ARM cross builds.
This can be tested by doing a cross-compile for armv8-a type using
the linaro gcc toolchain.
meson arm-build --cross-file aarch64_cross.txt
ninja -C arm-build
where aarch64_cross.txt contained the following
[binaries]
c = 'aarch64-linux-gnu-gcc'
cpp = 'aarch64-linux-gnu-cpp'
ar = 'aarch64-linux-gnu-ar'
[host_machine]
system = 'linux'
cpu_family = 'aarch64'
cpu = 'armv8-a'
endian = 'little'
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
v3 Changes:
- Fix missing SPDX license tags
v2 Changes:
- Merged RFC patch.
- Added framework to easily other vendor specific flags
- renamed machine_arg to machine_args
config/arm/meson.build | 36 ++++++++++++++++++++++
config/meson.build | 4 ++-
lib/librte_eal/common/arch/arm/meson.build | 5 +++
lib/librte_eal/common/include/arch/arm/meson.build | 29 +++++++++++++++++
4 files changed, 73 insertions(+), 1 deletion(-)
create mode 100644 config/arm/meson.build
create mode 100644 lib/librte_eal/common/arch/arm/meson.build
create mode 100644 lib/librte_eal/common/include/arch/arm/meson.build
diff --git a/config/arm/meson.build b/config/arm/meson.build
new file mode 100644
index 000000000..f05de4c2c
--- /dev/null
+++ b/config/arm/meson.build
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+# Copyright(c) 2017 Cavium, Inc
+
+# for checking defines we need to use the correct compiler flags
+march_opt = '-march=@0@'.format(machine)
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+if cc.sizeof('void *') == 8
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
+ dpdk_conf.set('RTE_ARCH_ARM', 1)
+ dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+endif
+
+if cc.get_define('__ARM_NEON', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
+ 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
+endif
diff --git a/config/meson.build b/config/meson.build
index 95223042f..fa55c53a5 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -56,8 +56,10 @@ endforeach
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
- subdir(arch_subdir)
+elif host_machine.cpu_family().startswith('arm') or host_machine.cpu_family().startswith('aarch')
+ arch_subdir = 'arm'
endif
+subdir(arch_subdir)
dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
diff --git a/lib/librte_eal/common/arch/arm/meson.build b/lib/librte_eal/common/arch/arm/meson.build
new file mode 100644
index 000000000..c6bd92272
--- /dev/null
+++ b/lib/librte_eal/common/arch/arm/meson.build
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+eal_common_arch_sources = files('rte_cpuflags.c',
+ 'rte_cycles.c')
diff --git a/lib/librte_eal/common/include/arch/arm/meson.build b/lib/librte_eal/common/include/arch/arm/meson.build
new file mode 100644
index 000000000..77893fa35
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/meson.build
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+install_headers(
+ 'rte_atomic_32.h',
+ 'rte_atomic_64.h',
+ 'rte_atomic.h',
+ 'rte_byteorder.h',
+ 'rte_cpuflags_32.h',
+ 'rte_cpuflags_64.h',
+ 'rte_cpuflags.h',
+ 'rte_cycles_32.h',
+ 'rte_cycles_64.h',
+ 'rte_cycles.h',
+ 'rte_io_64.h',
+ 'rte_io.h',
+ 'rte_memcpy_32.h',
+ 'rte_memcpy_64.h',
+ 'rte_memcpy.h',
+ 'rte_pause_32.h',
+ 'rte_pause_64.h',
+ 'rte_pause.h',
+ 'rte_prefetch_32.h',
+ 'rte_prefetch_64.h',
+ 'rte_prefetch.h',
+ 'rte_rwlock.h',
+ 'rte_spinlock.h',
+ 'rte_vect.h',
+ subdir: get_option('include_subdir_arch'))
--
2.15.1
^ permalink raw reply [flat|nested] 30+ messages in thread* [dpdk-dev] [PATCH v3 2/2] build: add support for detecting march on ARM
2018-01-19 13:52 ` [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds Pavan Nikhilesh
@ 2018-01-19 13:52 ` Pavan Nikhilesh
2018-01-19 16:17 ` Bruce Richardson
2018-01-19 16:24 ` [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds Bruce Richardson
1 sibling, 1 reply; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-19 13:52 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan
Cc: dev, Pavan Nikhilesh
Added support for detecting march and mcpu by reading midr_el1 register.
The implementer, primary part number values read can be used to figure
out the underlying arm cpu.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
app/test-pmd/meson.build | 2 +-
config/arm/armv8_machine.py | 18 +++++++++++
config/arm/meson.build | 76 ++++++++++++++++++++++++++++++++++++++++-----
config/meson.build | 19 ++++++------
drivers/meson.build | 2 +-
examples/meson.build | 2 +-
lib/meson.build | 2 +-
meson.build | 2 +-
test/test/meson.build | 2 +-
9 files changed, 102 insertions(+), 23 deletions(-)
create mode 100755 config/arm/armv8_machine.py
diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
index e819677a5..2a3f0ba1f 100644
--- a/app/test-pmd/meson.build
+++ b/app/test-pmd/meson.build
@@ -45,7 +45,7 @@ endif
executable('dpdk-testpmd',
sources,
- c_args: machine_arg,
+ c_args: machine_args,
link_whole: link_libs,
dependencies: dep_objs,
install_rpath: join_paths(get_option('prefix'), driver_install_path),
diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
new file mode 100755
index 000000000..404866d2f
--- /dev/null
+++ b/config/arm/armv8_machine.py
@@ -0,0 +1,18 @@
+#!/usr/bin/python
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Cavium, Inc
+
+ident = []
+fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
+with open(fname) as f:
+ content = f.read()
+
+midr_el1 = (int(content.rstrip('\n'), 16))
+
+ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
+ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
+ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
+ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
+ident.append(hex(midr_el1 & 0xF)) # Revision
+
+print(' '.join(ident))
diff --git a/config/arm/meson.build b/config/arm/meson.build
index f05de4c2c..62af5e68a 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -5,28 +5,88 @@
# for checking defines we need to use the correct compiler flags
march_opt = '-march=@0@'.format(machine)
+machine_args_cavium = [
+ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
+ ['0xa1', ['-mcpu=thunderxt88']],
+ ['0xa2', ['-mcpu=thunderxt81']],
+ ['0xa3', ['-mcpu=thunderxt83']]]
+
+flags_cavium = [
+ ['RTE_MACHINE', '"thunderx"'],
+ ['RTE_CACHE_LINE_SIZE', 128],
+ ['RTE_MAX_NUMA_NODES', 2],
+ ['RTE_MAX_LCORE', 96],
+ ['RTE_MAX_VFIO_GROUPS', 128],
+ ['RTE_RING_USE_C11_MEM_MODEL', false]]
+
+impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
+
+dpdk_conf.set('RTE_TOOLCHAIN', '"gcc"')
+dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
-if cc.sizeof('void *') == 8
- dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
- dpdk_conf.set('RTE_ARCH_ARM64', 1)
- dpdk_conf.set('RTE_ARCH_64', 1)
-else
+
+if cc.sizeof('void *') != 8
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
dpdk_conf.set('RTE_ARCH_ARM', 1)
dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+
+ if not meson.is_cross_build()
+ # The script returns ['Implementor', 'Variant', 'Architecture',
+ # 'Primary Part number', 'Revision']
+ detect_vendor = find_program(join_paths(
+ meson.current_source_dir(), 'armv8_machine.py'))
+ cmd = run_command(detect_vendor.path())
+ if cmd.returncode() != 0
+ message('Using default armv8 config')
+ else
+ machine_args = [] # Clear previous machine args
+ cmd_output = cmd.stdout().strip().split(' ')
+ machine = get_variable('impl_' + cmd_output[0])
+ message('Implementor : ' + machine[0])
+
+ foreach flag: machine[1]
+ dpdk_conf.set(flag[0], flag[1])
+ endforeach
+
+ # Primary part number based mcpu flags are supported
+ # for gcc versions > 7
+ if cc.version().version_compare('<7.0')
+ foreach marg: machine[2]
+ if marg[0] == 'default'
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ else
+ foreach marg: machine[2]
+ if marg[0] == cmd_output[3]
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ endif
+ endif
+ endif
endif
+message(machine_args)
-if cc.get_define('__ARM_NEON', args: march_opt) != ''
+if cc.get_define('__ARM_NEON', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
endif
-if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
endif
-if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
diff --git a/config/meson.build b/config/meson.build
index fa55c53a5..f8c67578d 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -8,7 +8,8 @@ else
machine = get_option('machine')
endif
dpdk_conf.set('RTE_MACHINE', machine)
-machine_arg = '-march=' + machine
+machine_args = []
+machine_args += '-march=' + machine
# use pthreads
add_project_link_arguments('-pthread', language: 'c')
@@ -53,6 +54,14 @@ foreach arg: warning_flags
endif
endforeach
+# set other values pulled from the build options
+dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
+dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
+dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
+dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
+# values which have defaults which may be overridden
+dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
+
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
@@ -65,12 +74,4 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
-# set other values pulled from the build options
-dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
-dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
-dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
-dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
-# values which have defaults which may be overridden
-dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
-
install_headers('rte_config.h', subdir: get_option('include_subdir_arch'))
diff --git a/drivers/meson.build b/drivers/meson.build
index 9b5039847..1d6430bfe 100644
--- a/drivers/meson.build
+++ b/drivers/meson.build
@@ -22,7 +22,7 @@ foreach class:driver_classes
version = 1
sources = []
objs = []
- cflags = [machine_arg]
+ cflags = machine_args
includes = [include_directories(drv_path)]
# set up internal deps. Drivers can append/override as necessary
deps = std_deps
diff --git a/examples/meson.build b/examples/meson.build
index 0abed7169..b3f997242 100644
--- a/examples/meson.build
+++ b/examples/meson.build
@@ -9,7 +9,7 @@ endif
foreach example: get_option('examples').split(',')
name = example
sources = []
- cflags = [machine_arg]
+ cflags = machine_args
ext_deps = []
includes = [include_directories(example)]
deps = ['eal', 'mempool', 'net', 'mbuf', 'ethdev', 'cmdline']
diff --git a/lib/meson.build b/lib/meson.build
index 0c94d74b9..b9ea6f61b 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -31,7 +31,7 @@ foreach l:libraries
sources = []
headers = []
includes = []
- cflags = [machine_arg]
+ cflags = machine_args
objs = [] # other object files to link against, used e.g. for
# instruction-set optimized versions of code
diff --git a/meson.build b/meson.build
index 3dce8579e..326fbc7d1 100644
--- a/meson.build
+++ b/meson.build
@@ -66,5 +66,5 @@ pkg.generate(name: meson.project_name(),
['-Wl,-Bdynamic'] + dpdk_extra_ldflags,
description: 'The Data Plane Development Kit (DPDK)',
subdirs: [get_option('include_subdir_arch'), '.'],
- extra_cflags: ['-include "rte_config.h"', machine_arg]
+ extra_cflags: ['-include "rte_config.h"'] + machine_args
)
diff --git a/test/test/meson.build b/test/test/meson.build
index 1863c603c..873efbc07 100644
--- a/test/test/meson.build
+++ b/test/test/meson.build
@@ -204,7 +204,7 @@ if get_option('tests')
test_sources,
link_whole: link_libs,
dependencies: test_dep_objs,
- c_args: machine_arg,
+ c_args: machine_args,
install_rpath: driver_install_path,
install: false)
--
2.15.1
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v3 2/2] build: add support for detecting march on ARM
2018-01-19 13:52 ` [dpdk-dev] [PATCH v3 2/2] build: add support for detecting march on ARM Pavan Nikhilesh
@ 2018-01-19 16:17 ` Bruce Richardson
2018-01-19 17:13 ` Pavan Nikhilesh
0 siblings, 1 reply; 30+ messages in thread
From: Bruce Richardson @ 2018-01-19 16:17 UTC (permalink / raw)
To: Pavan Nikhilesh; +Cc: jerin.jacob, harry.van.haaren, herbert.guan, dev
On Fri, Jan 19, 2018 at 07:22:51PM +0530, Pavan Nikhilesh wrote:
> Added support for detecting march and mcpu by reading midr_el1 register.
> The implementer, primary part number values read can be used to figure
> out the underlying arm cpu.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> ---
> app/test-pmd/meson.build | 2 +-
> config/arm/armv8_machine.py | 18 +++++++++++
> config/arm/meson.build | 76 ++++++++++++++++++++++++++++++++++++++++-----
> config/meson.build | 19 ++++++------
> drivers/meson.build | 2 +-
> examples/meson.build | 2 +-
> lib/meson.build | 2 +-
> meson.build | 2 +-
> test/test/meson.build | 2 +-
> 9 files changed, 102 insertions(+), 23 deletions(-)
> create mode 100755 config/arm/armv8_machine.py
>
> diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
> index e819677a5..2a3f0ba1f 100644
> --- a/app/test-pmd/meson.build
> +++ b/app/test-pmd/meson.build
> @@ -45,7 +45,7 @@ endif
>
> executable('dpdk-testpmd',
> sources,
> - c_args: machine_arg,
> + c_args: machine_args,
> link_whole: link_libs,
> dependencies: dep_objs,
> install_rpath: join_paths(get_option('prefix'), driver_install_path),
> diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
> new file mode 100755
> index 000000000..404866d2f
> --- /dev/null
> +++ b/config/arm/armv8_machine.py
> @@ -0,0 +1,18 @@
> +#!/usr/bin/python
> +# SPDX-License-Identifier: BSD-3-Clause
> +# Copyright(c) 2017 Cavium, Inc
> +
> +ident = []
> +fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
> +with open(fname) as f:
> + content = f.read()
> +
> +midr_el1 = (int(content.rstrip('\n'), 16))
> +
> +ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
> +ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
> +ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
> +ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
> +ident.append(hex(midr_el1 & 0xF)) # Revision
> +
> +print(' '.join(ident))
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index f05de4c2c..62af5e68a 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -5,28 +5,88 @@
> # for checking defines we need to use the correct compiler flags
> march_opt = '-march=@0@'.format(machine)
>
> +machine_args_cavium = [
> + ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
> + ['0xa1', ['-mcpu=thunderxt88']],
> + ['0xa2', ['-mcpu=thunderxt81']],
> + ['0xa3', ['-mcpu=thunderxt83']]]
> +
> +flags_cavium = [
> + ['RTE_MACHINE', '"thunderx"'],
> + ['RTE_CACHE_LINE_SIZE', 128],
> + ['RTE_MAX_NUMA_NODES', 2],
> + ['RTE_MAX_LCORE', 96],
> + ['RTE_MAX_VFIO_GROUPS', 128],
> + ['RTE_RING_USE_C11_MEM_MODEL', false]]
> +
> +impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
> +
> +dpdk_conf.set('RTE_TOOLCHAIN', '"gcc"')
dpdk_conf.set_quoted() is probably what you want here.
> +dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
<snip>
> dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
> diff --git a/config/meson.build b/config/meson.build
> index fa55c53a5..f8c67578d 100644
> --- a/config/meson.build
> +++ b/config/meson.build
> @@ -8,7 +8,8 @@ else
> machine = get_option('machine')
> endif
> dpdk_conf.set('RTE_MACHINE', machine)
> -machine_arg = '-march=' + machine
> +machine_args = []
> +machine_args += '-march=' + machine
>
> # use pthreads
> add_project_link_arguments('-pthread', language: 'c')
> @@ -53,6 +54,14 @@ foreach arg: warning_flags
> endif
> endforeach
>
> +# set other values pulled from the build options
> +dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
> +dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
> +dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
> +dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
> +# values which have defaults which may be overridden
> +dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
> +
> compile_time_cpuflags = []
> if host_machine.cpu_family().startswith('x86')
> arch_subdir = 'x86'
> @@ -65,12 +74,4 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
> # set the install path for the drivers
> dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
>
> -# set other values pulled from the build options
> -dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
> -dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
> -dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
> -dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
> -# values which have defaults which may be overridden
> -dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
> -
Is there a reason why these lines have been moved?
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v3 2/2] build: add support for detecting march on ARM
2018-01-19 16:17 ` Bruce Richardson
@ 2018-01-19 17:13 ` Pavan Nikhilesh
2018-01-19 17:30 ` Bruce Richardson
0 siblings, 1 reply; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-19 17:13 UTC (permalink / raw)
To: Bruce Richardson, jerin.jacob, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev
On Fri, Jan 19, 2018 at 04:17:41PM +0000, Bruce Richardson wrote:
> On Fri, Jan 19, 2018 at 07:22:51PM +0530, Pavan Nikhilesh wrote:
> > Added support for detecting march and mcpu by reading midr_el1 register.
> > The implementer, primary part number values read can be used to figure
> > out the underlying arm cpu.
> >
> > Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > ---
> > app/test-pmd/meson.build | 2 +-
> > config/arm/armv8_machine.py | 18 +++++++++++
> > config/arm/meson.build | 76 ++++++++++++++++++++++++++++++++++++++++-----
> > config/meson.build | 19 ++++++------
> > drivers/meson.build | 2 +-
> > examples/meson.build | 2 +-
> > lib/meson.build | 2 +-
> > meson.build | 2 +-
> > test/test/meson.build | 2 +-
> > 9 files changed, 102 insertions(+), 23 deletions(-)
> > create mode 100755 config/arm/armv8_machine.py
> >
> > diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
> > index e819677a5..2a3f0ba1f 100644
> > --- a/app/test-pmd/meson.build
> > +++ b/app/test-pmd/meson.build
> > @@ -45,7 +45,7 @@ endif
> >
> > executable('dpdk-testpmd',
> > sources,
> > - c_args: machine_arg,
> > + c_args: machine_args,
> > link_whole: link_libs,
> > dependencies: dep_objs,
> > install_rpath: join_paths(get_option('prefix'), driver_install_path),
> > diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
> > new file mode 100755
> > index 000000000..404866d2f
> > --- /dev/null
> > +++ b/config/arm/armv8_machine.py
> > @@ -0,0 +1,18 @@
> > +#!/usr/bin/python
> > +# SPDX-License-Identifier: BSD-3-Clause
> > +# Copyright(c) 2017 Cavium, Inc
> > +
> > +ident = []
> > +fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
> > +with open(fname) as f:
> > + content = f.read()
> > +
> > +midr_el1 = (int(content.rstrip('\n'), 16))
> > +
> > +ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
> > +ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
> > +ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
> > +ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
> > +ident.append(hex(midr_el1 & 0xF)) # Revision
> > +
> > +print(' '.join(ident))
> > diff --git a/config/arm/meson.build b/config/arm/meson.build
> > index f05de4c2c..62af5e68a 100644
> > --- a/config/arm/meson.build
> > +++ b/config/arm/meson.build
> > @@ -5,28 +5,88 @@
> > # for checking defines we need to use the correct compiler flags
> > march_opt = '-march=@0@'.format(machine)
> >
> > +machine_args_cavium = [
> > + ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
> > + ['0xa1', ['-mcpu=thunderxt88']],
> > + ['0xa2', ['-mcpu=thunderxt81']],
> > + ['0xa3', ['-mcpu=thunderxt83']]]
> > +
> > +flags_cavium = [
> > + ['RTE_MACHINE', '"thunderx"'],
> > + ['RTE_CACHE_LINE_SIZE', 128],
> > + ['RTE_MAX_NUMA_NODES', 2],
> > + ['RTE_MAX_LCORE', 96],
> > + ['RTE_MAX_VFIO_GROUPS', 128],
> > + ['RTE_RING_USE_C11_MEM_MODEL', false]]
> > +
> > +impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
> > +
> > +dpdk_conf.set('RTE_TOOLCHAIN', '"gcc"')
>
> dpdk_conf.set_quoted() is probably what you want here.
Ah, will fix it in v4
>
> > +dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
> <snip>
> > dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
> > diff --git a/config/meson.build b/config/meson.build
> > index fa55c53a5..f8c67578d 100644
> > --- a/config/meson.build
> > +++ b/config/meson.build
> > @@ -8,7 +8,8 @@ else
> > machine = get_option('machine')
> > endif
> > dpdk_conf.set('RTE_MACHINE', machine)
> > -machine_arg = '-march=' + machine
> > +machine_args = []
> > +machine_args += '-march=' + machine
> >
> > # use pthreads
> > add_project_link_arguments('-pthread', language: 'c')
> > @@ -53,6 +54,14 @@ foreach arg: warning_flags
> > endif
> > endforeach
> >
> > +# set other values pulled from the build options
> > +dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
> > +dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
> > +dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
> > +dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
> > +# values which have defaults which may be overridden
> > +dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
> > +
> > compile_time_cpuflags = []
> > if host_machine.cpu_family().startswith('x86')
> > arch_subdir = 'x86'
> > @@ -65,12 +74,4 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
> > # set the install path for the drivers
> > dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
> >
> > -# set other values pulled from the build options
> > -dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
> > -dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
> > -dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
> > -dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
> > -# values which have defaults which may be overridden
> > -dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
> > -
> Is there a reason why these lines have been moved?
I have moved them above so that they can be overridden by the arch specific
scripts called by subdir(arch_subdir).
Example RTE_MAX_VFIO_GROUPS needs to be 128 in thunderx.
>
Thanks,
Pavan.
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v3 2/2] build: add support for detecting march on ARM
2018-01-19 17:13 ` Pavan Nikhilesh
@ 2018-01-19 17:30 ` Bruce Richardson
0 siblings, 0 replies; 30+ messages in thread
From: Bruce Richardson @ 2018-01-19 17:30 UTC (permalink / raw)
To: Pavan Nikhilesh
Cc: jerin.jacob, harry.van.haaren, herbert.guan, hemant.agrawal, dev
On Fri, Jan 19, 2018 at 10:43:31PM +0530, Pavan Nikhilesh wrote:
> On Fri, Jan 19, 2018 at 04:17:41PM +0000, Bruce Richardson wrote:
> > On Fri, Jan 19, 2018 at 07:22:51PM +0530, Pavan Nikhilesh wrote:
> > > Added support for detecting march and mcpu by reading midr_el1 register.
> > > The implementer, primary part number values read can be used to figure
> > > out the underlying arm cpu.
> > >
> > > Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > > ---
> > > app/test-pmd/meson.build | 2 +-
> > > config/arm/armv8_machine.py | 18 +++++++++++
> > > config/arm/meson.build | 76 ++++++++++++++++++++++++++++++++++++++++-----
> > > config/meson.build | 19 ++++++------
> > > drivers/meson.build | 2 +-
> > > examples/meson.build | 2 +-
> > > lib/meson.build | 2 +-
> > > meson.build | 2 +-
> > > test/test/meson.build | 2 +-
> > > 9 files changed, 102 insertions(+), 23 deletions(-)
> > > create mode 100755 config/arm/armv8_machine.py
> > >
> > > diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
> > > index e819677a5..2a3f0ba1f 100644
> > > --- a/app/test-pmd/meson.build
> > > +++ b/app/test-pmd/meson.build
> > > @@ -45,7 +45,7 @@ endif
> > >
> > > executable('dpdk-testpmd',
> > > sources,
> > > - c_args: machine_arg,
> > > + c_args: machine_args,
> > > link_whole: link_libs,
> > > dependencies: dep_objs,
> > > install_rpath: join_paths(get_option('prefix'), driver_install_path),
> > > diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
> > > new file mode 100755
> > > index 000000000..404866d2f
> > > --- /dev/null
> > > +++ b/config/arm/armv8_machine.py
> > > @@ -0,0 +1,18 @@
> > > +#!/usr/bin/python
> > > +# SPDX-License-Identifier: BSD-3-Clause
> > > +# Copyright(c) 2017 Cavium, Inc
> > > +
> > > +ident = []
> > > +fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
> > > +with open(fname) as f:
> > > + content = f.read()
> > > +
> > > +midr_el1 = (int(content.rstrip('\n'), 16))
> > > +
> > > +ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
> > > +ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
> > > +ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
> > > +ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
> > > +ident.append(hex(midr_el1 & 0xF)) # Revision
> > > +
> > > +print(' '.join(ident))
> > > diff --git a/config/arm/meson.build b/config/arm/meson.build
> > > index f05de4c2c..62af5e68a 100644
> > > --- a/config/arm/meson.build
> > > +++ b/config/arm/meson.build
> > > @@ -5,28 +5,88 @@
> > > # for checking defines we need to use the correct compiler flags
> > > march_opt = '-march=@0@'.format(machine)
> > >
> > > +machine_args_cavium = [
> > > + ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
> > > + ['0xa1', ['-mcpu=thunderxt88']],
> > > + ['0xa2', ['-mcpu=thunderxt81']],
> > > + ['0xa3', ['-mcpu=thunderxt83']]]
> > > +
> > > +flags_cavium = [
> > > + ['RTE_MACHINE', '"thunderx"'],
> > > + ['RTE_CACHE_LINE_SIZE', 128],
> > > + ['RTE_MAX_NUMA_NODES', 2],
> > > + ['RTE_MAX_LCORE', 96],
> > > + ['RTE_MAX_VFIO_GROUPS', 128],
> > > + ['RTE_RING_USE_C11_MEM_MODEL', false]]
> > > +
> > > +impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
> > > +
> > > +dpdk_conf.set('RTE_TOOLCHAIN', '"gcc"')
> >
> > dpdk_conf.set_quoted() is probably what you want here.
>
> Ah, will fix it in v4
>
> >
> > > +dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
> > <snip>
> > > dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
> > > diff --git a/config/meson.build b/config/meson.build
> > > index fa55c53a5..f8c67578d 100644
> > > --- a/config/meson.build
> > > +++ b/config/meson.build
> > > @@ -8,7 +8,8 @@ else
> > > machine = get_option('machine')
> > > endif
> > > dpdk_conf.set('RTE_MACHINE', machine)
> > > -machine_arg = '-march=' + machine
> > > +machine_args = []
> > > +machine_args += '-march=' + machine
> > >
> > > # use pthreads
> > > add_project_link_arguments('-pthread', language: 'c')
> > > @@ -53,6 +54,14 @@ foreach arg: warning_flags
> > > endif
> > > endforeach
> > >
> > > +# set other values pulled from the build options
> > > +dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
> > > +dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
> > > +dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
> > > +dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
> > > +# values which have defaults which may be overridden
> > > +dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
> > > +
> > > compile_time_cpuflags = []
> > > if host_machine.cpu_family().startswith('x86')
> > > arch_subdir = 'x86'
> > > @@ -65,12 +74,4 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
> > > # set the install path for the drivers
> > > dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
> > >
> > > -# set other values pulled from the build options
> > > -dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
> > > -dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
> > > -dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
> > > -dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
> > > -# values which have defaults which may be overridden
> > > -dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
> > > -
> > Is there a reason why these lines have been moved?
>
> I have moved them above so that they can be overridden by the arch specific
> scripts called by subdir(arch_subdir).
> Example RTE_MAX_VFIO_GROUPS needs to be 128 in thunderx.
> >
Missed that, yes, moving them is fine so.
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds
2018-01-19 13:52 ` [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds Pavan Nikhilesh
2018-01-19 13:52 ` [dpdk-dev] [PATCH v3 2/2] build: add support for detecting march on ARM Pavan Nikhilesh
@ 2018-01-19 16:24 ` Bruce Richardson
2018-01-19 16:49 ` Hemant Agrawal
1 sibling, 1 reply; 30+ messages in thread
From: Bruce Richardson @ 2018-01-19 16:24 UTC (permalink / raw)
To: Pavan Nikhilesh
Cc: jerin.jacob, harry.van.haaren, herbert.guan, dev, hemant.agrawal,
shreyansh.jain
On Fri, Jan 19, 2018 at 07:22:50PM +0530, Pavan Nikhilesh wrote:
> From: Bruce Richardson <bruce.richardson@intel.com>
>
> Add files to enable compiling for ARM cross builds.
> This can be tested by doing a cross-compile for armv8-a type using
> the linaro gcc toolchain.
>
> meson arm-build --cross-file aarch64_cross.txt
> ninja -C arm-build
>
> where aarch64_cross.txt contained the following
>
> [binaries]
> c = 'aarch64-linux-gnu-gcc'
> cpp = 'aarch64-linux-gnu-cpp'
> ar = 'aarch64-linux-gnu-ar'
>
> [host_machine]
> system = 'linux'
> cpu_family = 'aarch64'
> cpu = 'armv8-a'
> endian = 'little'
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> ---
> v3 Changes:
> - Fix missing SPDX license tags
>
> v2 Changes:
> - Merged RFC patch.
> - Added framework to easily other vendor specific flags
> - renamed machine_arg to machine_args
>
Set LGTM, but it would be nice to get an ACK or review from another ARM
expert. Any volunteers?
/Bruce
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds
2018-01-19 16:24 ` [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds Bruce Richardson
@ 2018-01-19 16:49 ` Hemant Agrawal
2018-01-19 17:33 ` Bruce Richardson
0 siblings, 1 reply; 30+ messages in thread
From: Hemant Agrawal @ 2018-01-19 16:49 UTC (permalink / raw)
To: Bruce Richardson, Pavan Nikhilesh
Cc: jerin.jacob, harry.van.haaren, herbert.guan, dev, Shreyansh Jain,
Akhil Goyal
HI Bruce,
Are these planned for 18.02? If so, I will prioritize this work.
Regards,
Hemant
> -----Original Message-----
> From: Bruce Richardson [mailto:bruce.richardson@intel.com]
> Sent: Friday, January 19, 2018 9:54 PM
> To: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> Cc: jerin.jacob@caviumnetworks.com; harry.van.haaren@intel.com;
> herbert.guan@arm.com; dev@dpdk.org; Hemant Agrawal
> <hemant.agrawal@nxp.com>; Shreyansh Jain <shreyansh.jain@nxp.com>
> Subject: Re: [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds
> Importance: High
>
> On Fri, Jan 19, 2018 at 07:22:50PM +0530, Pavan Nikhilesh wrote:
> > From: Bruce Richardson <bruce.richardson@intel.com>
> >
> > Add files to enable compiling for ARM cross builds.
> > This can be tested by doing a cross-compile for armv8-a type using the
> > linaro gcc toolchain.
> >
> > meson arm-build --cross-file aarch64_cross.txt
> > ninja -C arm-build
> >
> > where aarch64_cross.txt contained the following
> >
> > [binaries]
> > c = 'aarch64-linux-gnu-gcc'
> > cpp = 'aarch64-linux-gnu-cpp'
> > ar = 'aarch64-linux-gnu-ar'
> >
> > [host_machine]
> > system = 'linux'
> > cpu_family = 'aarch64'
> > cpu = 'armv8-a'
> > endian = 'little'
> >
> > Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> > Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > ---
> > v3 Changes:
> > - Fix missing SPDX license tags
> >
> > v2 Changes:
> > - Merged RFC patch.
> > - Added framework to easily other vendor specific flags
> > - renamed machine_arg to machine_args
> >
> Set LGTM, but it would be nice to get an ACK or review from another ARM
> expert. Any volunteers?
>
> /Bruce
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds
2018-01-19 16:49 ` Hemant Agrawal
@ 2018-01-19 17:33 ` Bruce Richardson
0 siblings, 0 replies; 30+ messages in thread
From: Bruce Richardson @ 2018-01-19 17:33 UTC (permalink / raw)
To: Hemant Agrawal
Cc: Pavan Nikhilesh, jerin.jacob, harry.van.haaren, herbert.guan,
dev, Shreyansh Jain, Akhil Goyal
On Fri, Jan 19, 2018 at 04:49:04PM +0000, Hemant Agrawal wrote:
> HI Bruce,
> Are these planned for 18.02? If so, I will prioritize this work.
>
> Regards,
> Hemant
>
Hi Hemant,
yes, this is planned to be merged as *experimental* for 18.02. If no
feedback, I'll pull them as-is for 18.02 and we can fix appropriately in
18.05. I've verified at least that cross-compiling for arm works with
them applied, but the changes for detecting platform in the
non-cross-compile case I can't test, so your input on that would be
appreciated.
/Bruce
^ permalink raw reply [flat|nested] 30+ messages in thread
* [dpdk-dev] [PATCH v4 1/2] build: add support for ARM builds
2017-12-19 10:53 [dpdk-dev] [RFC PATCH] RFC build: prototype support for ARM builds Bruce Richardson
` (2 preceding siblings ...)
2018-01-19 13:52 ` [dpdk-dev] [PATCH v3 1/2] build: add support for ARM builds Pavan Nikhilesh
@ 2018-01-19 18:23 ` Pavan Nikhilesh
2018-01-19 18:23 ` [dpdk-dev] [PATCH v4 2/2] build: add support for detecting march on ARM Pavan Nikhilesh
2018-01-22 11:46 ` [dpdk-dev] [PATCH v5 1/2] build: add support for ARM builds Pavan Nikhilesh
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds Pavan Nikhilesh
5 siblings, 1 reply; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-19 18:23 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev, Pavan Nikhilesh
From: Bruce Richardson <bruce.richardson@intel.com>
Add files to enable compiling for ARM cross builds.
This can be tested by doing a cross-compile for armv8-a type using
the linaro gcc toolchain.
meson arm-build --cross-file aarch64_cross.txt
ninja -C arm-build
where aarch64_cross.txt contained the following
[binaries]
c = 'aarch64-linux-gnu-gcc'
cpp = 'aarch64-linux-gnu-cpp'
ar = 'aarch64-linux-gnu-ar'
[host_machine]
system = 'linux'
cpu_family = 'aarch64'
cpu = 'armv8-a'
endian = 'little'
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
v4 Changes:
- use set_quoted to set config instead of explicitly using quotes.
v3 Changes:
- Fix missing SPDX license tags
v2 Changes:
- Merged RFC patch.
- Added framework to easily other vendor specific flags
- renamed machine_arg to machine_args
config/arm/meson.build | 36 ++++++++++++++++++++++
config/meson.build | 4 ++-
lib/librte_eal/common/arch/arm/meson.build | 5 +++
lib/librte_eal/common/include/arch/arm/meson.build | 29 +++++++++++++++++
4 files changed, 73 insertions(+), 1 deletion(-)
create mode 100644 config/arm/meson.build
create mode 100644 lib/librte_eal/common/arch/arm/meson.build
create mode 100644 lib/librte_eal/common/include/arch/arm/meson.build
diff --git a/config/arm/meson.build b/config/arm/meson.build
new file mode 100644
index 000000000..f05de4c2c
--- /dev/null
+++ b/config/arm/meson.build
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+# Copyright(c) 2017 Cavium, Inc
+
+# for checking defines we need to use the correct compiler flags
+march_opt = '-march=@0@'.format(machine)
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+if cc.sizeof('void *') == 8
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
+ dpdk_conf.set('RTE_ARCH_ARM', 1)
+ dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+endif
+
+if cc.get_define('__ARM_NEON', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
+ 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
+endif
diff --git a/config/meson.build b/config/meson.build
index 95223042f..fa55c53a5 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -56,8 +56,10 @@ endforeach
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
- subdir(arch_subdir)
+elif host_machine.cpu_family().startswith('arm') or host_machine.cpu_family().startswith('aarch')
+ arch_subdir = 'arm'
endif
+subdir(arch_subdir)
dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
diff --git a/lib/librte_eal/common/arch/arm/meson.build b/lib/librte_eal/common/arch/arm/meson.build
new file mode 100644
index 000000000..c6bd92272
--- /dev/null
+++ b/lib/librte_eal/common/arch/arm/meson.build
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+eal_common_arch_sources = files('rte_cpuflags.c',
+ 'rte_cycles.c')
diff --git a/lib/librte_eal/common/include/arch/arm/meson.build b/lib/librte_eal/common/include/arch/arm/meson.build
new file mode 100644
index 000000000..77893fa35
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/meson.build
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+install_headers(
+ 'rte_atomic_32.h',
+ 'rte_atomic_64.h',
+ 'rte_atomic.h',
+ 'rte_byteorder.h',
+ 'rte_cpuflags_32.h',
+ 'rte_cpuflags_64.h',
+ 'rte_cpuflags.h',
+ 'rte_cycles_32.h',
+ 'rte_cycles_64.h',
+ 'rte_cycles.h',
+ 'rte_io_64.h',
+ 'rte_io.h',
+ 'rte_memcpy_32.h',
+ 'rte_memcpy_64.h',
+ 'rte_memcpy.h',
+ 'rte_pause_32.h',
+ 'rte_pause_64.h',
+ 'rte_pause.h',
+ 'rte_prefetch_32.h',
+ 'rte_prefetch_64.h',
+ 'rte_prefetch.h',
+ 'rte_rwlock.h',
+ 'rte_spinlock.h',
+ 'rte_vect.h',
+ subdir: get_option('include_subdir_arch'))
--
2.15.1
^ permalink raw reply [flat|nested] 30+ messages in thread* [dpdk-dev] [PATCH v4 2/2] build: add support for detecting march on ARM
2018-01-19 18:23 ` [dpdk-dev] [PATCH v4 " Pavan Nikhilesh
@ 2018-01-19 18:23 ` Pavan Nikhilesh
2018-01-22 5:52 ` Herbert Guan
0 siblings, 1 reply; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-19 18:23 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev, Pavan Nikhilesh
Added support for detecting march and mcpu by reading midr_el1 register.
The implementer, primary part number values read can be used to figure
out the underlying arm cpu.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
app/test-pmd/meson.build | 2 +-
config/arm/armv8_machine.py | 18 +++++++++++
config/arm/meson.build | 76 ++++++++++++++++++++++++++++++++++++++++-----
config/meson.build | 19 ++++++------
drivers/meson.build | 2 +-
examples/meson.build | 2 +-
lib/meson.build | 2 +-
meson.build | 2 +-
test/test/meson.build | 2 +-
9 files changed, 102 insertions(+), 23 deletions(-)
create mode 100755 config/arm/armv8_machine.py
diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
index e819677a5..2a3f0ba1f 100644
--- a/app/test-pmd/meson.build
+++ b/app/test-pmd/meson.build
@@ -45,7 +45,7 @@ endif
executable('dpdk-testpmd',
sources,
- c_args: machine_arg,
+ c_args: machine_args,
link_whole: link_libs,
dependencies: dep_objs,
install_rpath: join_paths(get_option('prefix'), driver_install_path),
diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
new file mode 100755
index 000000000..404866d2f
--- /dev/null
+++ b/config/arm/armv8_machine.py
@@ -0,0 +1,18 @@
+#!/usr/bin/python
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Cavium, Inc
+
+ident = []
+fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
+with open(fname) as f:
+ content = f.read()
+
+midr_el1 = (int(content.rstrip('\n'), 16))
+
+ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
+ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
+ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
+ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
+ident.append(hex(midr_el1 & 0xF)) # Revision
+
+print(' '.join(ident))
diff --git a/config/arm/meson.build b/config/arm/meson.build
index f05de4c2c..1bed82236 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -5,28 +5,88 @@
# for checking defines we need to use the correct compiler flags
march_opt = '-march=@0@'.format(machine)
+machine_args_cavium = [
+ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
+ ['0xa1', ['-mcpu=thunderxt88']],
+ ['0xa2', ['-mcpu=thunderxt81']],
+ ['0xa3', ['-mcpu=thunderxt83']]]
+
+flags_cavium = [
+ ['RTE_MACHINE', '"thunderx"'],
+ ['RTE_CACHE_LINE_SIZE', 128],
+ ['RTE_MAX_NUMA_NODES', 2],
+ ['RTE_MAX_LCORE', 96],
+ ['RTE_MAX_VFIO_GROUPS', 128],
+ ['RTE_RING_USE_C11_MEM_MODEL', false]]
+
+impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
+
+dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc')
+dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
-if cc.sizeof('void *') == 8
- dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
- dpdk_conf.set('RTE_ARCH_ARM64', 1)
- dpdk_conf.set('RTE_ARCH_64', 1)
-else
+
+if cc.sizeof('void *') != 8
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
dpdk_conf.set('RTE_ARCH_ARM', 1)
dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+
+ if not meson.is_cross_build()
+ # The script returns ['Implementor', 'Variant', 'Architecture',
+ # 'Primary Part number', 'Revision']
+ detect_vendor = find_program(join_paths(
+ meson.current_source_dir(), 'armv8_machine.py'))
+ cmd = run_command(detect_vendor.path())
+ if cmd.returncode() != 0
+ message('Using default armv8 config')
+ else
+ machine_args = [] # Clear previous machine args
+ cmd_output = cmd.stdout().strip().split(' ')
+ machine = get_variable('impl_' + cmd_output[0])
+ message('Implementor : ' + machine[0])
+
+ foreach flag: machine[1]
+ dpdk_conf.set(flag[0], flag[1])
+ endforeach
+
+ # Primary part number based mcpu flags are supported
+ # for gcc versions > 7
+ if cc.version().version_compare('<7.0')
+ foreach marg: machine[2]
+ if marg[0] == 'default'
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ else
+ foreach marg: machine[2]
+ if marg[0] == cmd_output[3]
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ endif
+ endif
+ endif
endif
+message(machine_args)
-if cc.get_define('__ARM_NEON', args: march_opt) != ''
+if cc.get_define('__ARM_NEON', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
endif
-if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
endif
-if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
diff --git a/config/meson.build b/config/meson.build
index fa55c53a5..f8c67578d 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -8,7 +8,8 @@ else
machine = get_option('machine')
endif
dpdk_conf.set('RTE_MACHINE', machine)
-machine_arg = '-march=' + machine
+machine_args = []
+machine_args += '-march=' + machine
# use pthreads
add_project_link_arguments('-pthread', language: 'c')
@@ -53,6 +54,14 @@ foreach arg: warning_flags
endif
endforeach
+# set other values pulled from the build options
+dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
+dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
+dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
+dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
+# values which have defaults which may be overridden
+dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
+
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
@@ -65,12 +74,4 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
-# set other values pulled from the build options
-dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
-dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
-dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
-dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
-# values which have defaults which may be overridden
-dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
-
install_headers('rte_config.h', subdir: get_option('include_subdir_arch'))
diff --git a/drivers/meson.build b/drivers/meson.build
index 9b5039847..1d6430bfe 100644
--- a/drivers/meson.build
+++ b/drivers/meson.build
@@ -22,7 +22,7 @@ foreach class:driver_classes
version = 1
sources = []
objs = []
- cflags = [machine_arg]
+ cflags = machine_args
includes = [include_directories(drv_path)]
# set up internal deps. Drivers can append/override as necessary
deps = std_deps
diff --git a/examples/meson.build b/examples/meson.build
index 0abed7169..b3f997242 100644
--- a/examples/meson.build
+++ b/examples/meson.build
@@ -9,7 +9,7 @@ endif
foreach example: get_option('examples').split(',')
name = example
sources = []
- cflags = [machine_arg]
+ cflags = machine_args
ext_deps = []
includes = [include_directories(example)]
deps = ['eal', 'mempool', 'net', 'mbuf', 'ethdev', 'cmdline']
diff --git a/lib/meson.build b/lib/meson.build
index 0c94d74b9..b9ea6f61b 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -31,7 +31,7 @@ foreach l:libraries
sources = []
headers = []
includes = []
- cflags = [machine_arg]
+ cflags = machine_args
objs = [] # other object files to link against, used e.g. for
# instruction-set optimized versions of code
diff --git a/meson.build b/meson.build
index 3dce8579e..326fbc7d1 100644
--- a/meson.build
+++ b/meson.build
@@ -66,5 +66,5 @@ pkg.generate(name: meson.project_name(),
['-Wl,-Bdynamic'] + dpdk_extra_ldflags,
description: 'The Data Plane Development Kit (DPDK)',
subdirs: [get_option('include_subdir_arch'), '.'],
- extra_cflags: ['-include "rte_config.h"', machine_arg]
+ extra_cflags: ['-include "rte_config.h"'] + machine_args
)
diff --git a/test/test/meson.build b/test/test/meson.build
index 1863c603c..873efbc07 100644
--- a/test/test/meson.build
+++ b/test/test/meson.build
@@ -204,7 +204,7 @@ if get_option('tests')
test_sources,
link_whole: link_libs,
dependencies: test_dep_objs,
- c_args: machine_arg,
+ c_args: machine_args,
install_rpath: driver_install_path,
install: false)
--
2.15.1
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v4 2/2] build: add support for detecting march on ARM
2018-01-19 18:23 ` [dpdk-dev] [PATCH v4 2/2] build: add support for detecting march on ARM Pavan Nikhilesh
@ 2018-01-22 5:52 ` Herbert Guan
2018-01-22 7:16 ` Pavan Nikhilesh
0 siblings, 1 reply; 30+ messages in thread
From: Herbert Guan @ 2018-01-22 5:52 UTC (permalink / raw)
To: Pavan Nikhilesh, jerin.jacob, bruce.richardson, harry.van.haaren,
hemant.agrawal
Cc: dev, nd
Hi, Pavan
Please see my notes inline.
Best regards,
Herbert
> -----Original Message-----
> From: Pavan Nikhilesh [mailto:pbhagavatula@caviumnetworks.com]
> Sent: Saturday, January 20, 2018 2:24
> To: jerin.jacob@caviumnetworks.com; bruce.richardson@intel.com;
> harry.van.haaren@intel.com; Herbert Guan <Herbert.Guan@arm.com>;
> hemant.agrawal@nxp.com
> Cc: dev@dpdk.org; Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH v4 2/2] build: add support for detecting march
> on ARM
>
> Added support for detecting march and mcpu by reading midr_el1 register.
> The implementer, primary part number values read can be used to figure out
> the underlying arm cpu.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> ---
> app/test-pmd/meson.build | 2 +-
> config/arm/armv8_machine.py | 18 +++++++++++
> config/arm/meson.build | 76
> ++++++++++++++++++++++++++++++++++++++++-----
> config/meson.build | 19 ++++++------
> drivers/meson.build | 2 +-
> examples/meson.build | 2 +-
> lib/meson.build | 2 +-
> meson.build | 2 +-
> test/test/meson.build | 2 +-
> 9 files changed, 102 insertions(+), 23 deletions(-) create mode 100755
> config/arm/armv8_machine.py
>
> diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build index
> e819677a5..2a3f0ba1f 100644
> --- a/app/test-pmd/meson.build
> +++ b/app/test-pmd/meson.build
> @@ -45,7 +45,7 @@ endif
>
> executable('dpdk-testpmd',
> sources,
> - c_args: machine_arg,
> + c_args: machine_args,
> link_whole: link_libs,
> dependencies: dep_objs,
> install_rpath: join_paths(get_option('prefix'), driver_install_path),
> diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
> new file mode 100755 index 000000000..404866d2f
> --- /dev/null
> +++ b/config/arm/armv8_machine.py
> @@ -0,0 +1,18 @@
> +#!/usr/bin/python
> +# SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2017 Cavium, Inc
> +
> +ident = []
> +fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
> +with open(fname) as f:
> + content = f.read()
> +
> +midr_el1 = (int(content.rstrip('\n'), 16))
> +
> +ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
> +ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
> +ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
> +ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
> +ident.append(hex(midr_el1 & 0xF)) # Revision
> +
> +print(' '.join(ident))
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> f05de4c2c..1bed82236 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -5,28 +5,88 @@
> # for checking defines we need to use the correct compiler flags march_opt
> = '-march=@0@'.format(machine)
>
> +machine_args_cavium = [
> + ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
> + ['0xa1', ['-mcpu=thunderxt88']],
> + ['0xa2', ['-mcpu=thunderxt81']],
> + ['0xa3', ['-mcpu=thunderxt83']]]
> +
> +flags_cavium = [
> + ['RTE_MACHINE', '"thunderx"'],
> + ['RTE_CACHE_LINE_SIZE', 128],
> + ['RTE_MAX_NUMA_NODES', 2],
> + ['RTE_MAX_LCORE', 96],
> + ['RTE_MAX_VFIO_GROUPS', 128],
> + ['RTE_RING_USE_C11_MEM_MODEL', false]]
> +
> +impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
There're only Cavimu args/flags defined, so other arm/arm64 platforms will fail at detecting. Can you add one entry for default?
> +
> +dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc')
> +dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
> dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) -if cc.sizeof('void *') == 8
> - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
> - dpdk_conf.set('RTE_ARCH_ARM64', 1)
> - dpdk_conf.set('RTE_ARCH_64', 1)
> -else
> +
> +if cc.sizeof('void *') != 8
> dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
> dpdk_conf.set('RTE_ARCH_ARM', 1)
> dpdk_conf.set('RTE_ARCH_ARMv7', 1)
> +else
> + dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
> + dpdk_conf.set('RTE_ARCH_ARM64', 1)
> + dpdk_conf.set('RTE_ARCH_64', 1)
> +
> + if not meson.is_cross_build()
> + # The script returns ['Implementor', 'Variant', 'Architecture',
> + # 'Primary Part number', 'Revision']
> + detect_vendor = find_program(join_paths(
> + meson.current_source_dir(),
> 'armv8_machine.py'))
> + cmd = run_command(detect_vendor.path())
> + if cmd.returncode() != 0
> + message('Using default armv8 config')
> + else
> + machine_args = [] # Clear previous machine args
> + cmd_output = cmd.stdout().strip().split(' ')
> + machine = get_variable('impl_' + cmd_output[0])
Script will fail for non-cavium Arm platforms. We need to check if cmd_output[0] is a known value in a list, otherwise should go to default entry.
> + message('Implementor : ' + machine[0])
> +
> + foreach flag: machine[1]
> + dpdk_conf.set(flag[0], flag[1])
> + endforeach
> +
> + # Primary part number based mcpu flags are
> supported
> + # for gcc versions > 7
> + if cc.version().version_compare('<7.0')
> + foreach marg: machine[2]
> + if marg[0] == 'default'
> + foreach f: marg[1]
> + machine_args += f
> + endforeach
> + endif
> + endforeach
> + else
> + foreach marg: machine[2]
> + if marg[0] == cmd_output[3]
> + foreach f: marg[1]
> + machine_args += f
> + endforeach
> + endif
> + endforeach
> + endif
> + endif
> + endif
> endif
> +message(machine_args)
>
> -if cc.get_define('__ARM_NEON', args: march_opt) != ''
> +if cc.get_define('__ARM_NEON', args: machine_args) != ''
> dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
> compile_time_cpuflags += ['RTE_CPUFLAG_NEON'] endif
>
> -if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
> +if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
> dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
> compile_time_cpuflags += ['RTE_CPUFLAG_CRC32'] endif
>
> -if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
> +if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
> dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
> dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
> dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1) diff --git
> a/config/meson.build b/config/meson.build index fa55c53a5..f8c67578d
> 100644
> --- a/config/meson.build
> +++ b/config/meson.build
> @@ -8,7 +8,8 @@ else
> machine = get_option('machine')
> endif
> dpdk_conf.set('RTE_MACHINE', machine)
> -machine_arg = '-march=' + machine
> +machine_args = []
> +machine_args += '-march=' + machine
>
> # use pthreads
> add_project_link_arguments('-pthread', language: 'c') @@ -53,6 +54,14 @@
> foreach arg: warning_flags
> endif
> endforeach
>
> +# set other values pulled from the build options
> +dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
> +dpdk_conf.set('RTE_MAX_NUMA_NODES',
> get_option('max_numa_nodes'))
> +dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
> +dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID',
> +get_option('allow_invalid_socket_id'))
> +# values which have defaults which may be overridden
> +dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
> +
> compile_time_cpuflags = []
> if host_machine.cpu_family().startswith('x86')
> arch_subdir = 'x86'
> @@ -65,12 +74,4 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS',
> ','.join(compile_time_cpuflags)) # set the install path for the drivers
> dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
>
> -# set other values pulled from the build options -
> dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores')) -
> dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
> -dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet')) -
> dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID',
> get_option('allow_invalid_socket_id'))
> -# values which have defaults which may be overridden -
> dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
> -
> install_headers('rte_config.h', subdir: get_option('include_subdir_arch'))
> diff --git a/drivers/meson.build b/drivers/meson.build index
> 9b5039847..1d6430bfe 100644
> --- a/drivers/meson.build
> +++ b/drivers/meson.build
> @@ -22,7 +22,7 @@ foreach class:driver_classes
> version = 1
> sources = []
> objs = []
> - cflags = [machine_arg]
> + cflags = machine_args
> includes = [include_directories(drv_path)]
> # set up internal deps. Drivers can append/override as
> necessary
> deps = std_deps
> diff --git a/examples/meson.build b/examples/meson.build index
> 0abed7169..b3f997242 100644
> --- a/examples/meson.build
> +++ b/examples/meson.build
> @@ -9,7 +9,7 @@ endif
> foreach example: get_option('examples').split(',')
> name = example
> sources = []
> - cflags = [machine_arg]
> + cflags = machine_args
> ext_deps = []
> includes = [include_directories(example)]
> deps = ['eal', 'mempool', 'net', 'mbuf', 'ethdev', 'cmdline'] diff --git
> a/lib/meson.build b/lib/meson.build index 0c94d74b9..b9ea6f61b 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -31,7 +31,7 @@ foreach l:libraries
> sources = []
> headers = []
> includes = []
> - cflags = [machine_arg]
> + cflags = machine_args
> objs = [] # other object files to link against, used e.g. for
> # instruction-set optimized versions of code
>
> diff --git a/meson.build b/meson.build
> index 3dce8579e..326fbc7d1 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -66,5 +66,5 @@ pkg.generate(name: meson.project_name(),
> ['-Wl,-Bdynamic'] + dpdk_extra_ldflags,
> description: 'The Data Plane Development Kit (DPDK)',
> subdirs: [get_option('include_subdir_arch'), '.'],
> - extra_cflags: ['-include "rte_config.h"', machine_arg]
> + extra_cflags: ['-include "rte_config.h"'] + machine_args
> )
> diff --git a/test/test/meson.build b/test/test/meson.build index
> 1863c603c..873efbc07 100644
> --- a/test/test/meson.build
> +++ b/test/test/meson.build
> @@ -204,7 +204,7 @@ if get_option('tests')
> test_sources,
> link_whole: link_libs,
> dependencies: test_dep_objs,
> - c_args: machine_arg,
> + c_args: machine_args,
> install_rpath: driver_install_path,
> install: false)
>
> --
> 2.15.1
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v4 2/2] build: add support for detecting march on ARM
2018-01-22 5:52 ` Herbert Guan
@ 2018-01-22 7:16 ` Pavan Nikhilesh
0 siblings, 0 replies; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-22 7:16 UTC (permalink / raw)
To: Herbert Guan, jerin.jacob, bruce.richardson, harry.van.haaren,
hemant.agrawal
Cc: dev, nd
Hi Herbert,
Thanks for the review, will add a default entry for generic arm.
On Mon, Jan 22, 2018 at 05:52:36AM +0000, Herbert Guan wrote:
> Hi, Pavan
>
> Please see my notes inline.
>
> Best regards,
> Herbert
>
> > -----Original Message-----
> > From: Pavan Nikhilesh [mailto:pbhagavatula@caviumnetworks.com]
> > Sent: Saturday, January 20, 2018 2:24
> > To: jerin.jacob@caviumnetworks.com; bruce.richardson@intel.com;
> > harry.van.haaren@intel.com; Herbert Guan <Herbert.Guan@arm.com>;
> > hemant.agrawal@nxp.com
> > Cc: dev@dpdk.org; Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > Subject: [dpdk-dev] [PATCH v4 2/2] build: add support for detecting march
> > on ARM
> >
> > Added support for detecting march and mcpu by reading midr_el1 register.
> > The implementer, primary part number values read can be used to figure out
> > the underlying arm cpu.
> >
> > Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > ---
<snip>
> > +impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
>
> There're only Cavimu args/flags defined, so other arm/arm64 platforms will fail at detecting. Can you add one entry for default?
>
> > +
> > +dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc')
> > +dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
> > dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) -if cc.sizeof('void *') == 8
> > - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
> > - dpdk_conf.set('RTE_ARCH_ARM64', 1)
> > - dpdk_conf.set('RTE_ARCH_64', 1)
> > -else
> > +
> > +if cc.sizeof('void *') != 8
> > dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
> > dpdk_conf.set('RTE_ARCH_ARM', 1)
> > dpdk_conf.set('RTE_ARCH_ARMv7', 1)
> > +else
> > + dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
> > + dpdk_conf.set('RTE_ARCH_ARM64', 1)
> > + dpdk_conf.set('RTE_ARCH_64', 1)
> > +
> > + if not meson.is_cross_build()
> > + # The script returns ['Implementor', 'Variant', 'Architecture',
> > + # 'Primary Part number', 'Revision']
> > + detect_vendor = find_program(join_paths(
> > + meson.current_source_dir(),
> > 'armv8_machine.py'))
> > + cmd = run_command(detect_vendor.path())
> > + if cmd.returncode() != 0
> > + message('Using default armv8 config')
> > + else
> > + machine_args = [] # Clear previous machine args
> > + cmd_output = cmd.stdout().strip().split(' ')
> > + machine = get_variable('impl_' + cmd_output[0])
>
> Script will fail for non-cavium Arm platforms. We need to check if cmd_output[0] is a known value in a list, otherwise should go to default entry.
>
> > + message('Implementor : ' + machine[0])
> > +
^ permalink raw reply [flat|nested] 30+ messages in thread
* [dpdk-dev] [PATCH v5 1/2] build: add support for ARM builds
2017-12-19 10:53 [dpdk-dev] [RFC PATCH] RFC build: prototype support for ARM builds Bruce Richardson
` (3 preceding siblings ...)
2018-01-19 18:23 ` [dpdk-dev] [PATCH v4 " Pavan Nikhilesh
@ 2018-01-22 11:46 ` Pavan Nikhilesh
2018-01-22 11:46 ` [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM Pavan Nikhilesh
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds Pavan Nikhilesh
5 siblings, 1 reply; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-22 11:46 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev, Pavan Nikhilesh
From: Bruce Richardson <bruce.richardson@intel.com>
Add files to enable compiling for ARM cross builds.
This can be tested by doing a cross-compile for armv8-a type using
the linaro gcc toolchain.
meson arm-build --cross-file aarch64_cross.txt
ninja -C arm-build
where aarch64_cross.txt contained the following
[binaries]
c = 'aarch64-linux-gnu-gcc'
cpp = 'aarch64-linux-gnu-cpp'
ar = 'aarch64-linux-gnu-ar'
[host_machine]
system = 'linux'
cpu_family = 'aarch64'
cpu = 'armv8-a'
endian = 'little'
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
v5 Changes:
- Use generic_armv8 config when script returns unknows machine args
v4 Changes:
- use set_quoted to set config instead of explicitly using quotes.
v3 Changes:
- Fix missing SPDX license tags
v2 Changes:
- Merged RFC patch.
- Added framework to easily other vendor specific flags
- renamed machine_arg to machine_args
config/arm/meson.build | 36 ++++++++++++++++++++++
config/meson.build | 4 ++-
lib/librte_eal/common/arch/arm/meson.build | 5 +++
lib/librte_eal/common/include/arch/arm/meson.build | 29 +++++++++++++++++
4 files changed, 73 insertions(+), 1 deletion(-)
create mode 100644 config/arm/meson.build
create mode 100644 lib/librte_eal/common/arch/arm/meson.build
create mode 100644 lib/librte_eal/common/include/arch/arm/meson.build
diff --git a/config/arm/meson.build b/config/arm/meson.build
new file mode 100644
index 000000000..f05de4c2c
--- /dev/null
+++ b/config/arm/meson.build
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+# Copyright(c) 2017 Cavium, Inc
+
+# for checking defines we need to use the correct compiler flags
+march_opt = '-march=@0@'.format(machine)
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+if cc.sizeof('void *') == 8
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
+ dpdk_conf.set('RTE_ARCH_ARM', 1)
+ dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+endif
+
+if cc.get_define('__ARM_NEON', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
+ 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
+endif
diff --git a/config/meson.build b/config/meson.build
index 95223042f..fa55c53a5 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -56,8 +56,10 @@ endforeach
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
- subdir(arch_subdir)
+elif host_machine.cpu_family().startswith('arm') or host_machine.cpu_family().startswith('aarch')
+ arch_subdir = 'arm'
endif
+subdir(arch_subdir)
dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
diff --git a/lib/librte_eal/common/arch/arm/meson.build b/lib/librte_eal/common/arch/arm/meson.build
new file mode 100644
index 000000000..c6bd92272
--- /dev/null
+++ b/lib/librte_eal/common/arch/arm/meson.build
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+eal_common_arch_sources = files('rte_cpuflags.c',
+ 'rte_cycles.c')
diff --git a/lib/librte_eal/common/include/arch/arm/meson.build b/lib/librte_eal/common/include/arch/arm/meson.build
new file mode 100644
index 000000000..77893fa35
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/meson.build
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+install_headers(
+ 'rte_atomic_32.h',
+ 'rte_atomic_64.h',
+ 'rte_atomic.h',
+ 'rte_byteorder.h',
+ 'rte_cpuflags_32.h',
+ 'rte_cpuflags_64.h',
+ 'rte_cpuflags.h',
+ 'rte_cycles_32.h',
+ 'rte_cycles_64.h',
+ 'rte_cycles.h',
+ 'rte_io_64.h',
+ 'rte_io.h',
+ 'rte_memcpy_32.h',
+ 'rte_memcpy_64.h',
+ 'rte_memcpy.h',
+ 'rte_pause_32.h',
+ 'rte_pause_64.h',
+ 'rte_pause.h',
+ 'rte_prefetch_32.h',
+ 'rte_prefetch_64.h',
+ 'rte_prefetch.h',
+ 'rte_rwlock.h',
+ 'rte_spinlock.h',
+ 'rte_vect.h',
+ subdir: get_option('include_subdir_arch'))
--
2.16.0
^ permalink raw reply [flat|nested] 30+ messages in thread* [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
2018-01-22 11:46 ` [dpdk-dev] [PATCH v5 1/2] build: add support for ARM builds Pavan Nikhilesh
@ 2018-01-22 11:46 ` Pavan Nikhilesh
2018-01-22 12:30 ` Bruce Richardson
0 siblings, 1 reply; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-22 11:46 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev, Pavan Nikhilesh
Added support for detecting march and mcpu by reading midr_el1 register.
The implementer, primary part number values read can be used to figure
out the underlying arm cpu.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
app/test-pmd/meson.build | 2 +-
config/arm/armv8_machine.py | 18 +++++++++
config/arm/meson.build | 95 +++++++++++++++++++++++++++++++++++++++++----
config/meson.build | 19 ++++-----
drivers/meson.build | 2 +-
examples/meson.build | 2 +-
lib/meson.build | 2 +-
meson.build | 2 +-
test/test/meson.build | 2 +-
9 files changed, 121 insertions(+), 23 deletions(-)
create mode 100755 config/arm/armv8_machine.py
diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
index e819677a5..2a3f0ba1f 100644
--- a/app/test-pmd/meson.build
+++ b/app/test-pmd/meson.build
@@ -45,7 +45,7 @@ endif
executable('dpdk-testpmd',
sources,
- c_args: machine_arg,
+ c_args: machine_args,
link_whole: link_libs,
dependencies: dep_objs,
install_rpath: join_paths(get_option('prefix'), driver_install_path),
diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
new file mode 100755
index 000000000..404866d2f
--- /dev/null
+++ b/config/arm/armv8_machine.py
@@ -0,0 +1,18 @@
+#!/usr/bin/python
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Cavium, Inc
+
+ident = []
+fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
+with open(fname) as f:
+ content = f.read()
+
+midr_el1 = (int(content.rstrip('\n'), 16))
+
+ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
+ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
+ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
+ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
+ident.append(hex(midr_el1 & 0xF)) # Revision
+
+print(' '.join(ident))
diff --git a/config/arm/meson.build b/config/arm/meson.build
index f05de4c2c..212b94499 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -5,28 +5,107 @@
# for checking defines we need to use the correct compiler flags
march_opt = '-march=@0@'.format(machine)
-dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
-if cc.sizeof('void *') == 8
- dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
- dpdk_conf.set('RTE_ARCH_ARM64', 1)
- dpdk_conf.set('RTE_ARCH_64', 1)
+machine_args_generic = [
+ ['default', ['-march=armv8-a+crc+crypto']]]
+machine_args_cavium = [
+ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
+ ['0xa1', ['-mcpu=thunderxt88']],
+ ['0xa2', ['-mcpu=thunderxt81']],
+ ['0xa3', ['-mcpu=thunderxt83']]]
+
+flags_generic = [[]]
+flags_cavium = [
+ ['RTE_MACHINE', '"thunderx"'],
+ ['RTE_CACHE_LINE_SIZE', 128],
+ ['RTE_MAX_NUMA_NODES', 2],
+ ['RTE_MAX_LCORE', 96],
+ ['RTE_MAX_VFIO_GROUPS', 128],
+ ['RTE_RING_USE_C11_MEM_MODEL', false]]
+
+impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
+impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
+
+if cc.get_define('__clang__') != ''
+ dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'clang')
+ dpdk_conf.set('RTE_TOOLCHAIN_CLANG', 1)
else
+ dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc')
+ dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
+endif
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+
+if cc.sizeof('void *') != 8
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
dpdk_conf.set('RTE_ARCH_ARM', 1)
dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+
+ machine = []
+ cmd_generic = ['generic', '', '', 'default', '']
+ cmd_output = cmd_generic # Set generic by default
+ machine_args = [] # Clear previous machine args
+ if not meson.is_cross_build()
+ # The script returns ['Implementer', 'Variant', 'Architecture',
+ # 'Primary Part number', 'Revision']
+ detect_vendor = find_program(join_paths(
+ meson.current_source_dir(), 'armv8_machine.py'))
+ cmd = run_command(detect_vendor.path())
+ if cmd.returncode() == 0
+ cmd_output = cmd.stdout().strip().split(' ')
+ endif
+ # Set to generic if variable is not found
+ machine = get_variable('impl_' + cmd_output[0], 'generic')
+ endif
+
+ if machine == 'generic'
+ machine = impl_generic
+ cmd_output = cmd_generic
+ endif
+
+ message('Implementer : ' + machine[0])
+ foreach flag: machine[1]
+ if flag.length() > 0
+ dpdk_conf.set(flag[0], flag[1])
+ endif
+ endforeach
+ # Primary part number based mcpu flags are supported
+ # for gcc versions > 7
+ if cc.version().version_compare(
+ '<7.0') or cmd_output.length() == 0
+ foreach marg: machine[2]
+ if marg[0] == 'default'
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ else
+ foreach marg: machine[2]
+ if marg[0] == cmd_output[3]
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ endif
endif
+message(machine_args)
-if cc.get_define('__ARM_NEON', args: march_opt) != ''
+if cc.get_define('__ARM_NEON', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
endif
-if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
endif
-if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
diff --git a/config/meson.build b/config/meson.build
index fa55c53a5..f8c67578d 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -8,7 +8,8 @@ else
machine = get_option('machine')
endif
dpdk_conf.set('RTE_MACHINE', machine)
-machine_arg = '-march=' + machine
+machine_args = []
+machine_args += '-march=' + machine
# use pthreads
add_project_link_arguments('-pthread', language: 'c')
@@ -53,6 +54,14 @@ foreach arg: warning_flags
endif
endforeach
+# set other values pulled from the build options
+dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
+dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
+dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
+dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
+# values which have defaults which may be overridden
+dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
+
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
@@ -65,12 +74,4 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
-# set other values pulled from the build options
-dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
-dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
-dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
-dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
-# values which have defaults which may be overridden
-dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
-
install_headers('rte_config.h', subdir: get_option('include_subdir_arch'))
diff --git a/drivers/meson.build b/drivers/meson.build
index 9b5039847..1d6430bfe 100644
--- a/drivers/meson.build
+++ b/drivers/meson.build
@@ -22,7 +22,7 @@ foreach class:driver_classes
version = 1
sources = []
objs = []
- cflags = [machine_arg]
+ cflags = machine_args
includes = [include_directories(drv_path)]
# set up internal deps. Drivers can append/override as necessary
deps = std_deps
diff --git a/examples/meson.build b/examples/meson.build
index 0abed7169..b3f997242 100644
--- a/examples/meson.build
+++ b/examples/meson.build
@@ -9,7 +9,7 @@ endif
foreach example: get_option('examples').split(',')
name = example
sources = []
- cflags = [machine_arg]
+ cflags = machine_args
ext_deps = []
includes = [include_directories(example)]
deps = ['eal', 'mempool', 'net', 'mbuf', 'ethdev', 'cmdline']
diff --git a/lib/meson.build b/lib/meson.build
index 0c94d74b9..b9ea6f61b 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -31,7 +31,7 @@ foreach l:libraries
sources = []
headers = []
includes = []
- cflags = [machine_arg]
+ cflags = machine_args
objs = [] # other object files to link against, used e.g. for
# instruction-set optimized versions of code
diff --git a/meson.build b/meson.build
index 3dce8579e..326fbc7d1 100644
--- a/meson.build
+++ b/meson.build
@@ -66,5 +66,5 @@ pkg.generate(name: meson.project_name(),
['-Wl,-Bdynamic'] + dpdk_extra_ldflags,
description: 'The Data Plane Development Kit (DPDK)',
subdirs: [get_option('include_subdir_arch'), '.'],
- extra_cflags: ['-include "rte_config.h"', machine_arg]
+ extra_cflags: ['-include "rte_config.h"'] + machine_args
)
diff --git a/test/test/meson.build b/test/test/meson.build
index 1863c603c..873efbc07 100644
--- a/test/test/meson.build
+++ b/test/test/meson.build
@@ -204,7 +204,7 @@ if get_option('tests')
test_sources,
link_whole: link_libs,
dependencies: test_dep_objs,
- c_args: machine_arg,
+ c_args: machine_args,
install_rpath: driver_install_path,
install: false)
--
2.16.0
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
2018-01-22 11:46 ` [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM Pavan Nikhilesh
@ 2018-01-22 12:30 ` Bruce Richardson
2018-01-22 12:37 ` Pavan Nikhilesh
0 siblings, 1 reply; 30+ messages in thread
From: Bruce Richardson @ 2018-01-22 12:30 UTC (permalink / raw)
To: Pavan Nikhilesh
Cc: jerin.jacob, harry.van.haaren, herbert.guan, hemant.agrawal, dev
On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote:
> Added support for detecting march and mcpu by reading midr_el1 register.
> The implementer, primary part number values read can be used to figure
> out the underlying arm cpu.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> ---
> app/test-pmd/meson.build | 2 +-
> config/arm/armv8_machine.py | 18 +++++++++
> config/arm/meson.build | 95 +++++++++++++++++++++++++++++++++++++++++----
> config/meson.build | 19 ++++-----
> drivers/meson.build | 2 +-
> examples/meson.build | 2 +-
> lib/meson.build | 2 +-
> meson.build | 2 +-
> test/test/meson.build | 2 +-
> 9 files changed, 121 insertions(+), 23 deletions(-)
> create mode 100755 config/arm/armv8_machine.py
>
> diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
> index e819677a5..2a3f0ba1f 100644
> --- a/app/test-pmd/meson.build
> +++ b/app/test-pmd/meson.build
> @@ -45,7 +45,7 @@ endif
>
> executable('dpdk-testpmd',
> sources,
> - c_args: machine_arg,
> + c_args: machine_args,
> link_whole: link_libs,
> dependencies: dep_objs,
> install_rpath: join_paths(get_option('prefix'), driver_install_path),
> diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
> new file mode 100755
> index 000000000..404866d2f
> --- /dev/null
> +++ b/config/arm/armv8_machine.py
> @@ -0,0 +1,18 @@
> +#!/usr/bin/python
> +# SPDX-License-Identifier: BSD-3-Clause
> +# Copyright(c) 2017 Cavium, Inc
> +
> +ident = []
> +fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
> +with open(fname) as f:
> + content = f.read()
> +
> +midr_el1 = (int(content.rstrip('\n'), 16))
> +
> +ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
> +ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
> +ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
> +ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
> +ident.append(hex(midr_el1 & 0xF)) # Revision
> +
> +print(' '.join(ident))
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index f05de4c2c..212b94499 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -5,28 +5,107 @@
> # for checking defines we need to use the correct compiler flags
> march_opt = '-march=@0@'.format(machine)
>
> -dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
> -if cc.sizeof('void *') == 8
> - dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
> - dpdk_conf.set('RTE_ARCH_ARM64', 1)
> - dpdk_conf.set('RTE_ARCH_64', 1)
> +machine_args_generic = [
> + ['default', ['-march=armv8-a+crc+crypto']]]
> +machine_args_cavium = [
> + ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
> + ['0xa1', ['-mcpu=thunderxt88']],
> + ['0xa2', ['-mcpu=thunderxt81']],
> + ['0xa3', ['-mcpu=thunderxt83']]]
> +
> +flags_generic = [[]]
> +flags_cavium = [
> + ['RTE_MACHINE', '"thunderx"'],
> + ['RTE_CACHE_LINE_SIZE', 128],
> + ['RTE_MAX_NUMA_NODES', 2],
> + ['RTE_MAX_LCORE', 96],
> + ['RTE_MAX_VFIO_GROUPS', 128],
> + ['RTE_RING_USE_C11_MEM_MODEL', false]]
> +
> +impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
> +impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
> +
> +if cc.get_define('__clang__') != ''
> + dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'clang')
> + dpdk_conf.set('RTE_TOOLCHAIN_CLANG', 1)
> else
> + dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc')
> + dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
> +endif
> +
> +dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
> +
> +if cc.sizeof('void *') != 8
> dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
> dpdk_conf.set('RTE_ARCH_ARM', 1)
> dpdk_conf.set('RTE_ARCH_ARMv7', 1)
> +else
> + dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
> + dpdk_conf.set('RTE_ARCH_ARM64', 1)
> + dpdk_conf.set('RTE_ARCH_64', 1)
> +
> + machine = []
> + cmd_generic = ['generic', '', '', 'default', '']
> + cmd_output = cmd_generic # Set generic by default
> + machine_args = [] # Clear previous machine args
> + if not meson.is_cross_build()
> + # The script returns ['Implementer', 'Variant', 'Architecture',
> + # 'Primary Part number', 'Revision']
> + detect_vendor = find_program(join_paths(
> + meson.current_source_dir(), 'armv8_machine.py'))
> + cmd = run_command(detect_vendor.path())
> + if cmd.returncode() == 0
> + cmd_output = cmd.stdout().strip().split(' ')
> + endif
> + # Set to generic if variable is not found
> + machine = get_variable('impl_' + cmd_output[0], 'generic')
> + endif
> +
> + if machine == 'generic'
> + machine = impl_generic
> + cmd_output = cmd_generic
> + endif
> +
> + message('Implementer : ' + machine[0])
When cross-compiling for arm I get an error at this line:
Meson encountered an error in file config/arm/meson.build, line 69, column 1:
Index 0 out of bounds of array of size 0.
Regards,
/Bruce
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
2018-01-22 12:30 ` Bruce Richardson
@ 2018-01-22 12:37 ` Pavan Nikhilesh
2018-01-22 14:09 ` Bruce Richardson
0 siblings, 1 reply; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-22 12:37 UTC (permalink / raw)
To: Bruce Richardson, jerin.jacob, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev
On Mon, Jan 22, 2018 at 12:30:53PM +0000, Bruce Richardson wrote:
> On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote:
> > Added support for detecting march and mcpu by reading midr_el1 register.
> > The implementer, primary part number values read can be used to figure
> > out the underlying arm cpu.
> >
> > Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > ---
> > app/test-pmd/meson.build | 2 +-
> > config/arm/armv8_machine.py | 18 +++++++++
> > config/arm/meson.build | 95 +++++++++++++++++++++++++++++++++++++++++----
> > config/meson.build | 19 ++++-----
> > drivers/meson.build | 2 +-
> > examples/meson.build | 2 +-
> > lib/meson.build | 2 +-
> > meson.build | 2 +-
> > test/test/meson.build | 2 +-
> > 9 files changed, 121 insertions(+), 23 deletions(-)
> > create mode 100755 config/arm/armv8_machine.py
> >
<snip>
> > +
> > + if machine == 'generic'
> > + machine = impl_generic
> > + cmd_output = cmd_generic
> > + endif
> > +
> > + message('Implementer : ' + machine[0])
>
> When cross-compiling for arm I get an error at this line:
>
> Meson encountered an error in file config/arm/meson.build, line 69, column 1:
> Index 0 out of bounds of array of size 0.
>
Will be sending v2 of the cross patch soon(once directory structure and file
name is fininlized) that would resolve this issue.
> Regards,
> /Bruce
Thanks,
Pavan.
>
>
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
2018-01-22 12:37 ` Pavan Nikhilesh
@ 2018-01-22 14:09 ` Bruce Richardson
2018-01-22 14:44 ` Pavan Nikhilesh
0 siblings, 1 reply; 30+ messages in thread
From: Bruce Richardson @ 2018-01-22 14:09 UTC (permalink / raw)
To: Pavan Nikhilesh
Cc: jerin.jacob, harry.van.haaren, herbert.guan, hemant.agrawal, dev
On Mon, Jan 22, 2018 at 06:07:18PM +0530, Pavan Nikhilesh wrote:
> On Mon, Jan 22, 2018 at 12:30:53PM +0000, Bruce Richardson wrote:
> > On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote:
> > > Added support for detecting march and mcpu by reading midr_el1
> > > register. The implementer, primary part number values read can be
> > > used to figure out the underlying arm cpu.
> > >
> > > Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > > --- app/test-pmd/meson.build | 2 +-
> > > config/arm/armv8_machine.py | 18 +++++++++ config/arm/meson.build
> > > | 95 +++++++++++++++++++++++++++++++++++++++++----
> > > config/meson.build | 19 ++++----- drivers/meson.build
> > > | 2 +- examples/meson.build | 2 +- lib/meson.build
> > > | 2 +- meson.build | 2 +- test/test/meson.build
> > > | 2 +- 9 files changed, 121 insertions(+), 23 deletions(-) create
> > > mode 100755 config/arm/armv8_machine.py
> > >
> <snip>
> > > + + if machine == 'generic' + machine =
> > > impl_generic + cmd_output = cmd_generic + endif +
> > > + message('Implementer : ' + machine[0])
> >
> > When cross-compiling for arm I get an error at this line:
> >
> > Meson encountered an error in file config/arm/meson.build, line
> > 69, column 1: Index 0 out of bounds of array of size 0.
> >
> Will be sending v2 of the cross patch soon(once directory structure
> and file name is fininlized) that would resolve this issue.
>
So is there an expected patch ordering here? I believe the set for
adding Octeon drivers to build is ok to merge, though there is a small
change for renaming machine_arg to machine_args in it if these patches
are not applied first. Will I take that set, if my recent rebase on top
of mainline has not broken it, and you can rebase these to take account
of that extra driver?
/Bruce
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v5 2/2] build: add support for detecting march on ARM
2018-01-22 14:09 ` Bruce Richardson
@ 2018-01-22 14:44 ` Pavan Nikhilesh
0 siblings, 0 replies; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-22 14:44 UTC (permalink / raw)
To: Bruce Richardson, jerin.jacob, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev
On Mon, Jan 22, 2018 at 02:09:28PM +0000, Bruce Richardson wrote:
> On Mon, Jan 22, 2018 at 06:07:18PM +0530, Pavan Nikhilesh wrote:
> > On Mon, Jan 22, 2018 at 12:30:53PM +0000, Bruce Richardson wrote:
> > > On Mon, Jan 22, 2018 at 05:16:49PM +0530, Pavan Nikhilesh wrote:
> > > > Added support for detecting march and mcpu by reading midr_el1
> > > > register. The implementer, primary part number values read can be
> > > > used to figure out the underlying arm cpu.
> > > >
> > > > Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > > > --- app/test-pmd/meson.build | 2 +-
> > > > config/arm/armv8_machine.py | 18 +++++++++ config/arm/meson.build
> > > > | 95 +++++++++++++++++++++++++++++++++++++++++----
> > > > config/meson.build | 19 ++++----- drivers/meson.build
> > > > | 2 +- examples/meson.build | 2 +- lib/meson.build
> > > > | 2 +- meson.build | 2 +- test/test/meson.build
> > > > | 2 +- 9 files changed, 121 insertions(+), 23 deletions(-) create
> > > > mode 100755 config/arm/armv8_machine.py
> > > >
> > <snip>
> > > > + + if machine == 'generic' + machine =
> > > > impl_generic + cmd_output = cmd_generic + endif +
> > > > + message('Implementer : ' + machine[0])
> > >
> > > When cross-compiling for arm I get an error at this line:
> > >
> > > Meson encountered an error in file config/arm/meson.build, line
> > > 69, column 1: Index 0 out of bounds of array of size 0.
> > >
> > Will be sending v2 of the cross patch soon(once directory structure
> > and file name is fininlized) that would resolve this issue.
> >
> So is there an expected patch ordering here? I believe the set for
> adding Octeon drivers to build is ok to merge, though there is a small
> change for renaming machine_arg to machine_args in it if these patches
> are not applied first. Will I take that set, if my recent rebase on top
> of mainline has not broken it, and you can rebase these to take account
> of that extra driver?
Now that the cross files naming and directory structure is agreed upon I will
merge the patches as a single set and send it fixing the machine_args part for
app/test-eventdev.
>
> /Bruce
Thanks,
Pavan.
^ permalink raw reply [flat|nested] 30+ messages in thread
* [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
2017-12-19 10:53 [dpdk-dev] [RFC PATCH] RFC build: prototype support for ARM builds Bruce Richardson
` (4 preceding siblings ...)
2018-01-22 11:46 ` [dpdk-dev] [PATCH v5 1/2] build: add support for ARM builds Pavan Nikhilesh
@ 2018-01-22 15:26 ` Pavan Nikhilesh
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 2/4] build: add support for detecting march on ARM Pavan Nikhilesh
` (4 more replies)
5 siblings, 5 replies; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-22 15:26 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev, Pavan Nikhilesh
From: Bruce Richardson <bruce.richardson@intel.com>
Add files to enable compiling for ARM native/cross builds.
This can be tested by doing a cross-compile for armv8-a type using
the linaro gcc toolchain.
meson arm-build --cross-file aarch64_cross.txt
ninja -C arm-build
where aarch64_cross.txt contained the following
[binaries]
c = 'aarch64-linux-gnu-gcc'
cpp = 'aarch64-linux-gnu-cpp'
ar = 'aarch64-linux-gnu-ar'
[host_machine]
system = 'linux'
cpu_family = 'aarch64'
cpu = 'armv8-a'
endian = 'little'
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
v6 Changes:
- add documentation for cross compiling with meson
- rebase onto master
- fix commit logs
v5 Changes:
- Use generic_armv8 config when script returns unknows machine args
v4 Changes:
- use set_quoted to set config instead of explicitly using quotes.
v3 Changes:
- Fix missing SPDX license tags
v2 Changes:
- Merged RFC patch.
- Added framework to easily other vendor specific flags
- renamed machine_arg to machine_args
config/arm/meson.build | 36 ++++++++++++++++++++++
config/meson.build | 4 ++-
lib/librte_eal/common/arch/arm/meson.build | 5 +++
lib/librte_eal/common/include/arch/arm/meson.build | 29 +++++++++++++++++
4 files changed, 73 insertions(+), 1 deletion(-)
create mode 100644 config/arm/meson.build
create mode 100644 lib/librte_eal/common/arch/arm/meson.build
create mode 100644 lib/librte_eal/common/include/arch/arm/meson.build
diff --git a/config/arm/meson.build b/config/arm/meson.build
new file mode 100644
index 000000000..f05de4c2c
--- /dev/null
+++ b/config/arm/meson.build
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+# Copyright(c) 2017 Cavium, Inc
+
+# for checking defines we need to use the correct compiler flags
+march_opt = '-march=@0@'.format(machine)
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+if cc.sizeof('void *') == 8
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
+ dpdk_conf.set('RTE_ARCH_ARM', 1)
+ dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+endif
+
+if cc.get_define('__ARM_NEON', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
+endif
+
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
+ dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA2', 1)
+ compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
+ 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
+endif
diff --git a/config/meson.build b/config/meson.build
index 95223042f..fa55c53a5 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -56,8 +56,10 @@ endforeach
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
- subdir(arch_subdir)
+elif host_machine.cpu_family().startswith('arm') or host_machine.cpu_family().startswith('aarch')
+ arch_subdir = 'arm'
endif
+subdir(arch_subdir)
dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
diff --git a/lib/librte_eal/common/arch/arm/meson.build b/lib/librte_eal/common/arch/arm/meson.build
new file mode 100644
index 000000000..c6bd92272
--- /dev/null
+++ b/lib/librte_eal/common/arch/arm/meson.build
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+eal_common_arch_sources = files('rte_cpuflags.c',
+ 'rte_cycles.c')
diff --git a/lib/librte_eal/common/include/arch/arm/meson.build b/lib/librte_eal/common/include/arch/arm/meson.build
new file mode 100644
index 000000000..77893fa35
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/meson.build
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation.
+
+install_headers(
+ 'rte_atomic_32.h',
+ 'rte_atomic_64.h',
+ 'rte_atomic.h',
+ 'rte_byteorder.h',
+ 'rte_cpuflags_32.h',
+ 'rte_cpuflags_64.h',
+ 'rte_cpuflags.h',
+ 'rte_cycles_32.h',
+ 'rte_cycles_64.h',
+ 'rte_cycles.h',
+ 'rte_io_64.h',
+ 'rte_io.h',
+ 'rte_memcpy_32.h',
+ 'rte_memcpy_64.h',
+ 'rte_memcpy.h',
+ 'rte_pause_32.h',
+ 'rte_pause_64.h',
+ 'rte_pause.h',
+ 'rte_prefetch_32.h',
+ 'rte_prefetch_64.h',
+ 'rte_prefetch.h',
+ 'rte_rwlock.h',
+ 'rte_spinlock.h',
+ 'rte_vect.h',
+ subdir: get_option('include_subdir_arch'))
--
2.16.0
^ permalink raw reply [flat|nested] 30+ messages in thread* [dpdk-dev] [PATCH v6 2/4] build: add support for detecting march on ARM
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds Pavan Nikhilesh
@ 2018-01-22 15:26 ` Pavan Nikhilesh
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 3/4] build: add support for vendor specific ARM cross builds Pavan Nikhilesh
` (3 subsequent siblings)
4 siblings, 0 replies; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-22 15:26 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev, Pavan Nikhilesh
Added support for detecting march and mcpu by reading midr_el1 register.
The implementer, primary part number values read can be used to figure
out the underlying arm cpu.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
app/test-eventdev/meson.build | 2 +-
app/test-pmd/meson.build | 2 +-
config/arm/armv8_machine.py | 18 ++++++++
config/arm/meson.build | 98 +++++++++++++++++++++++++++++++++++++++----
config/meson.build | 19 +++++----
drivers/meson.build | 2 +-
examples/meson.build | 2 +-
lib/meson.build | 2 +-
meson.build | 2 +-
test/test/meson.build | 2 +-
10 files changed, 125 insertions(+), 24 deletions(-)
create mode 100755 config/arm/armv8_machine.py
diff --git a/app/test-eventdev/meson.build b/app/test-eventdev/meson.build
index 1dd954539..5beaa0070 100644
--- a/app/test-eventdev/meson.build
+++ b/app/test-eventdev/meson.build
@@ -21,7 +21,7 @@ endif
executable('dpdk-test-eventdev',
sources,
- c_args: machine_arg,
+ c_args: machine_args,
link_whole: link_libs,
dependencies: dep_objs,
install_rpath: join_paths(get_option('prefix'), driver_install_path),
diff --git a/app/test-pmd/meson.build b/app/test-pmd/meson.build
index e819677a5..2a3f0ba1f 100644
--- a/app/test-pmd/meson.build
+++ b/app/test-pmd/meson.build
@@ -45,7 +45,7 @@ endif
executable('dpdk-testpmd',
sources,
- c_args: machine_arg,
+ c_args: machine_args,
link_whole: link_libs,
dependencies: dep_objs,
install_rpath: join_paths(get_option('prefix'), driver_install_path),
diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py
new file mode 100755
index 000000000..404866d2f
--- /dev/null
+++ b/config/arm/armv8_machine.py
@@ -0,0 +1,18 @@
+#!/usr/bin/python
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Cavium, Inc
+
+ident = []
+fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1'
+with open(fname) as f:
+ content = f.read()
+
+midr_el1 = (int(content.rstrip('\n'), 16))
+
+ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer
+ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant
+ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture
+ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number
+ident.append(hex(midr_el1 & 0xF)) # Revision
+
+print(' '.join(ident))
diff --git a/config/arm/meson.build b/config/arm/meson.build
index f05de4c2c..a5bfb9610 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -5,28 +5,110 @@
# for checking defines we need to use the correct compiler flags
march_opt = '-march=@0@'.format(machine)
-dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
-if cc.sizeof('void *') == 8
- dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
- dpdk_conf.set('RTE_ARCH_ARM64', 1)
- dpdk_conf.set('RTE_ARCH_64', 1)
+machine_args_generic = [
+ ['default', ['-march=armv8-a+crc+crypto']]]
+machine_args_cavium = [
+ ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
+ ['0xa1', ['-mcpu=thunderxt88']],
+ ['0xa2', ['-mcpu=thunderxt81']],
+ ['0xa3', ['-mcpu=thunderxt83']]]
+
+flags_generic = [[]]
+flags_cavium = [
+ ['RTE_MACHINE', '"thunderx"'],
+ ['RTE_CACHE_LINE_SIZE', 128],
+ ['RTE_MAX_NUMA_NODES', 2],
+ ['RTE_MAX_LCORE', 96],
+ ['RTE_MAX_VFIO_GROUPS', 128],
+ ['RTE_RING_USE_C11_MEM_MODEL', false]]
+
+impl_generic = ['Generic armv8', flags_generic, machine_args_generic]
+impl_0x43 = ['Cavium', flags_cavium, machine_args_cavium]
+
+if cc.get_define('__clang__') != ''
+ dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'clang')
+ dpdk_conf.set('RTE_TOOLCHAIN_CLANG', 1)
else
+ dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc')
+ dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1)
+endif
+
+dpdk_conf.set('RTE_FORCE_INTRINSICS', 1)
+
+if cc.sizeof('void *') != 8
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)
dpdk_conf.set('RTE_ARCH_ARM', 1)
dpdk_conf.set('RTE_ARCH_ARMv7', 1)
+else
+ dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128)
+ dpdk_conf.set('RTE_ARCH_ARM64', 1)
+ dpdk_conf.set('RTE_ARCH_64', 1)
+
+ machine = []
+ cmd_generic = ['generic', '', '', 'default', '']
+ cmd_output = cmd_generic # Set generic by default
+ machine_args = [] # Clear previous machine args
+ if not meson.is_cross_build()
+ # The script returns ['Implementer', 'Variant', 'Architecture',
+ # 'Primary Part number', 'Revision']
+ detect_vendor = find_program(join_paths(
+ meson.current_source_dir(), 'armv8_machine.py'))
+ cmd = run_command(detect_vendor.path())
+ if cmd.returncode() == 0
+ cmd_output = cmd.stdout().strip().split(' ')
+ endif
+ # Set to generic if variable is not found
+ machine = get_variable('impl_' + cmd_output[0], 'generic')
+ else
+ impl_id = meson.get_cross_property('implementor_id', 'generic')
+ machine = get_variable('impl_' + impl_id)
+ endif
+
+ if machine == 'generic'
+ machine = impl_generic
+ cmd_output = cmd_generic
+ endif
+
+ message('Implementer : ' + machine[0])
+ foreach flag: machine[1]
+ if flag.length() > 0
+ dpdk_conf.set(flag[0], flag[1])
+ endif
+ endforeach
+ # Primary part number based mcpu flags are supported
+ # for gcc versions > 7
+ if cc.version().version_compare(
+ '<7.0') or cmd_output.length() == 0
+ foreach marg: machine[2]
+ if marg[0] == 'default'
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ else
+ foreach marg: machine[2]
+ if marg[0] == cmd_output[3]
+ foreach f: marg[1]
+ machine_args += f
+ endforeach
+ endif
+ endforeach
+ endif
endif
+message(machine_args)
-if cc.get_define('__ARM_NEON', args: march_opt) != ''
+if cc.get_define('__ARM_NEON', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_NEON']
endif
-if cc.get_define('__ARM_FEATURE_CRC32', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_CRC32', 1)
compile_time_cpuflags += ['RTE_CPUFLAG_CRC32']
endif
-if cc.get_define('__ARM_FEATURE_CRYPTO', args: march_opt) != ''
+if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
dpdk_conf.set('RTE_MACHINE_CPUFLAG_AES', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_PMULL', 1)
dpdk_conf.set('RTE_MACHINE_CPUFLAG_SHA1', 1)
diff --git a/config/meson.build b/config/meson.build
index fa55c53a5..f8c67578d 100644
--- a/config/meson.build
+++ b/config/meson.build
@@ -8,7 +8,8 @@ else
machine = get_option('machine')
endif
dpdk_conf.set('RTE_MACHINE', machine)
-machine_arg = '-march=' + machine
+machine_args = []
+machine_args += '-march=' + machine
# use pthreads
add_project_link_arguments('-pthread', language: 'c')
@@ -53,6 +54,14 @@ foreach arg: warning_flags
endif
endforeach
+# set other values pulled from the build options
+dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
+dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
+dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
+dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
+# values which have defaults which may be overridden
+dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
+
compile_time_cpuflags = []
if host_machine.cpu_family().startswith('x86')
arch_subdir = 'x86'
@@ -65,12 +74,4 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags))
# set the install path for the drivers
dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path)
-# set other values pulled from the build options
-dpdk_conf.set('RTE_MAX_LCORE', get_option('max_lcores'))
-dpdk_conf.set('RTE_MAX_NUMA_NODES', get_option('max_numa_nodes'))
-dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet'))
-dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id'))
-# values which have defaults which may be overridden
-dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64)
-
install_headers('rte_config.h', subdir: get_option('include_subdir_arch'))
diff --git a/drivers/meson.build b/drivers/meson.build
index 26dfe72a2..604384f07 100644
--- a/drivers/meson.build
+++ b/drivers/meson.build
@@ -27,7 +27,7 @@ foreach class:driver_classes
version = 1
sources = []
objs = []
- cflags = [machine_arg]
+ cflags = machine_args
includes = [include_directories(drv_path)]
# set up internal deps. Drivers can append/override as necessary
deps = std_deps
diff --git a/examples/meson.build b/examples/meson.build
index 0abed7169..b3f997242 100644
--- a/examples/meson.build
+++ b/examples/meson.build
@@ -9,7 +9,7 @@ endif
foreach example: get_option('examples').split(',')
name = example
sources = []
- cflags = [machine_arg]
+ cflags = machine_args
ext_deps = []
includes = [include_directories(example)]
deps = ['eal', 'mempool', 'net', 'mbuf', 'ethdev', 'cmdline']
diff --git a/lib/meson.build b/lib/meson.build
index 6c062556e..7cdf3332a 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -32,7 +32,7 @@ foreach l:libraries
sources = []
headers = []
includes = []
- cflags = [machine_arg]
+ cflags = machine_args
objs = [] # other object files to link against, used e.g. for
# instruction-set optimized versions of code
diff --git a/meson.build b/meson.build
index e63144490..b41cc812e 100644
--- a/meson.build
+++ b/meson.build
@@ -66,5 +66,5 @@ pkg.generate(name: meson.project_name(),
['-Wl,-Bdynamic'] + dpdk_extra_ldflags,
description: 'The Data Plane Development Kit (DPDK)',
subdirs: [get_option('include_subdir_arch'), '.'],
- extra_cflags: ['-include "rte_config.h"', machine_arg]
+ extra_cflags: ['-include "rte_config.h"'] + machine_args
)
diff --git a/test/test/meson.build b/test/test/meson.build
index 2501b59d4..fb6079d86 100644
--- a/test/test/meson.build
+++ b/test/test/meson.build
@@ -202,7 +202,7 @@ if get_option('tests')
test_sources,
link_whole: link_libs,
dependencies: test_dep_objs,
- c_args: machine_arg,
+ c_args: machine_args,
install_rpath: driver_install_path,
install: false)
--
2.16.0
^ permalink raw reply [flat|nested] 30+ messages in thread* [dpdk-dev] [PATCH v6 3/4] build: add support for vendor specific ARM cross builds
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds Pavan Nikhilesh
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 2/4] build: add support for detecting march on ARM Pavan Nikhilesh
@ 2018-01-22 15:26 ` Pavan Nikhilesh
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 4/4] doc: add instructions to cross compile using meson Pavan Nikhilesh
` (2 subsequent siblings)
4 siblings, 0 replies; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-22 15:26 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev, Pavan Nikhilesh
Add various vendor specific cross build targets.
This can be verified by using linaro toolchain and running
meson build --cross-file config/arm/arm64_<cpu>_<platform>_<compiler>
In future more cross build targets can be added.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
config/arm/arm64_armv8_linuxapp_gcc | 10 ++++++++++
config/arm/arm64_thunderx_linuxapp_gcc | 13 +++++++++++++
2 files changed, 23 insertions(+)
create mode 100644 config/arm/arm64_armv8_linuxapp_gcc
create mode 100644 config/arm/arm64_thunderx_linuxapp_gcc
diff --git a/config/arm/arm64_armv8_linuxapp_gcc b/config/arm/arm64_armv8_linuxapp_gcc
new file mode 100644
index 000000000..3b4d3c469
--- /dev/null
+++ b/config/arm/arm64_armv8_linuxapp_gcc
@@ -0,0 +1,10 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
diff --git a/config/arm/arm64_thunderx_linuxapp_gcc b/config/arm/arm64_thunderx_linuxapp_gcc
new file mode 100644
index 000000000..7ff34af74
--- /dev/null
+++ b/config/arm/arm64_thunderx_linuxapp_gcc
@@ -0,0 +1,13 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+implementor_id = '0x43'
--
2.16.0
^ permalink raw reply [flat|nested] 30+ messages in thread* [dpdk-dev] [PATCH v6 4/4] doc: add instructions to cross compile using meson
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds Pavan Nikhilesh
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 2/4] build: add support for detecting march on ARM Pavan Nikhilesh
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 3/4] build: add support for vendor specific ARM cross builds Pavan Nikhilesh
@ 2018-01-22 15:26 ` Pavan Nikhilesh
2018-01-22 16:10 ` [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds Bruce Richardson
2018-01-22 16:20 ` Jerin Jacob
4 siblings, 0 replies; 30+ messages in thread
From: Pavan Nikhilesh @ 2018-01-22 15:26 UTC (permalink / raw)
To: jerin.jacob, bruce.richardson, harry.van.haaren, herbert.guan,
hemant.agrawal
Cc: dev, Pavan Nikhilesh
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
---
doc/build-sdk-meson.txt | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/doc/build-sdk-meson.txt b/doc/build-sdk-meson.txt
index b5573f7a7..9618e759e 100644
--- a/doc/build-sdk-meson.txt
+++ b/doc/build-sdk-meson.txt
@@ -150,6 +150,33 @@ driver install path, so dynamically-linked applications can be run without
having to pass in ``-d /path/to/driver`` options for standard drivers.
+Cross Compiling DPDK
+--------------------
+
+To cross-compile DPDK on a desired target machine we can use the following
+command::
+
+ meson cross-build --cross-file <target_machine_configuration>
+
+For example if the target machine is arm64 we can use the following
+command::
+ meson arm-build --cross-file config/arm/arm64_armv8_linuxapp_gcc
+
+where config/arm/arm64_armv8_linuxapp_gcc contains the following
+parameters::
+
+ [binaries]
+ c = 'aarch64-linux-gnu-gcc'
+ cpp = 'aarch64-linux-gnu-cpp'
+ ar = 'aarch64-linux-gnu-ar'
+
+ [host_machine]
+ system = 'linux'
+ cpu_family = 'aarch64'
+ cpu = 'armv8-a'
+ endian = 'little'
+
+
Using the DPDK within an Application
-------------------------------------
--
2.16.0
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds Pavan Nikhilesh
` (2 preceding siblings ...)
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 4/4] doc: add instructions to cross compile using meson Pavan Nikhilesh
@ 2018-01-22 16:10 ` Bruce Richardson
2018-01-22 16:20 ` Jerin Jacob
4 siblings, 0 replies; 30+ messages in thread
From: Bruce Richardson @ 2018-01-22 16:10 UTC (permalink / raw)
To: Pavan Nikhilesh
Cc: jerin.jacob, harry.van.haaren, herbert.guan, hemant.agrawal, dev
On Mon, Jan 22, 2018 at 08:56:29PM +0530, Pavan Nikhilesh wrote:
> From: Bruce Richardson <bruce.richardson@intel.com>
>
> Add files to enable compiling for ARM native/cross builds.
> This can be tested by doing a cross-compile for armv8-a type using
> the linaro gcc toolchain.
>
> meson arm-build --cross-file aarch64_cross.txt
> ninja -C arm-build
>
> where aarch64_cross.txt contained the following
>
> [binaries]
> c = 'aarch64-linux-gnu-gcc'
> cpp = 'aarch64-linux-gnu-cpp'
> ar = 'aarch64-linux-gnu-ar'
>
> [host_machine]
> system = 'linux'
> cpu_family = 'aarch64'
> cpu = 'armv8-a'
> endian = 'little'
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> ---
Set LGTM. No issues in my cross-compilation testing.
I'd appreciate a final Ack from someone more familiar with ARM than me
before applying.
Thanks,
/Bruce
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
2018-01-22 15:26 ` [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds Pavan Nikhilesh
` (3 preceding siblings ...)
2018-01-22 16:10 ` [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds Bruce Richardson
@ 2018-01-22 16:20 ` Jerin Jacob
2018-01-22 16:26 ` Bruce Richardson
4 siblings, 1 reply; 30+ messages in thread
From: Jerin Jacob @ 2018-01-22 16:20 UTC (permalink / raw)
To: Pavan Nikhilesh
Cc: bruce.richardson, harry.van.haaren, herbert.guan, hemant.agrawal, dev
-----Original Message-----
> Date: Mon, 22 Jan 2018 20:56:29 +0530
> From: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> To: jerin.jacob@caviumnetworks.com, bruce.richardson@intel.com,
> harry.van.haaren@intel.com, herbert.guan@arm.com, hemant.agrawal@nxp.com
> Cc: dev@dpdk.org, Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> Subject: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
> X-Mailer: git-send-email 2.14.1
>
> From: Bruce Richardson <bruce.richardson@intel.com>
>
> Add files to enable compiling for ARM native/cross builds.
> This can be tested by doing a cross-compile for armv8-a type using
> the linaro gcc toolchain.
>
> meson arm-build --cross-file aarch64_cross.txt
> ninja -C arm-build
>
> where aarch64_cross.txt contained the following
>
> [binaries]
> c = 'aarch64-linux-gnu-gcc'
> cpp = 'aarch64-linux-gnu-cpp'
> ar = 'aarch64-linux-gnu-ar'
>
> [host_machine]
> system = 'linux'
> cpu_family = 'aarch64'
> cpu = 'armv8-a'
> endian = 'little'
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Series Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
2018-01-22 16:20 ` Jerin Jacob
@ 2018-01-22 16:26 ` Bruce Richardson
0 siblings, 0 replies; 30+ messages in thread
From: Bruce Richardson @ 2018-01-22 16:26 UTC (permalink / raw)
To: Jerin Jacob
Cc: Pavan Nikhilesh, harry.van.haaren, herbert.guan, hemant.agrawal, dev
On Mon, Jan 22, 2018 at 09:50:04PM +0530, Jerin Jacob wrote:
> -----Original Message-----
> > Date: Mon, 22 Jan 2018 20:56:29 +0530
> > From: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > To: jerin.jacob@caviumnetworks.com, bruce.richardson@intel.com,
> > harry.van.haaren@intel.com, herbert.guan@arm.com, hemant.agrawal@nxp.com
> > Cc: dev@dpdk.org, Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
> > Subject: [dpdk-dev] [PATCH v6 1/4] build: add support for ARM builds
> > X-Mailer: git-send-email 2.14.1
> >
> > From: Bruce Richardson <bruce.richardson@intel.com>
> >
> > Add files to enable compiling for ARM native/cross builds.
> > This can be tested by doing a cross-compile for armv8-a type using
> > the linaro gcc toolchain.
> >
> > meson arm-build --cross-file aarch64_cross.txt
> > ninja -C arm-build
> >
> > where aarch64_cross.txt contained the following
> >
> > [binaries]
> > c = 'aarch64-linux-gnu-gcc'
> > cpp = 'aarch64-linux-gnu-cpp'
> > ar = 'aarch64-linux-gnu-ar'
> >
> > [host_machine]
> > system = 'linux'
> > cpu_family = 'aarch64'
> > cpu = 'armv8-a'
> > endian = 'little'
> >
> > Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> > Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
>
> Series Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
>
Applied to dpdk-next-build.
Thanks,
/Bruce
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