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Mon, 25 Mar 2019 07:44:10 +0000 From: Slava Ovsiienko To: Shahaf Shuler , "dev@dpdk.org" Thread-Topic: [PATCH 14/14] net/mlx5: add source vport match to the ingress rules Thread-Index: AQHU39++4AjtEJh4pUyzk70yNW+HRKYWH4EwgARkkYCAAXeR4A== Date: Mon, 25 Mar 2019 07:44:09 +0000 Message-ID: References: <1551376985-11096-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-15-git-send-email-viacheslavo@mellanox.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=viacheslavo@mellanox.com; x-originating-ip: [95.67.35.250] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c2280bd4-189c-474c-776b-08d6b0f5aafa x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: c2280bd4-189c-474c-776b-08d6b0f5aafa X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Mar 2019 07:44:10.0050 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR05MB3123 Subject: Re: [dpdk-dev] [PATCH 14/14] net/mlx5: add source vport match to the ingress rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 25 Mar 2019 07:44:12 -0000 > -----Original Message----- > From: Shahaf Shuler > Sent: Sunday, March 24, 2019 11:14 > To: Slava Ovsiienko ; dev@dpdk.org > Subject: RE: [PATCH 14/14] net/mlx5: add source vport match to the ingres= s > rules >=20 > Thursday, March 21, 2019 4:12 PM, Slava Ovsiienko: > > Subject: RE: [PATCH 14/14] net/mlx5: add source vport match to the > > ingress rules > > > > > > > > Signed-off-by: Viacheslav Ovsiienko >=20 > [...] >=20 > > > > + flow_dv_translate_source_vport(matcher.mask.buf, > > > > + dev_flow->dv.value.buf, > > > > + priv->representor_id < 0 ? > > > > + priv->representor_id : > > > > + priv->representor_id + 1, > > > > > > The vport of representor_id 0 will be 1? > > > Who owns vport 0? > > > > PF. > > There is the foillowing vport mapping (for single E-Switch per PF): > > > > -1 - wire >=20 > Wire, i.e. the uplink representor. indeed it's index is defined by PRM to= -1. >=20 > > 0 - PF (uplink + VF reps) >=20 > I don't understand this part. When you have uplink representor you don't > have PF. We do. There is PF anyway. In meaning we always have PCI function, which Is some kind of "container" for representors and also serves as E-Switch ma= nager. It may contain only "uplink rep" if there is no VF enabled, or may contain = the bunch=20 of uplink and VF reps. This PF has vport zero assigned. > Moreover, I would expect the first representor created to have vport_num= =3D0 > (w/ name pf0vf0). > Isn't it the case? No. Representors do not have dedicated vports, they share the vport zero (P= F) instead. And VFs have dedicated vports. >=20 > > 1 - VF0 > > 2 - VF1 > > ... > > n+1 - VFn > > > > This code is subject to change - (SF, multi E-Switch per function, > > etc), this patch currently supports single E-Switch per PF. > > > > > > > > > + 0xffff); > > > > + } > > > > for (; items->type !=3D RTE_FLOW_ITEM_TYPE_END; items++) { > > > > int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > > > > void *match_mask =3D matcher.mask.buf; > > > > -- > > > > 1.8.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 88161A05D3 for ; Mon, 25 Mar 2019 08:44:14 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B77A52BFA; Mon, 25 Mar 2019 08:44:13 +0100 (CET) Received: from EUR03-VE1-obe.outbound.protection.outlook.com (mail-eopbgr50054.outbound.protection.outlook.com [40.107.5.54]) by dpdk.org (Postfix) with ESMTP id 11D8E2BD3 for ; Mon, 25 Mar 2019 08:44:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Ze6CRCpk8ma2wA0HNzqgNz5MMOhx/epxnM9uvVbQIXU=; b=e5BwgjkF3MPXQTtokhULiy1nxjcgol3zQVCOLmVs+NksaWu4buq5mRTsFzVnxrxS0PeZQmQkFPOeYvj3qX2II2Pl7x8ULtrnLc/j3DpQx2eH93m2laiUsERh0heLnZlfo3PxvD1+IyoYrdSkscuOOv5zpaiHL5/Xdb7sU/r4Cvg= Received: from AM4PR05MB3265.eurprd05.prod.outlook.com (10.171.188.154) by AM4PR05MB3123.eurprd05.prod.outlook.com (10.171.186.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1730.16; Mon, 25 Mar 2019 07:44:10 +0000 Received: from AM4PR05MB3265.eurprd05.prod.outlook.com ([fe80::11b0:de86:8d93:8b02]) by AM4PR05MB3265.eurprd05.prod.outlook.com ([fe80::11b0:de86:8d93:8b02%3]) with mapi id 15.20.1730.019; Mon, 25 Mar 2019 07:44:10 +0000 From: Slava Ovsiienko To: Shahaf Shuler , "dev@dpdk.org" Thread-Topic: [PATCH 14/14] net/mlx5: add source vport match to the ingress rules Thread-Index: AQHU39++4AjtEJh4pUyzk70yNW+HRKYWH4EwgARkkYCAAXeR4A== Date: Mon, 25 Mar 2019 07:44:09 +0000 Message-ID: References: <1551376985-11096-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-1-git-send-email-viacheslavo@mellanox.com> <1553155888-27498-15-git-send-email-viacheslavo@mellanox.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=viacheslavo@mellanox.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM4PR05MB3123; H:AM4PR05MB3265.eurprd05.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: K4OOUFPSfygsCAOKBYXuthk6S4KarME9pXWTydAIJA9hEmqEtriuTkjdiRyedNFqyhWXrYarlTwQUJEaN5GmnXbydlbcwAWhtS24pZ7us2MBaTHRlrtv1lHgRLgrK9uivMgN9le5ItoUdhjbCaqMiQtN0QCOfV8HYdtV2TTx9ILFiYl4Bg+zPsOLqLV/1HnPGOpX+iWxEE96nO48i0ODVT8ajHXMCDV48EBMkuJMbdujcrda3RkF+6RLvcc0lcHzrqj+oWTGJdwu6HA1un3Cikm9rSeyTAX5KkTwflpYGNHGpOwJ6jm/4kA5TXPd6IrvzLbDoyqP0lBbr8dvXGyCPgVKSg/fS+zC6C2q8mMj44DRrcLoX3F7Xwuq1VlkCstzkDcEo+S2tBuXIl158qQo7mQ8levxKwUyN0oF5025W1k= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: c2280bd4-189c-474c-776b-08d6b0f5aafa X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Mar 2019 07:44:10.0050 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR05MB3123 Subject: Re: [dpdk-dev] [PATCH 14/14] net/mlx5: add source vport match to the ingress rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190325074409.39aFbFmfhOC1HbUUhD6eBjeh68UqeyCqXBD3PCUIvII@z> > -----Original Message----- > From: Shahaf Shuler > Sent: Sunday, March 24, 2019 11:14 > To: Slava Ovsiienko ; dev@dpdk.org > Subject: RE: [PATCH 14/14] net/mlx5: add source vport match to the ingres= s > rules >=20 > Thursday, March 21, 2019 4:12 PM, Slava Ovsiienko: > > Subject: RE: [PATCH 14/14] net/mlx5: add source vport match to the > > ingress rules > > > > > > > > Signed-off-by: Viacheslav Ovsiienko >=20 > [...] >=20 > > > > + flow_dv_translate_source_vport(matcher.mask.buf, > > > > + dev_flow->dv.value.buf, > > > > + priv->representor_id < 0 ? > > > > + priv->representor_id : > > > > + priv->representor_id + 1, > > > > > > The vport of representor_id 0 will be 1? > > > Who owns vport 0? > > > > PF. > > There is the foillowing vport mapping (for single E-Switch per PF): > > > > -1 - wire >=20 > Wire, i.e. the uplink representor. indeed it's index is defined by PRM to= -1. >=20 > > 0 - PF (uplink + VF reps) >=20 > I don't understand this part. When you have uplink representor you don't > have PF. We do. There is PF anyway. In meaning we always have PCI function, which Is some kind of "container" for representors and also serves as E-Switch ma= nager. It may contain only "uplink rep" if there is no VF enabled, or may contain = the bunch=20 of uplink and VF reps. This PF has vport zero assigned. > Moreover, I would expect the first representor created to have vport_num= =3D0 > (w/ name pf0vf0). > Isn't it the case? No. Representors do not have dedicated vports, they share the vport zero (P= F) instead. And VFs have dedicated vports. >=20 > > 1 - VF0 > > 2 - VF1 > > ... > > n+1 - VFn > > > > This code is subject to change - (SF, multi E-Switch per function, > > etc), this patch currently supports single E-Switch per PF. > > > > > > > > > + 0xffff); > > > > + } > > > > for (; items->type !=3D RTE_FLOW_ITEM_TYPE_END; items++) { > > > > int tunnel =3D !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); > > > > void *match_mask =3D matcher.mask.buf; > > > > -- > > > > 1.8.3.1