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DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata: mTWPk6UAeD88DO9HTSPJzoqzFh4Nfn4qW9KYUfBRa93Klo/RblIYNuVnkZTBSqqjghjOj3eJcB0uelvVuDAsTHbm80bZwqWZIo1kXG6x4THeBiA78pSgmwbmkjL9uk4Er1Q+rCFVZz0XzARwvNqDgBQfSlROHQh/xn9SgNijRmSjAabMHkz1ej5f3LQeoakdK3imugbCkE/N81pZi/Wnh4tgADptWpBftdzk9/h4D4xVUr4cboYiKqsLy7m4Hq0ChsSwPbAEmOsIhY3qnH1xM3qTXNkn0hyU9q3paaXIr2+jTOOx5qTo84hrQy/7Q1GVuP8LGmDgFf3EXlSY4GGFlN/+SxdXorPLuPB1hSR4uS9CM4FPCzf9VlpruMf0Mg6CuUNDhQ2zbl5ksf2sGO2tjHjJZn9rXndDpyfVS+emTkngM/6Plzngwmzqj6chVEBpLR+4k8q+EQdsAJkO4fNjEQ46o9iGtUUnn5J8Jh50OzM= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM4PR05MB3265.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 60884c43-4990-4769-4b65-08d82a644f46 X-MS-Exchange-CrossTenant-originalarrivaltime: 17 Jul 2020 15:15:58.7248 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: snzBRYabIf/sGMdJ0dlZJQhPnR94ftIJ7ppCGdB47DTtOTqCqVd/xLOdIfO5WuJBZQFR4JYZhghTHE02xbT7NqgUVzX7FkFho/FNWrgw87g= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR0502MB4018 Subject: Re: [dpdk-dev] [PATCH 2/3] net/mlx5: fix compilation issue with atomic128 exchange X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Thomas Monjalon > Sent: Friday, July 17, 2020 18:08 > To: Slava Ovsiienko > Cc: dev@dpdk.org; Matan Azrad ; Raslan > Darawsheh > Subject: Re: [PATCH 2/3] net/mlx5: fix compilation issue with atomic128 > exchange >=20 > 17/07/2020 16:28, Viacheslav Ovsiienko: > > For naw the rte_atomic128_cmp_exchange() is available on x86-64 >=20 > Typo: now >=20 > > and ARM64 architectures. The patch fixes the compilation condition for > > the code using this atomic transaction. >=20 > What is fixed exactly? > How "not (ppc or 32)" is different of "x86_64 or arm64"? CI detected the cases when rte_atomic128_cmp_exchange() is not defined. So, we changed the case: "do not use cas_128 for the PPC and 32-bit and engage one otherwise" to "use cas_128 for x86_64 and ARM64 only, where it is known this one is defi= ned, otherwise - do not engage" With best regards, Slava >=20 > > -#if defined(RTE_ARCH_PPC_64) || defined(RTE_ARCH_32) > > +#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_ARM64) > > + rte_int128_t src; > > + > > + memset(&src, 0, sizeof(src)); > > + *ts =3D src; > > + /* if (*from =3D=3D *ts) *from =3D *src else *ts =3D *from; */ > > + rte_atomic128_cmp_exchange(from, ts, &src, 0, > > + __ATOMIC_RELAXED, > __ATOMIC_RELAXED); #else > > rte_atomic64_t *cqe =3D (rte_atomic64_t *)from; > > > > /* Power architecture does not support 16B compare-and-swap. */ > @@ > > -665,14 +673,6 @@ > > ps[1] =3D op; > > return; > > } > > -#else > > - rte_int128_t src; > > - > > - memset(&src, 0, sizeof(src)); > > - *ts =3D src; > > - /* if (*from =3D=3D *ts) *from =3D *src else *ts =3D *from; */ > > - rte_atomic128_cmp_exchange(from, ts, &src, 0, > > - __ATOMIC_RELAXED, > __ATOMIC_RELAXED); > > #endif >=20 >=20