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From: Slava Ovsiienko <viacheslavo@mellanox.com>
To: Thomas Monjalon <thomas@monjalon.net>
CC: "dev@dpdk.org" <dev@dpdk.org>, Matan Azrad <matan@mellanox.com>, Raslan
 Darawsheh <rasland@mellanox.com>
Thread-Topic: [PATCH 3/3] common/mlx5: fix DevX register access opcode
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Subject: Re: [dpdk-dev] [PATCH 3/3] common/mlx5: fix DevX register access
	opcode
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> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Friday, July 17, 2020 18:06
> To: Slava Ovsiienko <viacheslavo@mellanox.com>
> Cc: dev@dpdk.org; Matan Azrad <matan@mellanox.com>; Raslan
> Darawsheh <rasland@mellanox.com>
> Subject: Re: [PATCH 3/3] common/mlx5: fix DevX register access opcode
>=20
> 17/07/2020 16:28, Viacheslav Ovsiienko:
> > The dedicated MLX5_CMD_OP_ACCESS_REGISTER_USER opcode must be
> used to
> > read hardware register content from unprotected mode.
>=20
> Otherwise? What was broken?

Otherwise the MLX5_CMD_OP_ACCESS_REGISTER  was used, it returned EINVAL
and register value was not read. It was supposed to enable ACCESS_REGISTER
operation from user mode in kernel driver to read registers, but eventually
it was replaced with ACCESS_REGISTER_USER dedicated operation.

mlx5 PMD does not rely on this feature strongly, if register reading fails
it deduces the timestamp mode from reported timestamp counter
frequency.

With best regards, Slava