From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR02-HE1-obe.outbound.protection.outlook.com (mail-eopbgr10040.outbound.protection.outlook.com [40.107.1.40]) by dpdk.org (Postfix) with ESMTP id E7FC55920 for ; Wed, 3 Apr 2019 07:28:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=to94NT3oZB6J1FT9Wnv1dEhkhetpb9HxNTPpJF12ZBM=; b=ZMJk1UaTiLlyqN6kr1yBQnLs+PdSMWzlDztwvJ4qwCB1VGG2iYS4RuBpvAY2gKf7tnQ5LAmIUez7VNy8FShcXni0LXIkoFDlv3KN9RFf5IAKlJRPTClG/zJG2EorOTfo2ZkRDuwvDqfF1mt2gkTSDDHsrZql3r72fMVIiUcg4d0= Received: from AM6PR0502MB3797.eurprd05.prod.outlook.com (52.133.22.13) by AM6PR0502MB4072.eurprd05.prod.outlook.com (52.133.30.159) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1771.13; Wed, 3 Apr 2019 05:28:00 +0000 Received: from AM6PR0502MB3797.eurprd05.prod.outlook.com ([fe80::5db8:12bc:aff3:5048]) by AM6PR0502MB3797.eurprd05.prod.outlook.com ([fe80::5db8:12bc:aff3:5048%6]) with mapi id 15.20.1750.017; Wed, 3 Apr 2019 05:28:00 +0000 From: Shahaf Shuler To: Tom Barbette , "dev@dpdk.org" CC: "bruce.richardson@intel.com" , "john.mcnamara@intel.com" , Thomas Monjalon , Ferruh Yigit , Andrew Rybchenko , Yongseok Koh Thread-Topic: [PATCH v2 2/3] mlx5: Implement support for read_clock Thread-Index: AQHU5GUcv2p08dDfUES7g7rRN8n2KqYp8xDg Date: Wed, 3 Apr 2019 05:28:00 +0000 Message-ID: References: <20190327061935.19572-1-barbette@kth.se> <20190327061935.19572-3-barbette@kth.se> In-Reply-To: <20190327061935.19572-3-barbette@kth.se> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=shahafs@mellanox.com; x-originating-ip: [193.47.165.251] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 71e88d03-eeec-4b93-4b86-08d6b7f5230a x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600139)(711020)(4605104)(4618075)(2017052603328)(7193020); SRVR:AM6PR0502MB4072; x-ms-traffictypediagnostic: AM6PR0502MB4072: x-ld-processed: a652971c-7d2e-4d9b-a6a4-d149256f461b,ExtAddr x-microsoft-antispam-prvs: x-forefront-prvs: 0996D1900D x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(396003)(136003)(346002)(39860400002)(376002)(366004)(189003)(199004)(110136005)(107886003)(316002)(71190400001)(186003)(5660300002)(7736002)(97736004)(54906003)(6246003)(86362001)(76176011)(4326008)(6436002)(229853002)(71200400001)(7696005)(99286004)(2501003)(14454004)(102836004)(55016002)(14444005)(106356001)(2906002)(25786009)(26005)(105586002)(74316002)(256004)(6506007)(478600001)(3846002)(6116002)(81166006)(81156014)(68736007)(305945005)(9686003)(52536014)(11346002)(8676002)(33656002)(476003)(446003)(486006)(8936002)(66066001)(53936002); DIR:OUT; SFP:1101; SCL:1; SRVR:AM6PR0502MB4072; H:AM6PR0502MB3797.eurprd05.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: +lX3HmlwRUdvMEeNQOZgn+ldyPvrDQySjPOHEkdqh8KDYCWvhxIzkny7JogsN+NESmfSUnvsfjXJxQpjFpnRnLPKmlXMxBA7VE6bbMbc8seScus7iEP2SpZxW/ouwvcOfr0XLNX967yDWPLB5nLnZFuz0ebXhSUozhvFzkuNbLAyDR9rvOz7ARdjC+mf76znnBBlm5BArz5Rskz4DMDQdBeAOGwMu84hEmAq8qcjjE6tpUfiib2uzwx66g20bMykdzVmhuAxhjLH8zqEt8lofZafWarQ+Jb0Y19PB/5YBJSnPCp0UHQzSayICFysaCVZUgs52X9MJjXjleo+6rkVzxg7kU50Z3ZB8MAdwuDNPbZs3HkwgUUNLDHafSyQHLAX3QopIdOTxhT4xIDRZ86Hz1o4xkND3tX7y3rRuoeeG3g= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 71e88d03-eeec-4b93-4b86-08d6b7f5230a X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Apr 2019 05:28:00.1030 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR0502MB4072 Subject: Re: [dpdk-dev] [PATCH v2 2/3] mlx5: Implement support for read_clock X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Apr 2019 05:28:02 -0000 Wednesday, March 27, 2019 8:20 AM, Tom Barbette: > Subject: [PATCH v2 2/3] mlx5: Implement support for read_clock >=20 > Signed-off-by: Tom Barbette Apart from the compilation issue I am OK w/ this patch. You can add my acked-by on v3. > --- > drivers/net/mlx5/mlx5.c | 1 + > drivers/net/mlx5/mlx5.h | 1 + > drivers/net/mlx5/mlx5_ethdev.c | 29 +++++++++++++++++++++++++++++ > drivers/net/mlx5/mlx5_glue.c | 8 ++++++++ > drivers/net/mlx5/mlx5_glue.h | 2 ++ > 5 files changed, 41 insertions(+) >=20 > diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index > ae4b71695..7091ff4bb 100644 > --- a/drivers/net/mlx5/mlx5.c > +++ b/drivers/net/mlx5/mlx5.c > @@ -376,6 +376,7 @@ const struct eth_dev_ops mlx5_dev_ops =3D { > .xstats_get_names =3D mlx5_xstats_get_names, > .fw_version_get =3D mlx5_fw_version_get, > .dev_infos_get =3D mlx5_dev_infos_get, > + .read_clock =3D mlx5_read_clock, > .dev_supported_ptypes_get =3D mlx5_dev_supported_ptypes_get, > .vlan_filter_set =3D mlx5_vlan_filter_set, > .rx_queue_setup =3D mlx5_rx_queue_setup, diff --git > a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index > 538445367..88394f391 100644 > --- a/drivers/net/mlx5/mlx5.h > +++ b/drivers/net/mlx5/mlx5.h > @@ -275,6 +275,7 @@ int mlx5_set_flags(struct rte_eth_dev *dev, unsigned > int keep, > unsigned int flags); > int mlx5_dev_configure(struct rte_eth_dev *dev); void > mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info > *info); > +int mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *time); > int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t > fw_size); const uint32_t *mlx5_dev_supported_ptypes_get(struct > rte_eth_dev *dev); int mlx5_link_update(struct rte_eth_dev *dev, int > wait_to_complete); diff --git a/drivers/net/mlx5/mlx5_ethdev.c > b/drivers/net/mlx5/mlx5_ethdev.c index f84f7cf69..52262ee44 100644 > --- a/drivers/net/mlx5/mlx5_ethdev.c > +++ b/drivers/net/mlx5/mlx5_ethdev.c > @@ -557,6 +557,35 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, > struct rte_eth_dev_info *info) > } > } >=20 > +/** > + * Get device current raw clock counter > + * > + * @param dev > + * Pointer to Ethernet device structure. > + * @param[out] time > + * Current raw clock counter of the device. > + * > + * @return > + * 0 if the clock has correctly been read > + * The value of errno in case of error > + */ > +int > +mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *clock) { > + struct mlx5_priv *priv =3D dev->data->dev_private; > + struct ibv_values_ex values; > + int err =3D 0; > + > + values.comp_mask =3D IBV_VALUES_MASK_RAW_CLOCK; > + err =3D mlx5_glue->query_rt_values_ex(priv->ctx, &values); > + if (err !=3D 0) { > + DRV_LOG(WARNING, "Could not query the clock !"); > + return err; > + } > + *clock =3D values.raw_clock.tv_nsec; > + return 0; > +} > + > /** > * Get firmware version of a device. > * > diff --git a/drivers/net/mlx5/mlx5_glue.c b/drivers/net/mlx5/mlx5_glue.c > index c817d86c5..c1786c5e9 100644 > --- a/drivers/net/mlx5/mlx5_glue.c > +++ b/drivers/net/mlx5/mlx5_glue.c > @@ -86,6 +86,13 @@ mlx5_glue_query_device_ex(struct ibv_context > *context, > return ibv_query_device_ex(context, input, attr); } >=20 > +static int > +mlx5_glue_query_rt_values_ex(struct ibv_context *context, > + struct ibv_values_ex *values) > +{ > + return ibv_query_rt_values_ex(context, values); } > + > static int > mlx5_glue_query_port(struct ibv_context *context, uint8_t port_num, > struct ibv_port_attr *port_attr) @@ -603,6 +610,7 @@ > const struct mlx5_glue *mlx5_glue =3D &(const struct mlx5_glue){ > .close_device =3D mlx5_glue_close_device, > .query_device =3D mlx5_glue_query_device, > .query_device_ex =3D mlx5_glue_query_device_ex, > + .query_rt_values_ex =3D mlx5_glue_query_rt_values_ex, > .query_port =3D mlx5_glue_query_port, > .create_comp_channel =3D mlx5_glue_create_comp_channel, > .destroy_comp_channel =3D mlx5_glue_destroy_comp_channel, diff -- > git a/drivers/net/mlx5/mlx5_glue.h b/drivers/net/mlx5/mlx5_glue.h index > b11896062..fd651cc03 100644 > --- a/drivers/net/mlx5/mlx5_glue.h > +++ b/drivers/net/mlx5/mlx5_glue.h > @@ -74,6 +74,8 @@ struct mlx5_glue { > int (*query_device_ex)(struct ibv_context *context, > const struct ibv_query_device_ex_input *input, > struct ibv_device_attr_ex *attr); > + int (*query_rt_values_ex)(struct ibv_context *context, > + struct ibv_values_ex *values); > int (*query_port)(struct ibv_context *context, uint8_t port_num, > struct ibv_port_attr *port_attr); > struct ibv_comp_channel *(*create_comp_channel) > -- > 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 87B69A0679 for ; Wed, 3 Apr 2019 07:28:05 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C27695F1D; Wed, 3 Apr 2019 07:28:03 +0200 (CEST) Received: from EUR02-HE1-obe.outbound.protection.outlook.com (mail-eopbgr10040.outbound.protection.outlook.com [40.107.1.40]) by dpdk.org (Postfix) with ESMTP id E7FC55920 for ; Wed, 3 Apr 2019 07:28:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=to94NT3oZB6J1FT9Wnv1dEhkhetpb9HxNTPpJF12ZBM=; b=ZMJk1UaTiLlyqN6kr1yBQnLs+PdSMWzlDztwvJ4qwCB1VGG2iYS4RuBpvAY2gKf7tnQ5LAmIUez7VNy8FShcXni0LXIkoFDlv3KN9RFf5IAKlJRPTClG/zJG2EorOTfo2ZkRDuwvDqfF1mt2gkTSDDHsrZql3r72fMVIiUcg4d0= Received: from AM6PR0502MB3797.eurprd05.prod.outlook.com (52.133.22.13) by AM6PR0502MB4072.eurprd05.prod.outlook.com (52.133.30.159) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1771.13; Wed, 3 Apr 2019 05:28:00 +0000 Received: from AM6PR0502MB3797.eurprd05.prod.outlook.com ([fe80::5db8:12bc:aff3:5048]) by AM6PR0502MB3797.eurprd05.prod.outlook.com ([fe80::5db8:12bc:aff3:5048%6]) with mapi id 15.20.1750.017; Wed, 3 Apr 2019 05:28:00 +0000 From: Shahaf Shuler To: Tom Barbette , "dev@dpdk.org" CC: "bruce.richardson@intel.com" , "john.mcnamara@intel.com" , Thomas Monjalon , Ferruh Yigit , Andrew Rybchenko , Yongseok Koh Thread-Topic: [PATCH v2 2/3] mlx5: Implement support for read_clock Thread-Index: AQHU5GUcv2p08dDfUES7g7rRN8n2KqYp8xDg Date: Wed, 3 Apr 2019 05:28:00 +0000 Message-ID: References: <20190327061935.19572-1-barbette@kth.se> <20190327061935.19572-3-barbette@kth.se> In-Reply-To: <20190327061935.19572-3-barbette@kth.se> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=shahafs@mellanox.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM6PR0502MB4072; H:AM6PR0502MB3797.eurprd05.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: +lX3HmlwRUdvMEeNQOZgn+ldyPvrDQySjPOHEkdqh8KDYCWvhxIzkny7JogsN+NESmfSUnvsfjXJxQpjFpnRnLPKmlXMxBA7VE6bbMbc8seScus7iEP2SpZxW/ouwvcOfr0XLNX967yDWPLB5nLnZFuz0ebXhSUozhvFzkuNbLAyDR9rvOz7ARdjC+mf76znnBBlm5BArz5Rskz4DMDQdBeAOGwMu84hEmAq8qcjjE6tpUfiib2uzwx66g20bMykdzVmhuAxhjLH8zqEt8lofZafWarQ+Jb0Y19PB/5YBJSnPCp0UHQzSayICFysaCVZUgs52X9MJjXjleo+6rkVzxg7kU50Z3ZB8MAdwuDNPbZs3HkwgUUNLDHafSyQHLAX3QopIdOTxhT4xIDRZ86Hz1o4xkND3tX7y3rRuoeeG3g= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 71e88d03-eeec-4b93-4b86-08d6b7f5230a X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Apr 2019 05:28:00.1030 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR0502MB4072 Subject: Re: [dpdk-dev] [PATCH v2 2/3] mlx5: Implement support for read_clock X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190403052800.EDt68CfLlLK8z8F_2_TbrizHnDlSJ5fzy36aax9-v44@z> Wednesday, March 27, 2019 8:20 AM, Tom Barbette: > Subject: [PATCH v2 2/3] mlx5: Implement support for read_clock >=20 > Signed-off-by: Tom Barbette Apart from the compilation issue I am OK w/ this patch. You can add my acked-by on v3. > --- > drivers/net/mlx5/mlx5.c | 1 + > drivers/net/mlx5/mlx5.h | 1 + > drivers/net/mlx5/mlx5_ethdev.c | 29 +++++++++++++++++++++++++++++ > drivers/net/mlx5/mlx5_glue.c | 8 ++++++++ > drivers/net/mlx5/mlx5_glue.h | 2 ++ > 5 files changed, 41 insertions(+) >=20 > diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index > ae4b71695..7091ff4bb 100644 > --- a/drivers/net/mlx5/mlx5.c > +++ b/drivers/net/mlx5/mlx5.c > @@ -376,6 +376,7 @@ const struct eth_dev_ops mlx5_dev_ops =3D { > .xstats_get_names =3D mlx5_xstats_get_names, > .fw_version_get =3D mlx5_fw_version_get, > .dev_infos_get =3D mlx5_dev_infos_get, > + .read_clock =3D mlx5_read_clock, > .dev_supported_ptypes_get =3D mlx5_dev_supported_ptypes_get, > .vlan_filter_set =3D mlx5_vlan_filter_set, > .rx_queue_setup =3D mlx5_rx_queue_setup, diff --git > a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index > 538445367..88394f391 100644 > --- a/drivers/net/mlx5/mlx5.h > +++ b/drivers/net/mlx5/mlx5.h > @@ -275,6 +275,7 @@ int mlx5_set_flags(struct rte_eth_dev *dev, unsigned > int keep, > unsigned int flags); > int mlx5_dev_configure(struct rte_eth_dev *dev); void > mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info > *info); > +int mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *time); > int mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t > fw_size); const uint32_t *mlx5_dev_supported_ptypes_get(struct > rte_eth_dev *dev); int mlx5_link_update(struct rte_eth_dev *dev, int > wait_to_complete); diff --git a/drivers/net/mlx5/mlx5_ethdev.c > b/drivers/net/mlx5/mlx5_ethdev.c index f84f7cf69..52262ee44 100644 > --- a/drivers/net/mlx5/mlx5_ethdev.c > +++ b/drivers/net/mlx5/mlx5_ethdev.c > @@ -557,6 +557,35 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, > struct rte_eth_dev_info *info) > } > } >=20 > +/** > + * Get device current raw clock counter > + * > + * @param dev > + * Pointer to Ethernet device structure. > + * @param[out] time > + * Current raw clock counter of the device. > + * > + * @return > + * 0 if the clock has correctly been read > + * The value of errno in case of error > + */ > +int > +mlx5_read_clock(struct rte_eth_dev *dev, uint64_t *clock) { > + struct mlx5_priv *priv =3D dev->data->dev_private; > + struct ibv_values_ex values; > + int err =3D 0; > + > + values.comp_mask =3D IBV_VALUES_MASK_RAW_CLOCK; > + err =3D mlx5_glue->query_rt_values_ex(priv->ctx, &values); > + if (err !=3D 0) { > + DRV_LOG(WARNING, "Could not query the clock !"); > + return err; > + } > + *clock =3D values.raw_clock.tv_nsec; > + return 0; > +} > + > /** > * Get firmware version of a device. > * > diff --git a/drivers/net/mlx5/mlx5_glue.c b/drivers/net/mlx5/mlx5_glue.c > index c817d86c5..c1786c5e9 100644 > --- a/drivers/net/mlx5/mlx5_glue.c > +++ b/drivers/net/mlx5/mlx5_glue.c > @@ -86,6 +86,13 @@ mlx5_glue_query_device_ex(struct ibv_context > *context, > return ibv_query_device_ex(context, input, attr); } >=20 > +static int > +mlx5_glue_query_rt_values_ex(struct ibv_context *context, > + struct ibv_values_ex *values) > +{ > + return ibv_query_rt_values_ex(context, values); } > + > static int > mlx5_glue_query_port(struct ibv_context *context, uint8_t port_num, > struct ibv_port_attr *port_attr) @@ -603,6 +610,7 @@ > const struct mlx5_glue *mlx5_glue =3D &(const struct mlx5_glue){ > .close_device =3D mlx5_glue_close_device, > .query_device =3D mlx5_glue_query_device, > .query_device_ex =3D mlx5_glue_query_device_ex, > + .query_rt_values_ex =3D mlx5_glue_query_rt_values_ex, > .query_port =3D mlx5_glue_query_port, > .create_comp_channel =3D mlx5_glue_create_comp_channel, > .destroy_comp_channel =3D mlx5_glue_destroy_comp_channel, diff -- > git a/drivers/net/mlx5/mlx5_glue.h b/drivers/net/mlx5/mlx5_glue.h index > b11896062..fd651cc03 100644 > --- a/drivers/net/mlx5/mlx5_glue.h > +++ b/drivers/net/mlx5/mlx5_glue.h > @@ -74,6 +74,8 @@ struct mlx5_glue { > int (*query_device_ex)(struct ibv_context *context, > const struct ibv_query_device_ex_input *input, > struct ibv_device_attr_ex *attr); > + int (*query_rt_values_ex)(struct ibv_context *context, > + struct ibv_values_ex *values); > int (*query_port)(struct ibv_context *context, uint8_t port_num, > struct ibv_port_attr *port_attr); > struct ibv_comp_channel *(*create_comp_channel) > -- > 2.17.1