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DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Feb 2023 09:59:23.4504 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ff588774-2aac-469d-9469-08db14bb79a1 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT046.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR08MB7599 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: cburdick@nvidia.com > Sent: Wednesday, February 22, 2023 1:34 AM > To: Ruifeng Wang > Cc: dev@dpdk.org; Cliff Burdick > Subject: [PATCH] config: added support for NVIDIA ARM implementer ID >=20 > From: Cliff Burdick >=20 > NVIDIA's Jetson Xavier is an ARM chip with NVIDIA as the implementer ID a= nd a new part > number. This patch adds support for this implementer ID and the part numb= er. >=20 > Signed-off-by: Cliff Burdick > --- > .mailmap | 1 + > config/arm/meson.build | 21 +++++++++++++++++++++ > 2 files changed, 22 insertions(+) >=20 > diff --git a/.mailmap b/.mailmap > index 6a91c11be4..2cb0d9e41b 100644 > --- a/.mailmap > +++ b/.mailmap > @@ -230,6 +230,7 @@ Cian Ferriter Ciara Loftus > Ciara Power Claire Mur= phy > > +Cliff Burdick > Cody Doucette > Congwen Zhang Conor Fogarty diff -- > git a/config/arm/meson.build b/config/arm/meson.build index 6442ec9596..6= c3de22f16 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -159,6 +159,26 @@ implementer_cavium =3D { > } > } >=20 > +implementer_nvidia =3D { > + 'description': 'NVIDIA', > + 'flags': [ > + ['RTE_CACHE_LINE_SIZE', 64] > + ], > + 'part_number_config': { > + '0x4': { > + 'march': 'armv8-a', > + 'march_features': ['crc', 'crypto', 'lse'], > + 'compiler_options': ['-march=3Darmv8-a+crc+lse+simd'], > + 'flags': [ > + ['RTE_USE_C11_MEM_MODEL', true], > + ['RTE_MAX_LCORE', 8], > + ['RTE_MAX_NUMA_NODES', 1], > + ['RTE_MACHINE', '"armv8a"'] > + ] > + } > + } > +} > + > implementer_ampere =3D { > 'description': 'Ampere Computing', > 'flags': [ > @@ -261,6 +281,7 @@ implementers =3D { > '0x41': implementer_arm, > '0x43': implementer_cavium, > '0x48': implementer_hisilicon, > + '0x4e': implementer_nvidia, > '0x50': implementer_ampere, > '0x51': implementer_qualcomm, > '0x70': implementer_phytium, > -- > 2.17.1 Only native build is supported with this change. To support cross build, so= c section needs to be updated. The below patch can be referenced: http://patches.dpdk.org/project/dpdk/patch/20230220084827.3317796-3-rasland= @nvidia.com/