From: Feifei Wang <Feifei.Wang2@arm.com>
To: Ferruh Yigit <ferruh.yigit@amd.com>,
Qiming Yang <qiming.yang@intel.com>,
Wenjun Wu <wenjun1.wu@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
"konstantin.v.ananyev@yandex.ru" <konstantin.v.ananyev@yandex.ru>,
"mb@smartsharesystems.com" <mb@smartsharesystems.com>,
nd <nd@arm.com>,
Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,
Ruifeng Wang <Ruifeng.Wang@arm.com>, nd <nd@arm.com>
Subject: RE: [PATCH v5 3/3] net/ixgbe: implement recycle buffer mode
Date: Wed, 26 Apr 2023 07:36:32 +0000 [thread overview]
Message-ID: <AS8PR08MB7718696A5112E7B87196DE5CC8659@AS8PR08MB7718.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <c88dac03-589c-a403-4071-7ad6d361e2bf@amd.com>
> -----Original Message-----
> From: Ferruh Yigit <ferruh.yigit@amd.com>
> Sent: Wednesday, April 19, 2023 10:47 PM
> To: Feifei Wang <Feifei.Wang2@arm.com>; Qiming Yang
> <qiming.yang@intel.com>; Wenjun Wu <wenjun1.wu@intel.com>
> Cc: dev@dpdk.org; konstantin.v.ananyev@yandex.ru;
> mb@smartsharesystems.com; nd <nd@arm.com>; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang
> <Ruifeng.Wang@arm.com>
> Subject: Re: [PATCH v5 3/3] net/ixgbe: implement recycle buffer mode
>
> On 3/30/2023 7:29 AM, Feifei Wang wrote:
> > Define specific function implementation for ixgbe driver.
> > Currently, recycle buffer mode can support 128bit vector path. And can
> > be enabled both in fast free and no fast free mode.
> >
> > Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> > Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
> > Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> > Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> > ---
> > drivers/net/ixgbe/ixgbe_ethdev.c | 1 +
> > drivers/net/ixgbe/ixgbe_ethdev.h | 3 +
> > drivers/net/ixgbe/ixgbe_rxtx.c | 153
> +++++++++++++++++++++++++++++++
> > drivers/net/ixgbe/ixgbe_rxtx.h | 4 +
> > 4 files changed, 161 insertions(+)
> >
>
> What do you think to extract buf_recycle related code in drivers into its own
> file, this may help to manager maintainership of code easier?
Good comment, this will make code clean and easy to maintain.
>
> <...>
>
> > +uint16_t
> > +ixgbe_tx_buf_stash_vec(void *tx_queue,
> > + struct rte_eth_rxq_buf_recycle_info *rxq_buf_recycle_info) {
> > + struct ixgbe_tx_queue *txq = tx_queue;
> > + struct ixgbe_tx_entry *txep;
> > + struct rte_mbuf **rxep;
> > + struct rte_mbuf *m[RTE_IXGBE_TX_MAX_FREE_BUF_SZ];
> > + int i, j, n;
> > + uint32_t status;
> > + uint16_t avail = 0;
> > + uint16_t buf_ring_size = rxq_buf_recycle_info->buf_ring_size;
> > + uint16_t mask = rxq_buf_recycle_info->buf_ring_size - 1;
> > + uint16_t refill_request = rxq_buf_recycle_info->refill_request;
> > + uint16_t refill_head = *rxq_buf_recycle_info->refill_head;
> > + uint16_t receive_tail = *rxq_buf_recycle_info->receive_tail;
> > +
> > + /* Get available recycling Rx buffers. */
> > + avail = (buf_ring_size - (refill_head - receive_tail)) & mask;
> > +
> > + /* Check Tx free thresh and Rx available space. */
> > + if (txq->nb_tx_free > txq->tx_free_thresh || avail <= txq->tx_rs_thresh)
> > + return 0;
> > +
> > + /* check DD bits on threshold descriptor */
> > + status = txq->tx_ring[txq->tx_next_dd].wb.status;
> > + if (!(status & IXGBE_ADVTXD_STAT_DD))
> > + return 0;
> > +
> > + n = txq->tx_rs_thresh;
> > +
> > + /* Buffer recycle can only support no ring buffer wraparound.
> > + * Two case for this:
> > + *
> > + * case 1: The refill head of Rx buffer ring needs to be aligned with
> > + * buffer ring size. In this case, the number of Tx freeing buffers
> > + * should be equal to refill_request.
> > + *
> > + * case 2: The refill head of Rx ring buffer does not need to be aligned
> > + * with buffer ring size. In this case, the update of refill head can not
> > + * exceed the Rx buffer ring size.
> > + */
> > + if (refill_request != n ||
> > + (!refill_request && (refill_head + n > buf_ring_size)))
> > + return 0;
> > +
> > + /* First buffer to free from S/W ring is at index
> > + * tx_next_dd - (tx_rs_thresh-1).
> > + */
> > + txep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];
> > + rxep = rxq_buf_recycle_info->buf_ring;
> > + rxep += refill_head;
> > +
> > + if (txq->offloads & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE) {
> > + /* Directly put mbufs from Tx to Rx. */
> > + for (i = 0; i < n; i++, rxep++, txep++)
> > + *rxep = txep[0].mbuf;
> > + } else {
> > + for (i = 0, j = 0; i < n; i++) {
> > + /* Avoid txq contains buffers from expected mempoo.
> */
>
> mempool (unless trying to introduce a new concept :)
Agree.
next prev parent reply other threads:[~2023-04-26 7:36 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-24 16:46 [RFC PATCH v1 0/4] Direct re-arming of buffers on receive side Feifei Wang
2021-12-24 16:46 ` [RFC PATCH v1 1/4] net/i40e: enable direct re-arm mode Feifei Wang
2021-12-24 16:46 ` [RFC PATCH v1 2/4] ethdev: add API for " Feifei Wang
2021-12-24 19:38 ` Stephen Hemminger
2021-12-26 9:49 ` 回复: " Feifei Wang
2021-12-26 10:31 ` Morten Brørup
2021-12-24 16:46 ` [RFC PATCH v1 3/4] net/i40e: add direct re-arm mode internal API Feifei Wang
2021-12-24 16:46 ` [RFC PATCH v1 4/4] examples/l3fwd: give an example for direct rearm mode Feifei Wang
2021-12-26 10:25 ` [RFC PATCH v1 0/4] Direct re-arming of buffers on receive side Morten Brørup
2021-12-28 6:55 ` 回复: " Feifei Wang
2022-01-18 15:51 ` Ferruh Yigit
2022-01-18 16:53 ` Thomas Monjalon
2022-01-18 17:27 ` Morten Brørup
2022-01-27 5:24 ` Honnappa Nagarahalli
2022-01-27 16:45 ` Ananyev, Konstantin
2022-02-02 19:46 ` Honnappa Nagarahalli
2022-01-27 5:16 ` Honnappa Nagarahalli
2023-02-28 6:43 ` 回复: " Feifei Wang
2023-02-28 6:52 ` Feifei Wang
2022-01-27 4:06 ` Honnappa Nagarahalli
2022-01-27 17:13 ` Morten Brørup
2022-01-28 11:29 ` Morten Brørup
2023-03-23 10:43 ` [PATCH v4 0/3] Recycle buffers from Tx to Rx Feifei Wang
2023-03-23 10:43 ` [PATCH v4 1/3] ethdev: add API for buffer recycle mode Feifei Wang
2023-03-23 11:41 ` Morten Brørup
2023-03-29 2:16 ` Feifei Wang
2023-03-23 10:43 ` [PATCH v4 2/3] net/i40e: implement recycle buffer mode Feifei Wang
2023-03-23 10:43 ` [PATCH v4 3/3] net/ixgbe: " Feifei Wang
2023-03-30 6:29 ` [PATCH v5 0/3] Recycle buffers from Tx to Rx Feifei Wang
2023-03-30 6:29 ` [PATCH v5 1/3] ethdev: add API for buffer recycle mode Feifei Wang
2023-03-30 7:19 ` Morten Brørup
2023-03-30 9:31 ` Feifei Wang
2023-03-30 15:15 ` Morten Brørup
2023-03-30 15:58 ` Morten Brørup
2023-04-26 6:59 ` Feifei Wang
2023-04-19 14:46 ` Ferruh Yigit
2023-04-26 7:29 ` Feifei Wang
2023-03-30 6:29 ` [PATCH v5 2/3] net/i40e: implement recycle buffer mode Feifei Wang
2023-03-30 6:29 ` [PATCH v5 3/3] net/ixgbe: " Feifei Wang
2023-04-19 14:46 ` Ferruh Yigit
2023-04-26 7:36 ` Feifei Wang [this message]
2023-03-30 15:04 ` [PATCH v5 0/3] Recycle buffers from Tx to Rx Stephen Hemminger
2023-04-03 2:48 ` Feifei Wang
2023-04-19 14:56 ` Ferruh Yigit
2023-04-25 7:57 ` Feifei Wang
2023-05-25 9:45 ` [PATCH v6 0/4] Recycle mbufs from Tx queue to Rx queue Feifei Wang
2023-05-25 9:45 ` [PATCH v6 1/4] ethdev: add API for mbufs recycle mode Feifei Wang
2023-05-25 15:08 ` Morten Brørup
2023-05-31 6:10 ` Feifei Wang
2023-06-05 12:53 ` Константин Ананьев
2023-06-06 2:55 ` Feifei Wang
2023-06-06 7:10 ` Konstantin Ananyev
2023-06-06 7:31 ` Feifei Wang
2023-06-06 8:34 ` Konstantin Ananyev
2023-06-07 0:00 ` Ferruh Yigit
2023-06-12 3:25 ` Feifei Wang
2023-05-25 9:45 ` [PATCH v6 2/4] net/i40e: implement " Feifei Wang
2023-06-05 13:02 ` Константин Ананьев
2023-06-06 3:16 ` Feifei Wang
2023-06-06 7:18 ` Konstantin Ananyev
2023-06-06 7:58 ` Feifei Wang
2023-06-06 8:27 ` Konstantin Ananyev
2023-06-12 3:05 ` Feifei Wang
2023-05-25 9:45 ` [PATCH v6 3/4] net/ixgbe: " Feifei Wang
2023-05-25 9:45 ` [PATCH v6 4/4] app/testpmd: add recycle mbufs engine Feifei Wang
2023-06-05 13:08 ` Константин Ананьев
2023-06-06 6:32 ` Feifei Wang
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