* [dpdk-dev] [PATCH 1/2] i40e: use i40e_clear_hw() to clear hardware before PF reset
2014-07-02 3:10 [dpdk-dev] [PATCH 0/2] i40e improvements Helin Zhang
@ 2014-07-02 3:10 ` Helin Zhang
2014-07-02 3:10 ` [dpdk-dev] [PATCH 2/2] i40e: add required steps in TX queue enable, disable Helin Zhang
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Helin Zhang @ 2014-07-02 3:10 UTC (permalink / raw)
To: dev
i40e_clear_hw() was provided recently in shared code to clear
hardware, which can cover disabling all queues. The code
changes are to remove i40e_pf_disable_all_queues() and use
i40e_clear_hw() instead.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Jijiang Liu <jijiang.liu@intel.com>
Acked-by: Jing Chen <jing.d.chen@intel.com>
---
lib/librte_pmd_i40e/i40e_ethdev.c | 103 +-------------------------------------
1 file changed, 2 insertions(+), 101 deletions(-)
diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c
index 068b847..6624586 100644
--- a/lib/librte_pmd_i40e/i40e_ethdev.c
+++ b/lib/librte_pmd_i40e/i40e_ethdev.c
@@ -188,7 +188,6 @@ static struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf,
struct i40e_vsi *vsi);
static int i40e_pf_config_mq_rx(struct i40e_pf *pf);
static int i40e_vsi_config_double_vlan(struct i40e_vsi *vsi, int on);
-static int i40e_pf_disable_all_queues(struct i40e_hw *hw);
static inline int i40e_find_all_vlan_for_mac(struct i40e_vsi *vsi,
struct i40e_macvlan_filter *mv_f,
int num,
@@ -373,12 +372,8 @@ eth_i40e_dev_init(__rte_unused struct eth_driver *eth_drv,
hw->bus.device = pci_dev->addr.devid;
hw->bus.func = pci_dev->addr.function;
- /* Disable all queues before PF reset, as required */
- ret = i40e_pf_disable_all_queues(hw);
- if (ret != I40E_SUCCESS) {
- PMD_INIT_LOG(ERR, "Failed to disable queues %u\n", ret);
- return ret;
- }
+ /* Make sure all is clean before doing PF reset */
+ i40e_clear_hw(hw);
/* Reset here to make sure all is clean for each PF */
ret = i40e_pf_reset(hw);
@@ -3948,97 +3943,3 @@ i40e_pf_config_mq_rx(struct i40e_pf *pf)
return 0;
}
-
-static int
-i40e_disable_queue(struct i40e_hw *hw, uint16_t q_idx)
-{
- uint16_t i;
- uint32_t reg;
-
- /* Disable TX queue */
- for (i = 0; i < I40E_CHK_Q_ENA_COUNT; i++) {
- reg = I40E_READ_REG(hw, I40E_QTX_ENA(q_idx));
- if (!(((reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 0x1) ^
- ((reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 0x1)))
- break;
- rte_delay_us(I40E_CHK_Q_ENA_INTERVAL_US);
- }
- if (i >= I40E_CHK_Q_ENA_COUNT) {
- PMD_DRV_LOG(ERR, "Failed to disable "
- "tx queue[%u]\n", q_idx);
- return I40E_ERR_TIMEOUT;
- }
-
- if (reg & I40E_QTX_ENA_QENA_STAT_MASK) {
- reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
- I40E_WRITE_REG(hw, I40E_QTX_ENA(q_idx), reg);
- for (i = 0; i < I40E_CHK_Q_ENA_COUNT; i++) {
- rte_delay_us(I40E_CHK_Q_ENA_INTERVAL_US);
- reg = I40E_READ_REG(hw, I40E_QTX_ENA(q_idx));
- if (!(reg & I40E_QTX_ENA_QENA_REQ_MASK) &&
- !(reg & I40E_QTX_ENA_QENA_STAT_MASK))
- break;
- }
- if (i >= I40E_CHK_Q_ENA_COUNT) {
- PMD_DRV_LOG(ERR, "Failed to disable "
- "tx queue[%u]\n", q_idx);
- return I40E_ERR_TIMEOUT;
- }
- }
-
- /* Disable RX queue */
- for (i = 0; i < I40E_CHK_Q_ENA_COUNT; i++) {
- reg = I40E_READ_REG(hw, I40E_QRX_ENA(q_idx));
- if (!((reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 0x1) ^
- ((reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 0x1))
- break;
- rte_delay_us(I40E_CHK_Q_ENA_INTERVAL_US);
- }
- if (i >= I40E_CHK_Q_ENA_COUNT) {
- PMD_DRV_LOG(ERR, "Failed to disable "
- "rx queue[%u]\n", q_idx);
- return I40E_ERR_TIMEOUT;
- }
-
- if (reg & I40E_QRX_ENA_QENA_STAT_MASK) {
- reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
- I40E_WRITE_REG(hw, I40E_QRX_ENA(q_idx), reg);
- for (i = 0; i < I40E_CHK_Q_ENA_COUNT; i++) {
- rte_delay_us(I40E_CHK_Q_ENA_INTERVAL_US);
- reg = I40E_READ_REG(hw, I40E_QRX_ENA(q_idx));
- if (!(reg & I40E_QRX_ENA_QENA_REQ_MASK) &&
- !(reg & I40E_QRX_ENA_QENA_STAT_MASK))
- break;
- }
- if (i >= I40E_CHK_Q_ENA_COUNT) {
- PMD_DRV_LOG(ERR, "Failed to disable "
- "rx queue[%u]\n", q_idx);
- return I40E_ERR_TIMEOUT;
- }
- }
-
- return I40E_SUCCESS;
-}
-
-static int
-i40e_pf_disable_all_queues(struct i40e_hw *hw)
-{
- uint32_t reg;
- uint16_t firstq, lastq, maxq, i;
- int ret;
- reg = I40E_READ_REG(hw, I40E_PFLAN_QALLOC);
- if (!(reg & I40E_PFLAN_QALLOC_VALID_MASK)) {
- PMD_DRV_LOG(INFO, "PF queue allocation is invalid\n");
- return I40E_ERR_PARAM;
- }
- firstq = reg & I40E_PFLAN_QALLOC_FIRSTQ_MASK;
- lastq = (reg & I40E_PFLAN_QALLOC_LASTQ_MASK) >>
- I40E_PFLAN_QALLOC_LASTQ_SHIFT;
- maxq = lastq - firstq;
- for (i = 0; i <= maxq; i++) {
- ret = i40e_disable_queue(hw, i);
- if (ret != I40E_SUCCESS)
- return ret;
- }
- return I40E_SUCCESS;
-}
--
1.8.1.4
^ permalink raw reply [flat|nested] 5+ messages in thread* [dpdk-dev] [PATCH 2/2] i40e: add required steps in TX queue enable, disable
2014-07-02 3:10 [dpdk-dev] [PATCH 0/2] i40e improvements Helin Zhang
2014-07-02 3:10 ` [dpdk-dev] [PATCH 1/2] i40e: use i40e_clear_hw() to clear hardware before PF reset Helin Zhang
@ 2014-07-02 3:10 ` Helin Zhang
2014-07-02 4:16 ` [dpdk-dev] [PATCH 0/2] i40e improvements Cao, Min
2014-07-02 8:56 ` Thomas Monjalon
3 siblings, 0 replies; 5+ messages in thread
From: Helin Zhang @ 2014-07-02 3:10 UTC (permalink / raw)
To: dev
Hardware specification changed recently which requires to set
or clear TX queue disable flags before actually enabling or
disabling a specific TX queue. 'QTX_HEAD' register needs to
be cleared before setting the QENA_REQ flag.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Jijiang Liu <jijiang.liu@intel.com>
Acked-by: Jing Chen <jing.d.chen@intel.com>
---
lib/librte_pmd_i40e/i40e_ethdev.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c
index 6624586..9ed31b5 100644
--- a/lib/librte_pmd_i40e/i40e_ethdev.c
+++ b/lib/librte_pmd_i40e/i40e_ethdev.c
@@ -85,6 +85,8 @@
#define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
#define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */
+#define I40E_PRE_TX_Q_CFG_WAIT_US 10 /* 10 us */
+
#define I40E_RSS_OFFLOAD_ALL ( \
ETH_RSS_NONF_IPV4_UDP | \
ETH_RSS_NONF_IPV4_TCP | \
@@ -2780,6 +2782,13 @@ i40e_switch_tx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on)
uint32_t reg;
uint16_t j;
+ /**
+ * Set or clear TX Queue Disable flags,
+ * which is required by hardware.
+ */
+ i40e_pre_tx_queue_cfg(hw, q_idx, on);
+ rte_delay_us(I40E_PRE_TX_Q_CFG_WAIT_US);
+
/* Wait until the request is finished */
for (j = 0; j < I40E_CHK_Q_ENA_COUNT; j++) {
rte_delay_us(I40E_CHK_Q_ENA_INTERVAL_US);
@@ -2793,6 +2802,8 @@ i40e_switch_tx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on)
if (on) {
if (reg & I40E_QTX_ENA_QENA_STAT_MASK)
return I40E_SUCCESS; /* already on, skip next steps */
+
+ I40E_WRITE_REG(hw, I40E_QTX_HEAD(q_idx), 0);
reg |= I40E_QTX_ENA_QENA_REQ_MASK;
} else {
if (!(reg & I40E_QTX_ENA_QENA_STAT_MASK))
@@ -2821,8 +2832,10 @@ i40e_switch_tx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on)
(on ? "enable" : "disable"), q_idx);
return I40E_ERR_TIMEOUT;
}
+
return I40E_SUCCESS;
}
+
/* Swith on or off the tx queues */
static int
i40e_vsi_switch_tx_queues(struct i40e_vsi *vsi, bool on)
--
1.8.1.4
^ permalink raw reply [flat|nested] 5+ messages in thread