From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 6B1C019F5 for ; Fri, 26 Dec 2014 03:15:05 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP; 25 Dec 2014 18:12:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,646,1413270000"; d="scan'208";a="629248120" Received: from pgsmsx107.gar.corp.intel.com ([10.221.44.105]) by orsmga001.jf.intel.com with ESMTP; 25 Dec 2014 18:15:03 -0800 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by PGSMSX107.gar.corp.intel.com (10.221.44.105) with Microsoft SMTP Server (TLS) id 14.3.195.1; Fri, 26 Dec 2014 10:15:02 +0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.240]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.67]) with mapi id 14.03.0195.001; Fri, 26 Dec 2014 10:15:01 +0800 From: "Cao, Min" To: "Wu, Jingjing" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH]i40e: move the fdir_setup from dev_init to dev_configure Thread-Index: AQHQD9k3XDFZ3iL+Fk+kCXD/nU1IFpx/W/mAgCHnNOA= Date: Fri, 26 Dec 2014 02:15:00 +0000 Message-ID: References: <1417707623-25777-1-git-send-email-jingjing.wu@intel.com> <2601191342CEEE43887BDE71AB977258213BCC1B@IRSMSX105.ger.corp.intel.com> In-Reply-To: <2601191342CEEE43887BDE71AB977258213BCC1B@IRSMSX105.ger.corp.intel.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-cr-hashedpuzzle: uo8= BgqV Cy+8 DSU6 ENuZ EPcO ERkZ EaOb Eh4C Er93 E5tW GFxc Gea9 HJec H8f/ KOr1; 1; ZABlAHYAQABkAHAAZABrAC4AbwByAGcA; Sosha1_v1; 7; {B7B565E9-8023-459C-B0F7-7F585E7EBA7D}; bQBpAG4ALgBjAGEAbwBAAGkAbgB0AGUAbAAuAGMAbwBtAA==; Fri, 26 Dec 2014 02:14:58 GMT; UgBFADoAIABbAGQAcABkAGsALQBkAGUAdgBdACAAWwBQAEEAVABDAEgAXQBpADQAMABlADoAIABtAG8AdgBlACAAdABoAGUAIABmAGQAaQByAF8AcwBlAHQAdQBwACAAZgByAG8AbQAgAGQAZQB2AF8AaQBuAGkAdAAgAHQAbwAJAGQAZQB2AF8AYwBvAG4AZgBpAGcAdQByAGUA x-cr-puzzleid: {B7B565E9-8023-459C-B0F7-7F585E7EBA7D} x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH]i40e: move the fdir_setup from dev_init to dev_configure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Dec 2014 02:15:06 -0000 Tested-by: Min Cao Patch name: [dpdk-dev] [PATCH]i40e: move the fdir_setup from dev_init to = dev_configure Test Flag: Tested-by Tester name: min.cao@intel.com Result summary: total 4 cases, 4 passed, 0 failed Test Case 1: =09 Name: Fortville flow director with no flexible playload(IPv4/IPv6) Environment: OS: Fedora20 3.11.10-301.fc20.x86_64 gcc (GCC) 4.8.2 CPU: Intel(R) Xeon(R) CPU E5-2680 0 @ 2.70GHz NIC: Fortville eagle=20 Test result: PASSED Test Case 2: =09 Name: Fortville flow director with flexible playload(IPv4/IPv6) Environment: OS: Fedora20 3.11.10-301.fc20.x86_64 gcc (GCC) 4.8.2 CPU: Intel(R) Xeon(R) CPU E5-2680 0 @ 2.70GHz NIC: Fortville eagle=20 Test result: PASSED Test Case 3: =09 Name: Fortville flow director flush Environment: OS: Fedora20 3.11.10-301.fc20.x86_64 gcc (GCC) 4.8.2 CPU: Intel(R) Xeon(R) CPU E5-2680 0 @ 2.70GHz NIC: Fortville eagle=20 Test result: PASSED Test Case 4: =09 Name: Fortville flow director performance Environment: OS: Fedora20 3.11.10-301.fc20.x86_64 gcc (GCC) 4.8.2 CPU: Intel(R) Xeon(R) CPU E5-2680 0 @ 2.70GHz NIC: Fortville eagle=20 Test result: PASSED > -----Original Message----- > From: Wu, Jingjing > Sent: Thursday, December 04, 2014 3:40 PM > To: dev@dpdk.org > Cc: Wu, Jingjing; Zhang, Helin; Ananyev, Konstantin > Subject: [PATCH]i40e: move the fdir_setup from dev_init to dev_configure >=20 > In order not to affect the FVL's performance by default setting, this > patch moves the flow director initialization from i40e_pf_setup to > i40e_dev_configure according to the mode in fdir configure info. > Then the resources used for flow director will be only setup if it is ena= bled. >=20 > Signed-off-by: jingjing.wu > --- > app/test-pmd/cmdline.c | 4 +- > lib/librte_pmd_i40e/i40e_ethdev.c | 49 ++++++++++++----------- > lib/librte_pmd_i40e/i40e_fdir.c | 83 ++++++++++++++++++++-------------= ------ > 3 files changed, 72 insertions(+), 64 deletions(-) >=20 > diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c > index c61c3a0..f79ea3e 100644 > --- a/app/test-pmd/cmdline.c > +++ b/app/test-pmd/cmdline.c > @@ -8546,7 +8546,7 @@ cmd_flow_director_flex_mask_parsed(void *parsed_res= ult, > } > flex_mask.flow_type =3D str2flowtype(res->flow_type); > fdir_set_flex_mask(res->port_id, &flex_mask); > - cmd_reconfig_device_queue(res->port_id, 1, 0); > + cmd_reconfig_device_queue(res->port_id, 1, 1); > } >=20 > cmdline_parse_token_string_t cmd_flow_director_flexmask =3D > @@ -8667,7 +8667,7 @@ cmd_flow_director_flxpld_parsed(void *parsed_result= , > } >=20 > fdir_set_flex_payload(res->port_id, &flex_cfg); > - cmd_reconfig_device_queue(res->port_id, 1, 0); > + cmd_reconfig_device_queue(res->port_id, 1, 1); > } >=20 > cmdline_parse_token_string_t cmd_flow_director_flexpayload =3D > diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e= _ethdev.c > index 87e750a..002d4a9 100644 > --- a/lib/librte_pmd_i40e/i40e_ethdev.c > +++ b/lib/librte_pmd_i40e/i40e_ethdev.c > @@ -546,7 +546,6 @@ eth_i40e_dev_init(__rte_unused struct eth_driver *eth= _drv, > err_mac_alloc: > i40e_vsi_release(pf->main_vsi); > err_setup_pf_switch: > - i40e_fdir_teardown(pf); > err_get_mac_addr: > err_configure_lan_hmc: > (void)i40e_shutdown_lan_hmc(hw); > @@ -565,8 +564,27 @@ err_get_capabilities: > static int > i40e_dev_configure(struct rte_eth_dev *dev) > { > - int ret; > + struct i40e_pf *pf =3D I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); > enum rte_eth_rx_mq_mode mq_mode =3D dev->data->dev_conf.rxmode.mq_mode; > + int ret; > + > + if (dev->data->dev_conf.fdir_conf.mode =3D=3D RTE_FDIR_MODE_PERFECT) { > + ret =3D i40e_fdir_setup(pf); > + if (ret !=3D I40E_SUCCESS) { > + PMD_DRV_LOG(ERR, "Failed to setup flow director."); > + return -ENOTSUP; > + } > + ret =3D i40e_fdir_configure(dev); > + if (ret < 0) { > + PMD_DRV_LOG(ERR, "failed to configure fdir."); > + goto err; > + } > + } else > + i40e_fdir_teardown(pf); > + > + ret =3D i40e_dev_init_vlan(dev); > + if (ret < 0) > + goto err; >=20 > /* VMDQ setup. > * Needs to move VMDQ setting out of i40e_pf_config_mq_rx() as VMDQ an= d > @@ -583,10 +601,12 @@ i40e_dev_configure(struct rte_eth_dev *dev) > if (mq_mode & ETH_MQ_RX_VMDQ_FLAG) { > ret =3D i40e_vmdq_setup(dev); > if (ret) > - return ret; > + goto err; > } > - > - return i40e_dev_init_vlan(dev); > + return 0; > +err: > + i40e_fdir_teardown(pf); > + return ret; > } >=20 > void > @@ -837,14 +857,8 @@ i40e_dev_start(struct rte_eth_dev *dev) > i40e_vsi_enable_queues_intr(pf->vmdq[i].vsi); > } >=20 > - ret =3D i40e_fdir_configure(dev); > - if (ret < 0) { > - PMD_DRV_LOG(ERR, "failed to configure fdir."); > - goto err_up; > - } > - > /* enable FDIR MSIX interrupt */ > - if (pf->flags & I40E_FLAG_FDIR) { > + if (pf->fdir.fdir_vsi) { > i40e_vsi_queues_bind_intr(pf->fdir.fdir_vsi); > i40e_vsi_enable_queues_intr(pf->fdir.fdir_vsi); > } > @@ -903,7 +917,7 @@ i40e_dev_stop(struct rte_eth_dev *dev) > i40e_vsi_queues_unbind_intr(pf->vmdq[i].vsi); > } >=20 > - if (pf->flags & I40E_FLAG_FDIR) { > + if (pf->fdir.fdir_vsi) { > i40e_vsi_queues_bind_intr(pf->fdir.fdir_vsi); > i40e_vsi_enable_queues_intr(pf->fdir.fdir_vsi); > } > @@ -3302,15 +3316,6 @@ i40e_pf_setup(struct i40e_pf *pf) > } > pf->main_vsi =3D vsi; >=20 > - /* setup FDIR after main vsi created.*/ > - if (pf->flags & I40E_FLAG_FDIR) { > - ret =3D i40e_fdir_setup(pf); > - if (ret !=3D I40E_SUCCESS) { > - PMD_DRV_LOG(ERR, "Failed to setup flow director."); > - pf->flags &=3D ~I40E_FLAG_FDIR; > - } > - } > - > /* Configure filter control */ > memset(&settings, 0, sizeof(settings)); > if (hw->func_caps.rss_table_size =3D=3D ETH_RSS_RETA_SIZE_128) > diff --git a/lib/librte_pmd_i40e/i40e_fdir.c b/lib/librte_pmd_i40e/i40e_f= dir.c > index d75b96e..ad38803 100644 > --- a/lib/librte_pmd_i40e/i40e_fdir.c > +++ b/lib/librte_pmd_i40e/i40e_fdir.c > @@ -196,6 +196,11 @@ i40e_fdir_setup(struct i40e_pf *pf) > const struct rte_memzone *mz =3D NULL; > struct rte_eth_dev *eth_dev =3D pf->adapter->eth_dev; >=20 > + if ((pf->flags & I40E_FLAG_FDIR) =3D=3D 0) { > + PMD_INIT_LOG(ERR, "HW doesn't support FDIR"); > + return I40E_NOT_SUPPORTED; > + } > + > PMD_DRV_LOG(INFO, "FDIR HW Capabilities: num_filters_guaranteed =3D %u,= " > " num_filters_best_effort =3D %u.", > hw->func_caps.fd_filters_guaranteed, > @@ -203,9 +208,8 @@ i40e_fdir_setup(struct i40e_pf *pf) >=20 > vsi =3D pf->fdir.fdir_vsi; > if (vsi) { > - PMD_DRV_LOG(ERR, "FDIR vsi pointer needs " > - "to be null before creation."); > - return I40E_ERR_BAD_PTR; > + PMD_DRV_LOG(INFO, "FDIR initialization has been done."); > + return I40E_SUCCESS; > } > /* make new FDIR VSI */ > vsi =3D i40e_vsi_setup(pf, I40E_VSI_FDIR, pf->main_vsi, 0); > @@ -302,6 +306,8 @@ i40e_fdir_teardown(struct i40e_pf *pf) > struct i40e_vsi *vsi; >=20 > vsi =3D pf->fdir.fdir_vsi; > + if (!vsi) > + return; > i40e_switch_tx_queue(hw, vsi->base_queue, FALSE); > i40e_switch_rx_queue(hw, vsi->base_queue, FALSE); > i40e_dev_rx_queue_release(pf->fdir.rxq); > @@ -653,37 +659,29 @@ i40e_fdir_configure(struct rte_eth_dev *dev) > } > } >=20 > + /* enable FDIR filter */ > val =3D I40E_READ_REG(hw, I40E_PFQF_CTL_0); > - if ((pf->flags & I40E_FLAG_FDIR) && > - dev->data->dev_conf.fdir_conf.mode =3D=3D RTE_FDIR_MODE_PERFECT) { > - /* enable FDIR filter */ > - val |=3D I40E_PFQF_CTL_0_FD_ENA_MASK; > - I40E_WRITE_REG(hw, I40E_PFQF_CTL_0, val); > + val |=3D I40E_PFQF_CTL_0_FD_ENA_MASK; > + I40E_WRITE_REG(hw, I40E_PFQF_CTL_0, val); >=20 > - i40e_init_flx_pld(pf); /* set flex config to default value */ > + i40e_init_flx_pld(pf); /* set flex config to default value */ >=20 > - conf =3D &dev->data->dev_conf.fdir_conf.flex_conf; > - ret =3D i40e_check_fdir_flex_conf(conf); > - if (ret < 0) { > - PMD_DRV_LOG(ERR, " invalid configuration arguments."); > - return -EINVAL; > - } > - /* configure flex payload */ > - for (i =3D 0; i < conf->nb_payloads; i++) > - i40e_set_flx_pld_cfg(pf, &conf->flex_set[i]); > - /* configure flex mask*/ > - for (i =3D 0; i < conf->nb_flexmasks; i++) { > - pctype =3D i40e_flowtype_to_pctype( > - conf->flex_mask[i].flow_type); > - i40e_set_flex_mask_on_pctype(pf, > - pctype, > - &conf->flex_mask[i]); > - } > - } else { > - /* disable FDIR filter */ > - val &=3D ~I40E_PFQF_CTL_0_FD_ENA_MASK; > - I40E_WRITE_REG(hw, I40E_PFQF_CTL_0, val); > - pf->flags &=3D ~I40E_FLAG_FDIR; > + conf =3D &dev->data->dev_conf.fdir_conf.flex_conf; > + ret =3D i40e_check_fdir_flex_conf(conf); > + if (ret < 0) { > + PMD_DRV_LOG(ERR, " invalid configuration arguments."); > + return -EINVAL; > + } > + /* configure flex payload */ > + for (i =3D 0; i < conf->nb_payloads; i++) > + i40e_set_flx_pld_cfg(pf, &conf->flex_set[i]); > + /* configure flex mask*/ > + for (i =3D 0; i < conf->nb_flexmasks; i++) { > + pctype =3D i40e_flowtype_to_pctype( > + conf->flex_mask[i].flow_type); > + i40e_set_flex_mask_on_pctype(pf, > + pctype, > + &conf->flex_mask[i]); > } >=20 > return ret; > @@ -982,10 +980,12 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev, > enum i40e_filter_pctype pctype; > int ret =3D 0; >=20 > - if (!(pf->flags & I40E_FLAG_FDIR)) { > - PMD_DRV_LOG(ERR, "FDIR is not enabled."); > + if (dev->data->dev_conf.fdir_conf.mode !=3D RTE_FDIR_MODE_PERFECT) { > + PMD_DRV_LOG(ERR, "FDIR is not enabled, please" > + " check the mode in fdir_conf."); > return -ENOTSUP; > } > + > if (!I40E_VALID_FLOW_TYPE(filter->input.flow_type)) { > PMD_DRV_LOG(ERR, "invalid flow_type input."); > return -EINVAL; > @@ -1263,8 +1263,11 @@ i40e_fdir_info_get(struct rte_eth_dev *dev, struct= rte_eth_fdir_info *fdir) > uint16_t num_flex_set =3D 0; > uint16_t num_flex_mask =3D 0; >=20 > - fdir->mode =3D (pf->flags & I40E_FLAG_FDIR) ? > - RTE_FDIR_MODE_PERFECT : RTE_FDIR_MODE_NONE; > + if (dev->data->dev_conf.fdir_conf.mode =3D=3D RTE_FDIR_MODE_PERFECT) > + fdir->mode =3D RTE_FDIR_MODE_PERFECT; > + else > + fdir->mode =3D RTE_FDIR_MODE_NONE; > + > fdir->guarant_spc =3D > (uint32_t)hw->func_caps.fd_filters_guaranteed; > fdir->best_spc =3D > @@ -1324,11 +1327,11 @@ i40e_fdir_ctrl_func(struct rte_eth_dev *dev, > struct i40e_pf *pf =3D I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); > int ret =3D 0; >=20 > - if (filter_op =3D=3D RTE_ETH_FILTER_NOP) { > - if (!(pf->flags & I40E_FLAG_FDIR)) > - ret =3D -ENOTSUP; > - return ret; > - } > + if ((pf->flags & I40E_FLAG_FDIR) =3D=3D 0) > + return -ENOTSUP; > + > + if (filter_op =3D=3D RTE_ETH_FILTER_NOP) > + return 0; >=20 > if (arg =3D=3D NULL && filter_op !=3D RTE_ETH_FILTER_FLUSH) > return -EINVAL; > -- > 1.8.1.4