From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id DCA3123A for ; Sun, 6 May 2018 02:27:46 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 May 2018 17:27:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,367,1520924400"; d="scan'208";a="51847176" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga004.fm.intel.com with ESMTP; 05 May 2018 17:27:42 -0700 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sat, 5 May 2018 17:27:43 -0700 Received: from cdsmsx103.ccr.corp.intel.com (172.17.3.37) by fmsmsx111.amr.corp.intel.com (10.18.116.5) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sat, 5 May 2018 17:27:42 -0700 Received: from cdsmsx104.ccr.corp.intel.com ([169.254.4.183]) by CDSMSX103.ccr.corp.intel.com ([169.254.5.121]) with mapi id 14.03.0319.002; Sun, 6 May 2018 08:27:40 +0800 From: "Zhang, Tianfei" To: Shreyansh Jain , "Xu, Rosen" , "dev@dpdk.org" CC: "Doherty, Declan" , "Richardson, Bruce" , "Yigit, Ferruh" , "Ananyev, Konstantin" , "Liu, Song" , "Wu, Hao" , "gaetan.rivet@6wind.com" Thread-Topic: [PATCH v7 4/5] iFPGA: add meson build Thread-Index: AQHT47GdUEWzYg9B00GGz81DMAdu3KQg7lwAgADsIbA= Date: Sun, 6 May 2018 00:27:39 +0000 Message-ID: References: <1521553556-62982-1-git-send-email-rosen.xu@intel.com> <1525443062-43231-1-git-send-email-rosen.xu@intel.com> <1525443062-43231-5-git-send-email-rosen.xu@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODQ4NDYyMWItOGQ3NS00OGJiLWJlZTEtZGY4YmQzOGQzZGFkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjIuNS4xOCIsIlRydXN0ZWRMYWJlbEhhc2giOiIwR3VYSFV3UjdEZHYzV2dOOURITmdKcjVlajVETVRFRFRNRkVyK1lQRzVFWElLV3VSaTZubDJWN2MxSDdCelJtIn0= x-ctpclassification: CTP_NT x-originating-ip: [172.17.6.105] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v7 4/5] iFPGA: add meson build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 06 May 2018 00:27:48 -0000 > -----Original Message----- > From: Shreyansh Jain [mailto:shreyansh.jain@nxp.com] > Sent: Sunday, May 6, 2018 2:22 AM > To: Xu, Rosen ; dev@dpdk.org > Cc: Doherty, Declan ; Richardson, Bruce > ; Yigit, Ferruh ; > Ananyev, Konstantin ; Zhang, Tianfei > ; Liu, Song ; Wu, Hao > ; gaetan.rivet@6wind.com > Subject: RE: [PATCH v7 4/5] iFPGA: add meson build >=20 > > -----Original Message----- > > From: Xu, Rosen [mailto:rosen.xu@intel.com] > > Sent: Friday, May 4, 2018 7:41 PM > > To: dev@dpdk.org > > Cc: rosen.xu@intel.com; declan.doherty@intel.com; > > bruce.richardson@intel.com; Shreyansh Jain ; > > ferruh.yigit@intel.com; konstantin.ananyev@intel.com; > > tianfei.zhang@intel.com; song.liu@intel.com; hao.wu@intel.com; > > gaetan.rivet@6wind.com > > Subject: [PATCH v7 4/5] iFPGA: add meson build > > >=20 > [...] >=20 > > index 0000000..6725687 > > --- /dev/null > > +++ b/drivers/raw/ifpga_rawdev/meson.build > > @@ -0,0 +1,15 @@ > > +# SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2018 Intel > > +Corporation > > + > > +version =3D 1 > > + > > +subdir('base') > > +objs =3D [base_objs] > > + > > +deps +=3D ['rawdev', 'pci', 'bus_pci', 'kvargs', > > + 'bus_vdev', 'bus_ifpga'] > > +sources =3D files('ifpga_rawdev.c') > > + > > +includes +=3D include_directories('base') > > + > > +allow_experimental_apis =3D true > > diff --git a/drivers/raw/meson.build b/drivers/raw/meson.build new > > file mode 100644 index 0000000..410f908 > > --- /dev/null > > +++ b/drivers/raw/meson.build > > @@ -0,0 +1,6 @@ > > +# SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2017 Intel > > +Corporation > > + > > +drivers =3D ['ifpga_rawdev'] > > +config_flag_fmt =3D 'RTE_LIBRTE_@0@_PMD' > > +driver_name_fmt =3D 'rte_@0@' >=20 > I think you missed this again. From [1], you were to base your patch over > cmdif so that this drivers/raw/meson.build introduction doesn't conflict. >=20 > Can you rebase and send once again, but *only* once cmdif patches have > been merged? >=20 > [1] http://dpdk.org/ml/archives/dev/2018-May/100064.html Oh, we will modify it and send the v8 patches today.